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source: PROJECT_CORE_MPI/CORE_MPI/TRUNK/MPI_NOC_pad.txt @ 15

Last change on this file since 15 was 15, checked in by rolagamo, 12 years ago

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1	Release 12.3 - par M.70d (nt64)
2	Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
3
4	Fri Aug 03 10:17:01 2012
5
6
7	INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
8	1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
9	2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
10	3. The <design name>.pad file designed for parsing by customers. It uses the "\|" as a data field separator.
11
12	INPUT FILE: MPI_NOC_map.ncd
13	OUTPUT FILE: MPI_NOC_pad.txt
14	PART TYPE: xc3s1200e
15	SPEED GRADE: -5
16	PACKAGE: ft256
17
18	Pinout by Pin Number:
19
20	+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
21	\|Pin Number\|Signal Name \|Pin Usage\|Pin Name \|Direction\|IO Standard\|IO Bank Number\|Drive (mA)\|Slew Rate\|Termination\|IOB Delay\|Voltage\|Constraint\|IO Register\|Signal Integrity\|
22	+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
23	\|A1 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
24	\|A2 \| \| \|TDI \| \| \| \| \| \| \| \| \| \| \| \|
25	\|A3 \| \|IBUF \|IP \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
26	\|A4 \|MPI_Node_Out<1>_ram_address_wr<14> \|IOB \|IO_L17N_0/VREF_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
27	\|A5 \|MPI_Node_Out<1>_ram_address_wr<13> \|IOB \|IO_L17P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
28	\|A6 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
29	\|A7 \|MPI_Node_Out<1>_ram_address_wr<3> \|IOB \|IO \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
30	\|A8 \| \|DIFFMI \|IP_L10P_0/GCLK8 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
31	\|A9 \|MPI_Node_Out<1>_ram_address_wr<0> \|IOB \|IO_L09N_0/GCLK7 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
32	\|A10 \|MPI_Node_Out<2>_ram_address_rd<15> \|IOB \|IO_L09P_0/GCLK6 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
33	\|A11 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
34	\|A12 \|MPI_Node_Out<2>_ram_address_rd<4> \|IOB \|IO \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
35	\|A13 \| \|DIFFS \|IO_L03N_0/VREF_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
36	\|A14 \| \|DIFFS \|IO_L01N_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
37	\|A15 \| \| \|TCK \| \| \| \| \| \| \| \| \| \| \| \|
38	\|A16 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
39	\|B1 \|MPI_Node_in<2>_ram_data_out<6> \|IBUF \|IO_L01P_3 \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
40	\|B2 \|MPI_Node_Out<1>_ram_data_in<5> \|IOB \|IO_L01N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
41	\|B3 \|MPI_Node_Out<1>_ram_data_in<3> \|IOB \|IO_L19N_0/HSWAP \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
42	\|B4 \|MPI_Node_Out<1>_ram_address_wr<15> \|IOB \|IO \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
43	\|B5 \| \| \|VCCO_0 \| \| \|0 \| \| \| \| \|2.50 \| \| \| \|
44	\|B6 \|MPI_Node_Out<1>_ram_address_wr<10> \|IOB \|IO \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
45	\|B7 \|MPI_Node_Out<1>_ram_address_wr<6> \|IOB \|IO_L13P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
46	\|B8 \|MPI_Node_in<1>_clk \|IBUF \|IP_L10N_0/GCLK9 \|INPUT \|LVCMOS25* \|0 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
47	\|B9 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
48	\|B10 \|MPI_Node_Out<2>_ram_address_rd<9> \|IOB \|IO \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
49	\|B11 \|MPI_Node_Out<2>_ram_address_rd<5> \|IOB \|IO_L05N_0/VREF_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
50	\|B12 \| \| \|VCCO_0 \| \| \|0 \| \| \| \| \|2.50 \| \| \| \|
51	\|B13 \| \|DIFFM \|IO_L03P_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
52	\|B14 \| \|DIFFM \|IO_L01P_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
53	\|B15 \| \| \|TMS \| \| \| \| \| \| \| \| \| \| \| \|
54	\|B16 \| \|IBUF \|IP \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
55	\|C1 \|MPI_Node_Out<1>_ram_data_in<6> \|IOB \|IO_L02P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
56	\|C2 \|MPI_Node_Out<1>_ram_data_in<7> \|IOB \|IO_L02N_3/VREF_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
57	\|C3 \|MPI_Node_Out<1>_ram_data_in<2> \|IOB \|IO_L19P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
58	\|C4 \|MPI_Node_Out<1>_ram_data_in<1> \|IOB \|IO_L18N_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
59	\|C5 \|MPI_Node_Out<2>_ram_address_wr<5> \|IOB \|IO_L18P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
60	\|C6 \|MPI_Node_Out<1>_ram_address_wr<11> \|IOB \|IO_L15P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
61	\|C7 \|MPI_Node_Out<1>_ram_address_wr<7> \|IOB \|IO_L13N_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
62	\|C8 \|MPI_Node_Out<1>_ram_address_wr<1> \|IOB \|IO_L11P_0/GCLK10 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
63	\|C9 \| \|DIFFSI \|IP_L07N_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
64	\|C10 \| \|DIFFMI \|IP_L07P_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
65	\|C11 \|MPI_Node_Out<2>_ram_address_rd<7> \|IOB \|IO_L05P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
66	\|C12 \| \|DIFFSI \|IP_L02N_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
67	\|C13 \| \|IBUF \|IP \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
68	\|C14 \| \| \|TDO \| \| \| \| \| \| \| \| \| \| \| \|
69	\|C15 \| \|DIFFS \|IO_L19N_1/LDC2 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
70	\|C16 \| \|DIFFM \|IO_L19P_1/LDC1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
71	\|D1 \|MPI_Node_Out<2>_ram_address_wr<7> \|IOB \|IO_L05P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
72	\|D2 \|MPI_Node_in<2>_ram_data_out<0> \|IBUF \|IP \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
73	\|D3 \| \| \|PROG_B \| \| \| \| \| \| \| \| \| \| \| \|
74	\|D4 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
75	\|D5 \| \|DIFFMI \|IP_L16P_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
76	\|D6 \|MPI_Node_Out<1>_ram_address_wr<12> \|IOB \|IO_L15N_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
77	\|D7 \|MPI_Node_Out<1>_ram_address_wr<9> \|IOB \|IO_L14N_0/VREF_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
78	\|D8 \|MPI_Node_Out<1>_ram_address_wr<2> \|IOB \|IO_L11N_0/GCLK11 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
79	\|D9 \|MPI_Node_Out<2>_ram_address_rd<14> \|IOB \|IO/VREF_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
80	\|D10 \|MPI_Node_Out<2>_ram_address_rd<10> \|IOB \|IO_L06P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
81	\|D11 \|MPI_Node_Out<2>_ram_address_rd<2> \|IOB \|IO_L04P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
82	\|D12 \| \|DIFFMI \|IP_L02P_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
83	\|D13 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
84	\|D14 \| \|DIFFS \|IO_L18N_1/LDC0 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
85	\|D15 \| \|DIFFM \|IO_L18P_1/HDC \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
86	\|D16 \| \|IBUF \|IP/VREF_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
87	\|E1 \|MPI_Node_in<2>_ram_data_out<5> \|IBUF \|IO_L05N_3 \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
88	\|E2 \| \| \|VCCO_3 \| \| \|3 \| \| \| \| \|2.50 \| \| \| \|
89	\|E3 \|MPI_Node_Out<2>_ram_address_wr<0> \|IOB \|IO_L03P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
90	\|E4 \|MPI_Node_Out<2>_ram_address_wr<1> \|IOB \|IO_L03N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
91	\|E5 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
92	\|E6 \| \|DIFFSI \|IP_L16N_0 \|UNUSED \| \|0 \| \| \| \| \| \| \| \| \|
93	\|E7 \|MPI_Node_Out<1>_ram_address_wr<8> \|IOB \|IO_L14P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
94	\|E8 \|MPI_Node_Out<1>_ram_address_wr<4> \|IOB \|IO_L12P_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
95	\|E9 \|MPI_Node_Out<2>_ram_address_rd<12> \|IOB \|IO_L08P_0/GCLK4 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
96	\|E10 \|MPI_Node_Out<2>_ram_address_rd<11> \|IOB \|IO_L06N_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
97	\|E11 \|MPI_Node_Out<2>_ram_address_rd<6> \|IOB \|IO_L04N_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
98	\|E12 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
99	\|E13 \|MPI_Node_Out<2>_ram_address_rd<8> \|IOB \|IO_L17P_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
100	\|E14 \| \|IBUF \|IP \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
101	\|E15 \| \| \|VCCO_1 \| \| \|1 \| \| \| \| \|2.50 \| \| \| \|
102	\|E16 \|MPI_Node_Out<2>_ram_address_rd<0> \|IOB \|IO_L17N_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
103	\|F1 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
104	\|F2 \|MPI_Node_in<2>_ram_data_out<2> \|IBUF \|IP \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
105	\|F3 \|MPI_Node_Out<2>_ram_address_wr<2> \|IOB \|IO_L04P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
106	\|F4 \|MPI_Node_Out<2>_ram_address_wr<3> \|IOB \|IO_L04N_3/VREF_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
107	\|F5 \|MPI_Node_in<2>_ram_data_out<1> \|IBUF \|IP \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
108	\|F6 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
109	\|F7 \| \| \|VCCO_0 \| \| \|0 \| \| \| \| \|2.50 \| \| \| \|
110	\|F8 \|MPI_Node_Out<1>_ram_address_wr<5> \|IOB \|IO_L12N_0 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
111	\|F9 \|MPI_Node_Out<2>_ram_address_rd<13> \|IOB \|IO_L08N_0/GCLK5 \|OUTPUT \|LVCMOS25* \|0 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
112	\|F10 \| \| \|VCCO_0 \| \| \|0 \| \| \| \| \|2.50 \| \| \| \|
113	\|F11 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
114	\|F12 \|MPI_Node_Out<2>_ram_address_rd<1> \|IOB \|IO_L16N_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
115	\|F13 \| \|DIFFM \|IO_L16P_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
116	\|F14 \|MPI_Node_Out<2>_ram_address_rd<3> \|IOB \|IO_L15P_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
117	\|F15 \| \|DIFFS \|IO_L15N_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
118	\|F16 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
119	\|G1 \|MPI_Node_in<2>_ram_data_out<3> \|IBUF \|IP/VREF_3 \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
120	\|G2 \|MPI_Node_Out<2>_ram_address_wr<9> \|IOB \|IO_L07N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
121	\|G3 \|MPI_Node_Out<1>_ram_data_in<0> \|IOB \|IO_L07P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
122	\|G4 \|MPI_Node_Out<2>_ram_address_wr<8> \|IOB \|IO_L06N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
123	\|G5 \|MPI_Node_Out<2>_ram_address_wr<6> \|IOB \|IO_L06P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
124	\|G6 \| \| \|VCCO_3 \| \| \|3 \| \| \| \| \|2.50 \| \| \| \|
125	\|G7 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
126	\|G8 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
127	\|G9 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
128	\|G10 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
129	\|G11 \| \| \|VCCO_1 \| \| \|1 \| \| \| \| \|2.50 \| \| \| \|
130	\|G12 \| \|IBUF \|IP \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
131	\|G13 \|MPI_Node_Out<2>_hold_req \|IOB \|IO_L14P_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
132	\|G14 \| \|DIFFS \|IO_L14N_1/A0 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
133	\|G15 \|MPI_Node_Out<2>_ram_en \|IOB \|IO_L13P_1/A2 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
134	\|G16 \| \|DIFFS \|IO_L13N_1/A1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
135	\|H1 \|MPI_Node_in<2>_ram_data_out<4> \|IBUF \|IP \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
136	\|H2 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
137	\|H3 \|MPI_Node_Out<2>_ram_address_wr<12> \|IOB \|IO_L09P_3/LHCLK2 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
138	\|H4 \|MPI_Node_Out<2>_ram_address_wr<13> \|IOB \|IO_L09N_3/LHCLK3/IRDY2 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
139	\|H5 \|MPI_Node_Out<2>_ram_address_wr<10> \|IOB \|IO_L08P_3/LHCLK0 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
140	\|H6 \|MPI_Node_Out<2>_ram_address_wr<11> \|IOB \|IO_L08N_3/LHCLK1 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
141	\|H7 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
142	\|H8 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
143	\|H9 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
144	\|H10 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
145	\|H11 \| \|DIFFS \|IO_L12N_1/A3/RHCLK7 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
146	\|H12 \| \|DIFFM \|IO_L12P_1/A4/RHCLK6 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
147	\|H13 \| \|IBUF \|IP/VREF_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
148	\|H14 \|MPI_Node_in<2>_instruction<6> \|IBUF \|IO_L11N_1/A5/RHCLK5 \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
149	\|H15 \|MPI_Node_in<2>_instruction<7> \|IBUF \|IO_L11P_1/A6/RHCLK4/IRDY1\|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
150	\|H16 \|MPI_Node_in<2>_instruction<3> \|IBUF \|IP \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
151	\|J1 \|MPI_Node_Out<2>_ram_data_in<0> \|IOB \|IO_L12P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
152	\|J2 \|MPI_Node_Out<2>_ram_address_wr<14> \|IOB \|IO_L10P_3/LHCLK4/TRDY2 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
153	\|J3 \|MPI_Node_Out<2>_ram_address_wr<15> \|IOB \|IO_L10N_3/LHCLK5 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
154	\|J4 \|MPI_Node_Out<1>_ram_data_in<4> \|IOB \|IO_L11N_3/LHCLK7 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
155	\|J5 \|MPI_Node_Out<2>_ram_address_wr<4> \|IOB \|IO_L11P_3/LHCLK6 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
156	\|J6 \|MPI_Node_in<2>_ram_data_out<7> \|IBUF \|IP \|INPUT \|LVCMOS25* \|3 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
157	\|J7 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
158	\|J8 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
159	\|J9 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
160	\|J10 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
161	\|J11 \| \|IBUF \|IP \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
162	\|J12 \|MPI_Node_in<2>_instruction<4> \|IBUF \|IP \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
163	\|J13 \|MPI_Node_in<2>_instruction<2> \|IBUF \|IO_L10N_1/A7/RHCLK3/TRDY1\|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
164	\|J14 \|MPI_Node_in<2>_instruction<0> \|IBUF \|IO_L10P_1/A8/RHCLK2 \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
165	\|J15 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
166	\|J16 \| \|DIFFS \|IO_L09N_1/A9/RHCLK1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
167	\|K1 \|MPI_Node_Out<2>_ram_data_in<1> \|IOB \|IO_L12N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
168	\|K2 \|MPI_Node_Out<2>_ram_data_in<2> \|IOB \|IO_L13P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
169	\|K3 \|MPI_Node_Out<2>_ram_data_in<3> \|IOB \|IO_L13N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
170	\|K4 \| \|IBUF \|IP \|UNUSED \| \|3 \| \| \| \| \| \| \| \| \|
171	\|K5 \|MPI_Node_Out<2>_ram_data_in<6> \|IOB \|IO_L15P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
172	\|K6 \| \| \|VCCO_3 \| \| \|3 \| \| \| \| \|2.50 \| \| \| \|
173	\|K7 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
174	\|K8 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
175	\|K9 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
176	\|K10 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
177	\|K11 \| \| \|VCCO_1 \| \| \|1 \| \| \| \| \|2.50 \| \| \| \|
178	\|K12 \| \|DIFFS \|IO_L07N_1/A11 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
179	\|K13 \|MPI_Node_in<2>_instruction<1> \|IBUF \|IO_L07P_1/A12 \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
180	\|K14 \| \|DIFFS \|IO_L08N_1/VREF_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
181	\|K15 \| \|DIFFM \|IO_L08P_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
182	\|K16 \|MPI_Node_in<2>_instruction<5> \|IBUF \|IO_L09P_1/A10/RHCLK0 \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
183	\|L1 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
184	\|L2 \|MPI_Node_Out<2>_ram_data_in<5> \|IOB \|IO_L14N_3/VREF_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
185	\|L3 \|MPI_Node_Out<2>_ram_data_in<4> \|IOB \|IO_L14P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
186	\|L4 \|MPI_Node_Out<2>_PushOut<5> \|IOB \|IO_L17N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
187	\|L5 \|MPI_Node_Out<2>_ram_data_in<7> \|IOB \|IO_L15N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
188	\|L6 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
189	\|L7 \| \| \|VCCO_2 \| \| \|2 \| \| \| \| \|2.50 \| \| \| \|
190	\|L8 \|MPI_Node_Out<1>_ram_address_rd<9> \|IOB \|IO_L09N_2/D6/GCLK13 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
191	\|L9 \|MPI_Node_Out<1>_ram_address_rd<11> \|IOB \|IO_L13P_2/M0 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
192	\|L10 \| \| \|VCCO_2 \| \| \|2 \| \| \| \| \|2.50 \| \| \| \|
193	\|L11 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
194	\|L12 \| \|DIFFM \|IO_L05P_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
195	\|L13 \|MPI_Node_Out<1>_instruction_fifo_full\|IOB \|IO_L05N_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
196	\|L14 \| \|DIFFM \|IO_L06P_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
197	\|L15 \| \|DIFFS \|IO_L06N_1 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
198	\|L16 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
199	\|M1 \|MPI_Node_Out<2>_PushOut<0> \|IOB \|IO_L16P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
200	\|M2 \| \| \|VCCO_3 \| \| \|3 \| \| \| \| \|2.50 \| \| \| \|
201	\|M3 \| \|IBUF \|IP \|UNUSED \| \|3 \| \| \| \| \| \| \| \| \|
202	\|M4 \|MPI_Node_Out<2>_PushOut<4> \|IOB \|IO_L17P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
203	\|M5 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
204	\|M6 \|MPI_Node_Out<1>_ram_address_rd<5> \|IOB \|IO_L05P_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
205	\|M7 \|MPI_Node_Out<1>_ram_address_rd<6> \|IOB \|IO \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
206	\|M8 \|MPI_Node_Out<1>_ram_address_rd<3> \|IOB \|IO_L09P_2/D7/GCLK12 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
207	\|M9 \|MPI_Node_Out<1>_hold_req \|IOB \|IO_L13N_2/DIN/D0 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
208	\|M10 \|MPI_Node_Out<1>_PushOut<0> \|IOB \|IO_L15N_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
209	\|M11 \|MPI_Node_in<2>_instruction_en \|IBUF \|IP_L17N_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
210	\|M12 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
211	\|M13 \|MPI_Node_in<1>_instruction<3> \|IBUF \|IP \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
212	\|M14 \|MPI_Node_in<1>_instruction<6> \|IBUF \|IP \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
213	\|M15 \| \| \|VCCO_1 \| \| \|1 \| \| \| \| \|2.50 \| \| \| \|
214	\|M16 \|MPI_Node_Out<1>_ram_en \|IOB \|IO_L04N_1/VREF_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
215	\|N1 \|MPI_Node_Out<2>_PushOut<1> \|IOB \|IO_L16N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
216	\|N2 \| \|IBUF \|IP/VREF_3 \|UNUSED \| \|3 \| \| \| \| \| \| \| \| \|
217	\|N3 \| \|IBUF \|IP \|UNUSED \| \|3 \| \| \| \| \| \| \| \| \|
218	\|N4 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
219	\|N5 \|MPI_Node_Out<1>_PushOut<2> \|IOB \|IO_L03N_2/MOSI/CSI_B \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
220	\|N6 \|MPI_Node_Out<1>_ram_address_rd<2> \|IOB \|IO_L05N_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
221	\|N7 \|MPI_Node_Out<1>_ram_address_rd<0> \|IOB \|IO_L07P_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
222	\|N8 \|MPI_Node_Out<1>_ram_address_rd<13> \|IOB \|IO_L10P_2/D4/GCLK14 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
223	\|N9 \|MPI_Node_Out<1>_ram_address_rd<10> \|IOB \|IO_L12N_2/D1/GCLK3 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
224	\|N10 \|MPI_Node_in<1>_hold_ack \|IBUF \|IO_L15P_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
225	\|N11 \|MPI_Node_in<1>_instruction<5> \|IBUF \|IP_L17P_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
226	\|N12 \|MPI_Node_in<1>_instruction<2> \|IBUF \|IO_L18N_2/A20 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
227	\|N13 \| \| \|VCCINT \| \| \| \| \| \| \| \|1.2 \| \| \| \|
228	\|N14 \|MPI_Node_in<1>_instruction<4> \|IBUF \|IO_L03P_1 \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
229	\|N15 \|MPI_Node_in<1>_instruction<1> \|IBUF \|IO_L03N_1/VREF_1 \|INPUT \|LVCMOS25* \|1 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
230	\|N16 \|MPI_Node_Out<2>_instruction_fifo_full\|IOB \|IO_L04P_1 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
231	\|P1 \|MPI_Node_Out<2>_PushOut<3> \|IOB \|IO_L18N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
232	\|P2 \|MPI_Node_Out<1>_PushOut<1> \|IOB \|IO_L18P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
233	\|P3 \|MPI_Node_Out<1>_PushOut<4> \|IOB \|IO_L01P_2/CSO_B \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
234	\|P4 \|MPI_Node_Out<2>_PushOut<2> \|IOB \|IO_L01N_2/INIT_B \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
235	\|P5 \|MPI_Node_Out<1>_PushOut<3> \|IOB \|IO_L03P_2/DOUT/BUSY \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
236	\|P6 \|MPI_Node_Out<2>_ram_we \|IOB \|IO_L06N_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
237	\|P7 \|MPI_Node_Out<1>_ram_address_rd<8> \|IOB \|IO_L07N_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
238	\|P8 \|MPI_Node_Out<1>_ram_we \|IOB \|IO_L10N_2/D3/GCLK15 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
239	\|P9 \|MPI_Node_Out<1>_ram_address_rd<12> \|IOB \|IO_L12P_2/D2/GCLK2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
240	\|P10 \|MPI_Node_Out<1>_ram_address_rd<15> \|IOB \|IO_L14P_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
241	\|P11 \|MPI_Node_in<1>_instruction_en \|IBUF \|IO_L16N_2/A22 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
242	\|P12 \|MPI_Node_in<1>_instruction<0> \|IBUF \|IO_L18P_2/A21 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
243	\|P13 \| \|IOB \|IO/VREF_2 \|UNUSED \| \|2 \| \| \| \| \| \| \| \| \|
244	\|P14 \|MPI_Node_Out<1>_PushOut<6> \|IOB \|IO_L20P_2/VS0/A17 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
245	\|P15 \| \|DIFFS \|IO_L02N_1/A13 \|UNUSED \| \|1 \| \| \| \| \| \| \| \| \|
246	\|P16 \|MPI_Node_Out<1>_barrier_completed \|IOB \|IO_L02P_1/A14 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
247	\|R1 \|MPI_Node_Out<2>_PushOut<7> \|IOB \|IO_L19N_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
248	\|R2 \|MPI_Node_Out<2>_PushOut<6> \|IOB \|IO_L19P_3 \|OUTPUT \|LVCMOS25* \|3 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
249	\|R3 \|MPI_Node_in<1>_ram_data_out<2> \|IBUF \|IP_L02N_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
250	\|R4 \|MPI_Node_Out<1>_ram_address_rd<4> \|IOB \|IO/VREF_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
251	\|R5 \| \| \|VCCO_2 \| \| \|2 \| \| \| \| \|2.50 \| \| \| \|
252	\|R6 \|MPI_Node_Out<1>_ram_address_rd<7> \|IOB \|IO_L06P_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
253	\|R7 \|MPI_Node_in<1>_ram_data_out<3> \|IBUF \|IP_L08P_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
254	\|R8 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
255	\|R9 \|MPI_Node_in<1>_ram_data_out<6> \|IBUF \|IP_L11N_2/M2/GCLK1 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
256	\|R10 \|MPI_Node_in<1>_ram_data_out<7> \|IBUF \|IO_L14N_2/VREF_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
257	\|R11 \|MPI_Node_in<2>_hold_ack \|IBUF \|IO_L16P_2/A23 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
258	\|R12 \| \| \|VCCO_2 \| \| \|2 \| \| \| \| \|2.50 \| \| \| \|
259	\|R13 \|MPI_Node_Out<1>_PushOut<7> \|IOB \|IO_L19N_2/VS1/A18 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
260	\|R14 \| \|DIFFS \|IO_L20N_2/CCLK \|UNUSED \| \|2 \| \| \| \| \| \| \| \| \|
261	\|R15 \|MPI_Node_Out<2>_barrier_completed \|IOB \|IO_L01N_1/A15 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
262	\|R16 \|MPI_Node_Out<2>_packet_received \|IOB \|IO_L01P_1/A16 \|OUTPUT \|LVCMOS25* \|1 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
263	\|T1 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
264	\|T2 \|MPI_Node_in<1>_ram_data_out<0> \|IBUF \|IP \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
265	\|T3 \|MPI_Node_in<1>_ram_data_out<1> \|IBUF \|IP_L02P_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
266	\|T4 \|MPI_Node_Out<1>_packet_received \|IOB \|IO_L04P_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
267	\|T5 \|MPI_Node_Out<1>_ram_address_rd<1> \|IOB \|IO_L04N_2 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
268	\|T6 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
269	\|T7 \|MPI_Node_in<1>_ram_data_out<4> \|IBUF \|IP_L08N_2/VREF_2 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
270	\|T8 \|MPI_Node_Out<1>_PushOut<5> \|IOB \|IO/D5 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
271	\|T9 \|MPI_Node_in<1>_ram_data_out<5> \|IBUF \|IP_L11P_2/RDWR_B/GCLK0 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
272	\|T10 \|MPI_Node_Out<1>_ram_address_rd<14> \|IOB \|IO/M1 \|OUTPUT \|LVCMOS25* \|2 \|12 \|SLOW \|NONE** \| \| \|UNLOCATED \|NO \|NONE \|
273	\|T11 \| \| \|VCCAUX \| \| \| \| \| \| \| \|2.5 \| \| \| \|
274	\|T12 \| \|IOB \|IO \|UNUSED \| \|2 \| \| \| \| \| \| \| \| \|
275	\|T13 \|MPI_Node_in<1>_instruction<7> \|IBUF \|IO_L19P_2/VS2/A19 \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
276	\|T14 \|MPI_Node_in<1>_reset \|IBUF \|IP \|INPUT \|LVCMOS25* \|2 \| \| \| \|NONE \| \|UNLOCATED \|NO \|NONE \|
277	\|T15 \| \| \|DONE \| \| \| \| \| \| \| \| \| \| \| \|
278	\|T16 \| \| \|GND \| \| \| \| \| \| \| \| \| \| \| \|
279	+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
280
281	* Default value.
282	** This default Pullup/Pulldown value can be overridden in Bitgen.
283	****** Special VCCO requirements may apply. Please consult the device
284	family datasheet for specific guideline on VCCO requirements.
285
286

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