source: PROJECT_CORE_MPI/CORE_MPI/TRUNK/MUX8.vhd @ 158

Last change on this file since 158 was 15, checked in by rolagamo, 12 years ago
File size: 1.1 KB
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1----------------------------------------------------------------------------------
2-- Company:
3-- Engineer:
4--
5-- Create Date:    09:30:26 06/13/2011
6-- Design Name:
7-- Module Name:    MUX8 - Behavioral
8-- Project Name:
9-- Target Devices:
10-- Tool versions:
11-- Description:
12--
13-- Dependencies:
14--
15-- Revision:
16-- Revision 0.01 - File Created
17-- Additional Comments:
18--
19----------------------------------------------------------------------------------
20library IEEE;
21use IEEE.STD_LOGIC_1164.ALL;
22use IEEE.STD_LOGIC_ARITH.ALL;
23use IEEE.STD_LOGIC_UNSIGNED.ALL;
24
25---- Uncomment the following library declaration if instantiating
26---- any Xilinx primitives in this code.
27--library UNISIM;
28--use UNISIM.VComponents.all;
29
30entity MUX8 is
31    Port ( di1 : in  STD_LOGIC_VECTOR (7 downto 0);
32           di2 : in  STD_LOGIC_VECTOR (7 downto 0);
33           sel : in  STD_LOGIC;
34           do : out  STD_LOGIC_VECTOR (7 downto 0));
35end MUX8;
36
37architecture Behavioral of MUX8 is
38
39begin
40 with sel select
41                do <= di1 when '0',
42                                di2 when '1',
43                                di1 when others;
44end Behavioral;
45
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