source: PROJECT_CORE_MPI/CORE_MPI/TRUNK/_xmsgs/netgen.xmsgs

Last change on this file was 15, checked in by rolagamo, 12 years ago
File size: 651 bytes
Line 
1<?xml version="1.0" encoding="UTF-8"?>
2<!-- IMPORTANT: This is an internal file that has been generated
3     by the Xilinx ISE software.  Any direct editing or
4     changes made to this file may result in unpredictable
5     behavior or data corruption.  It is strongly advised that
6     users do not edit the contents of this file. -->
7<messages>
8<msg type="info" file="NetListWriters" num="635" delta="old" >The generated VHDL netlist contains Xilinx <arg fmt="%s" index="1">UNISIM</arg> simulation primitives and has to be used with <arg fmt="%s" index="2">UNISIM</arg> library for correct compilation and simulation.
9</msg>
10
11</messages>
12
Note: See TracBrowser for help on using the repository browser.