source: PROJECT_CORE_MPI/CORE_MPI/TRUNK/pa.fromHdl.tcl @ 42

Last change on this file since 42 was 15, checked in by rolagamo, 12 years ago
File size: 4.4 KB
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2# PlanAhead Launch Script for Pre-Synthesis Floorplanning, created by Project Navigator
3
4create_project -name MPI_CORE_COMPONENTS -dir "C:/Core MPI/CORE_MPI/planAhead_run_1" -part xc6slx100fgg484-3
5set_param project.pinAheadLayout yes
6set srcset [get_property srcset [current_run -impl]]
7set_property top MultiMPITest $srcset
8set_param project.paUcfFile  "MultiMPITest.ucf"
9set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/CoreTypes.vhd}]]
10set_property file_type VHDL $hdlfile
11set_property library NocLib $hdlfile
12set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/RAM_256.vhd}]]
13set_property file_type VHDL $hdlfile
14set_property library NocLib $hdlfile
15set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/Arbiter.vhd}]]
16set_property file_type VHDL $hdlfile
17set_property library NocLib $hdlfile
18set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/FIFO_256_FWFT.vhd}]]
19set_property file_type VHDL $hdlfile
20set_property library NocLib $hdlfile
21set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/Crossbit.vhd}]]
22set_property file_type VHDL $hdlfile
23set_property library NocLib $hdlfile
24set hdlfile [add_files [list {round_robbin_machine.vhd}]]
25set_property file_type VHDL $hdlfile
26set_property library work $hdlfile
27set hdlfile [add_files [list {RAM_64.vhd}]]
28set_property file_type VHDL $hdlfile
29set_property library work $hdlfile
30set hdlfile [add_files [list {Packet_type.vhd}]]
31set_property file_type VHDL $hdlfile
32set_property library work $hdlfile
33set hdlfile [add_files [list {MUX8.vhd}]]
34set_property file_type VHDL $hdlfile
35set_property library work $hdlfile
36set hdlfile [add_files [list {MUX1.vhd}]]
37set_property file_type VHDL $hdlfile
38set_property library work $hdlfile
39set hdlfile [add_files [list {DEMUX1.vhd}]]
40set_property file_type VHDL $hdlfile
41set_property library work $hdlfile
42set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/Scheduler.vhd}]]
43set_property file_type VHDL $hdlfile
44set_property library NocLib $hdlfile
45set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/OUTPUT_PORT_MODULE.vhd}]]
46set_property file_type VHDL $hdlfile
47set_property library NocLib $hdlfile
48set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/INPUT_PORT_MODULE.vhd}]]
49set_property file_type VHDL $hdlfile
50set_property library NocLib $hdlfile
51set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/Crossbar.vhd}]]
52set_property file_type VHDL $hdlfile
53set_property library NocLib $hdlfile
54set hdlfile [add_files [list {MPI_CORE_SCHEDULER.vhd}]]
55set_property file_type VHDL $hdlfile
56set_property library work $hdlfile
57set hdlfile [add_files [list {load_instr.vhd}]]
58set_property file_type VHDL $hdlfile
59set_property library work $hdlfile
60set hdlfile [add_files [list {FIFO_64_FWFT.vhd}]]
61set_property file_type VHDL $hdlfile
62set_property library work $hdlfile
63set hdlfile [add_files [list {EX4_FSM.vhd}]]
64set_property file_type VHDL $hdlfile
65set_property library work $hdlfile
66set hdlfile [add_files [list {EX3_FSM.vhd}]]
67set_property file_type VHDL $hdlfile
68set_property library work $hdlfile
69set hdlfile [add_files [list {EX2_FSM.vhd}]]
70set_property file_type VHDL $hdlfile
71set_property library work $hdlfile
72set hdlfile [add_files [list {EX1_FSM.vhd}]]
73set_property file_type VHDL $hdlfile
74set_property library work $hdlfile
75set hdlfile [add_files [list {Ex0_Fsm.vhd}]]
76set_property file_type VHDL $hdlfile
77set_property library work $hdlfile
78set hdlfile [add_files [list {DMA_ARBITER.vhd}]]
79set_property file_type VHDL $hdlfile
80set_property library work $hdlfile
81set hdlfile [add_files [list {../SWITCH_GENERIC_16_16/SWITCH_GEN.vhd}]]
82set_property file_type VHDL $hdlfile
83set_property library NocLib $hdlfile
84set hdlfile [add_files [list {RAM_32_32.vhd}]]
85set_property file_type VHDL $hdlfile
86set_property library work $hdlfile
87set hdlfile [add_files [list {CORE_MPI.vhd}]]
88set_property file_type VHDL $hdlfile
89set_property library work $hdlfile
90set hdlfile [add_files [list {PE.vhd}]]
91set_property file_type VHDL $hdlfile
92set_property library work $hdlfile
93set hdlfile [add_files [list {MPI_NOC.vhd}]]
94set_property file_type VHDL $hdlfile
95set_property library work $hdlfile
96set hdlfile [add_files [list {MultiMPITest.vhd}]]
97set_property file_type VHDL $hdlfile
98set_property library work $hdlfile
99add_files "MultiMPITest.ucf" -fileset [get_property constrset [current_run]]
100add_files -norecurse { {C:/Core MPI/CORE_MPI} }
101open_rtl_design -part xc6slx100fgg484-3
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