1 | ---------------------------------------------------------------------------------- |
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2 | -- Company: |
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3 | -- Engineer: |
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4 | -- |
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5 | -- Create Date: 12:04:21 04/22/2013 |
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6 | -- Design Name: |
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7 | -- Module Name: HT_process - Behavioral |
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8 | -- Project Name: |
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9 | -- Target Devices: |
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10 | -- Tool versions: |
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11 | -- Description: |
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12 | -- |
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13 | -- Dependencies: |
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14 | -- |
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15 | -- Revision: |
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16 | -- Revision 0.01 - File Created |
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17 | -- Additional Comments: |
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18 | -- |
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19 | ---------------------------------------------------------------------------------- |
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20 | library IEEE; |
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21 | use IEEE.STD_LOGIC_1164.ALL; |
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22 | USE ieee.numeric_std.ALL; |
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23 | library NocLib ; |
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24 | |
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25 | use std.textio.all; |
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26 | use NocLib.CoreTypes.all; |
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27 | Library MPI_HCL; |
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28 | use MPI_HCL.Packet_type.all; |
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29 | use MPI_HCL.MPI_RMA.all; |
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30 | -- Uncomment the following library declaration if using |
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31 | -- arithmetic functions with Signed or Unsigned values |
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32 | --use IEEE.NUMERIC_STD.ALL; |
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33 | |
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34 | -- Uncomment the following library declaration if instantiating |
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35 | -- any Xilinx primitives in this code. |
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36 | --library UNISIM; |
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37 | --use UNISIM.VComponents.all; |
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38 | |
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39 | entity HT_stat is |
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40 | generic (Task_id : natural:=0); |
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41 | Port ( clk : in STD_LOGIC; |
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42 | reset : in STD_LOGIC; |
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43 | en : in std_logic; -- active la tâche |
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44 | Interf_i : in core_i; --signaux pour l'interface IO |
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45 | Interf_o : out core_o; --signaux pour l'interface IO |
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46 | mem_o : out typ_dpram_o; -- signaux pour l'accès à la mémoire |
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47 | mem_i : in typ_dpram_i; -- signaux pour l'accès à la mémoire |
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48 | ct_out :out unsigned(7 downto 0); |
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49 | ht_state : out typ_mae; |
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50 | PE_in : in STD_LOGIC_VECTOR (Word-1 downto 0); --port GPIO pour le PE |
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51 | PE_out : out STD_LOGIC_VECTOR (Word-1 downto 0) --port GPIO pour le PE |
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52 | |
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53 | ); |
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54 | end HT_stat; |
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55 | |
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56 | architecture Behavioral of HT_stat is |
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57 | constant simres : time :=1 ps; --simulation resolution |
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58 | constant realres : real :=1.0e-3; --ramener le temps en ns |
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59 | |
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60 | -- type typ_mae is (start,Fillmem,NextFill,InitApp,GetRank,WInCreate,WinPost,WinStart, |
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61 | -- putdata,getdata,WinWait,WinCompleted,GetCmd,MpiSpawn,finalize,st_timeout); |
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62 | signal sram : typ_dpram; |
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63 | signal MyGroup:mpi_group; |
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64 | signal MyWin : mpi_win; |
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65 | signal MyRank :std_logic_vector(3 downto 0); |
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66 | signal intercomm,array_of_errcodes : natural; |
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67 | signal ct_state:natural :=0; |
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68 | signal Libr : Core_io; --regroupe tous les signaux IO de la bibliothèque |
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69 | signal RunState : typ_mae; |
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70 | signal load : std_logic; |
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71 | signal start1 : std_logic; |
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72 | signal loadval : std_logic_vector(31 downto 0); |
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73 | signal outval : std_logic_vector(31 downto 0); |
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74 | signal zero : std_logic; |
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75 | COMPONENT IP_Timer |
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76 | PORT( |
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77 | clk : IN std_logic; |
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78 | reset : IN std_logic; |
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79 | upDn : IN std_logic; |
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80 | load : IN std_logic; |
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81 | start : IN std_logic; |
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82 | loadval : IN std_logic_vector(31 downto 0); |
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83 | outval : OUT std_logic_vector(31 downto 0); |
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84 | zero : OUT std_logic |
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85 | ); |
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86 | END COMPONENT; |
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87 | |
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88 | attribute keep : string; |
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89 | attribute keep of sram : signal is "true"; |
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90 | attribute keep of libr : signal is "true"; |
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91 | attribute keep of RunState : signal is "true"; |
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92 | begin |
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93 | Inst_IP_Timer: IP_Timer PORT MAP( |
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94 | clk =>clk , |
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95 | reset => reset, |
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96 | upDn => '0', |
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97 | load => load, |
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98 | start => start1, |
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99 | loadval => loadval, |
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100 | outval => outval, |
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101 | zero => zero |
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102 | ); |
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103 | |
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104 | --MAE du PE |
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105 | --======================================================================= |
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106 | -- Interf<=Libr; |
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107 | |
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108 | |
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109 | pPutGet:process(clk,reset,en) |
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110 | |
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111 | constant DATAPTR : natural :=256; |
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112 | variable nb_rma:natural range 0 to 15:=0; |
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113 | variable bfill,destrank,pid,mport : natural range 0 to 15; |
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114 | variable fsrc,ret : natural range 0 to 15:=0; |
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115 | variable ct : natural range 0 to 31; |
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116 | variable timeout,dlen,dcount : natural range 0 to 511; |
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117 | variable adrToset,SrcAdr,DestAdr : std_logic_vector(ADRLEN-1 downto 0); |
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118 | variable mywin : Mpi_win; |
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119 | variable command , argv , maxprocs , info , root : natural:=0; --variable pour le spawn |
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120 | variable comm : natural :=0; |
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121 | variable iack,spawn : std_logic:='0'; |
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122 | variable adresse,adresse_rd :natural range 0 to 65536; |
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123 | variable status_reg,config_reg,param :std_logic_vector(Word-1 downto 0):=(others=>'0'); |
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124 | |
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125 | --======================================================= |
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126 | --variables pour la création du fichier de résultats |
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127 | -- synthesis translate_off |
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128 | type char_file is file of character; |
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129 | file f: text; |
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130 | variable status :file_open_status ; |
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131 | variable char_count: integer range 0 to 65536 := 0; |
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132 | variable str: string (1 to 79) ; |
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133 | variable L: line; |
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134 | variable fopened: std_logic:='0'; --indique si le fichier est ouvert ou non |
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135 | |
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136 | -- constant simres : time :=1 ps; --simulation resolution |
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137 | -- constant realres : real :=1.0e-3; --ramener le temps en ns |
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138 | -- returns real value of time parameter using pure VHDL |
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139 | function rt(t : time) return real is |
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140 | begin |
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141 | --if (simres=0) then |
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142 | return real(t/1 ns) * realres; |
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143 | -- else |
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144 | -- return 0.0; |
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145 | -- end if; |
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146 | end; |
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147 | -- synthesis translate_on |
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148 | --====================================================== |
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149 | begin |
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150 | --=== Partie combinatoire du process =================================== |
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151 | |
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152 | --=== Fin de la partie combinatoire du process ========================== |
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153 | |
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154 | |
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155 | |
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156 | --end loop; |
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157 | |
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158 | if (clk'event and clk='1') and en='1' then |
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159 | |
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160 | |
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161 | if reset='1' then |
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162 | RunState<=start; |
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163 | bfill:=0; |
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164 | ct:=0; |
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165 | dcount:=0; |
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166 | sram<=init_dpram; |
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167 | Libr<=init_Core_io; |
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168 | spawn:='0';nb_rma:=0; |
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169 | MyRank<="0000"; |
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170 | Interf_o.Instr_EN<='0'; |
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171 | Interf_o.Membusy<='0'; |
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172 | Interf_o.Instruction<=x"00"; |
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173 | Libr.i.Instr_ack<='0'; |
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174 | Libr.i.InitOk<='0'; |
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175 | Libr.i.Hold_Req<='0'; |
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176 | Libr.I.Spawned<='0'; |
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177 | Libr.i.RamSel<='0'; |
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178 | |
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179 | else |
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180 | --========================================================== |
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181 | --affectation des entrées sorties mémoires |
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182 | sram.i.data_out<=mem_I.data_out; |
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183 | mem_o.addr_wr<=sram.O.addr_wr; |
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184 | mem_o.addr_rd<=sram.O.addr_rd ; |
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185 | mem_o.we<=sram.O.we; |
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186 | mem_o.ena<=sram.O.ena; |
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187 | mem_o.enb<=sram.O.enb; |
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188 | mem_o.data_in<=sram.O.data_in; |
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189 | --affectation des entrées sorties MPI_HCL |
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190 | Interf_o.Instr_EN<=Libr.O.instr_en; |
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191 | Interf_o.Membusy<=Libr.O.MemBusy; |
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192 | Interf_o.Instruction<=Libr.O.Instruction; |
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193 | Libr.i.Instr_ack<=Interf_i.Instr_ack; |
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194 | Libr.i.InitOk<=Interf_i.InitOk; |
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195 | Libr.i.Hold_Req<=Interf_i.Hold_req; |
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196 | Libr.I.Spawned<=Interf_i.Spawned; |
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197 | --Libr.i.Hold_Ack<=Interf_i.Hold_Ack; |
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198 | Libr.i.RamSel<=Interf_i.RamSel; |
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199 | --ct_state<=ct; --pour débogage |
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200 | --============================================================ |
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201 | |
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202 | case RunState is |
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203 | when start => |
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204 | --Dcount<=0; |
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205 | if bfill=0 then -- si le nombre de bloc de mémoire remplis est vide |
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206 | --RunState<=InitApp; |
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207 | runstate<=fillmem; |
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208 | end if; |
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209 | --Ram_busy<='0'; |
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210 | Libr.O.MemBusy<='0'; |
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211 | Libr.O.Instr_En<='0'; |
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212 | iack:='0'; |
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213 | adresse:=10;--DATAPTR; |
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214 | |
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215 | adresse_rd:=0; |
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216 | timeout:=0; |
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217 | --dcount<=0; |
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218 | sram.O.we<='0'; |
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219 | sram.O.ena<='0'; |
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220 | sram.O.enb<='0'; |
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221 | -- synthesis translate_off |
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222 | if fopened='0' then |
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223 | file_open(status,f, integer'image(Task_Id) & "test_file0.txt", APPEND_MODE); |
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224 | --while not endfile(c_file_handle) loop |
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225 | --end if; |
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226 | |
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227 | --write (l,string'("Ce fichier contient des resultats de la simulation ; ;" & " started at time ; " & time'image(now))); |
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228 | --report l.all; |
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229 | -- writeline (f, l) ; |
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230 | fopened:='1'; |
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231 | end if; |
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232 | -- synthesis translate_on |
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233 | when Fillmem => |
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234 | -- sram.O.we<='1'; |
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235 | -- sram.O.ena<='1'; |
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236 | -- sram.O.enb<='1'; |
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237 | -- if Libr.I.Ramsel='0' then |
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238 | -- sram.O.addr_rd<=std_logic_vector(to_unsigned(adresse,ADRLEN)); |
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239 | -- sram.O.addr_wr<=std_logic_vector(to_unsigned(adresse,ADRLEN)); |
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240 | -- sram.O.data_in<=std_logic_vector(to_unsigned(dcount,8)); -- x"0f"; |
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241 | Libr.O.Instr_En<='0'; |
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242 | Writemem(ct,Libr,SRam,std_logic_vector(to_unsigned(adresse,ADRLEN)),std_logic_vector(to_unsigned(dcount,8))); |
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243 | if ct=0 then |
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244 | dcount:=dcount+1; |
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245 | timeout:=0; |
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246 | if dcount=250 then |
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247 | bfill:=bfill+1; |
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248 | |
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249 | if bfill=4 then |
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250 | --RunState<=WinCreate; |
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251 | Runstate<=InitApp; |
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252 | else |
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253 | RunState<=nextfill; |
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254 | end if; |
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255 | else |
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256 | adresse:=adresse+1; |
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257 | --sram.O.addr_wr<=std_logic_vector(to_unsigned(adresse,ADRLEN)); |
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258 | RunState<=Fillmem; |
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259 | end if; |
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260 | end if; |
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261 | --else -- attente de la libéraion de la mémoire |
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262 | -- timeout:=timeout+1; |
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263 | -- if timeout=500 then |
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264 | -- RunState<=st_timeout; |
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265 | -- end if; |
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266 | |
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267 | -- end if; |
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268 | when nextfill => --prépare le prochain bloc mémoire qui sera rempli |
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269 | adresse:=250*bfill+10; |
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270 | |
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271 | dcount:=0; |
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272 | ct:=0; |
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273 | RunState<=Fillmem; |
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274 | Libr.O.Instr_En<='0'; |
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275 | sram.O.we<='1'; |
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276 | sram.O.ena<='1'; |
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277 | sram.O.enb<='0'; |
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278 | when InitApp => |
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279 | --code pour Init |
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280 | dlen:=50; |
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281 | if ct=0 then |
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282 | -- synthesis translate_off |
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283 | write (l,string'("Dlen; ;INIT1 " & integer'image(Dlen)& "; " & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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284 | |
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285 | report l.all; |
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286 | writeline (f, l) ; |
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287 | -- synthesis translate_on |
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288 | end if; |
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289 | pMPI_Init(ct,Libr,Clk,SRam); |
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290 | |
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291 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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292 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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293 | |
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294 | --if Libr.InitOk='1' then |
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295 | if ct=0 then |
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296 | RunState<=GetRank; |
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297 | -- synthesis translate_off |
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298 | write (l,string'("Dlen;" & integer'image(Dlen) & ";INIT2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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299 | report l.all; |
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300 | writeline (f, l) ; |
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301 | -- synthesis translate_on |
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302 | end if; |
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303 | |
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304 | |
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305 | |
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306 | when GetRank => |
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307 | if ct=0 then |
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308 | -- synthesis translate_off |
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309 | write (l,string'("Dlen;" & integer'image(Dlen)& ";Rank1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now)))); |
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310 | report l.all; |
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311 | writeline (f, l) ; |
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312 | -- synthesis translate_on |
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313 | end if; |
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314 | pMPI_Comm_rank(ct,Libr,sram,MPI_COMM_WORLD,MyRank); |
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315 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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316 | |
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317 | |
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318 | if ct=0 then |
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319 | RunState<=Fillmem; |
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320 | RunState<=Wincreate; |
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321 | -- synthesis translate_off |
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322 | write (l,string'("Dlen;"& integer'image(dlen) & ";Rank2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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323 | report l.all; |
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324 | writeline (f, l) ; |
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325 | -- synthesis translate_on |
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326 | end if; |
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327 | |
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328 | |
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329 | when Wincreate => --par défaut la fenêtre 0 est utilisée ! |
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330 | case MyRank is |
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331 | when x"0"=> |
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332 | Mygroup.grp<=x"0002";-- rank 1 |
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333 | MyGroup.nb<=2; |
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334 | destRank:=1; |
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335 | DestAdr:=X"043F"; |
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336 | nb_rma:=1; |
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337 | when x"1" => |
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338 | Mygroup.grp<=x"0001";-- rank 0 |
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339 | destRank:=0; |
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340 | DestAdr:=X"0440"; |
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341 | when x"2" => |
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342 | Mygroup.grp<=x"0001";-- rank 0 |
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343 | destRank:=0; |
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344 | DestAdr:=X"0473"; |
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345 | when x"3" => |
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346 | Mygroup.grp<=x"0001";-- rank 0 |
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347 | destRank:=0; |
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348 | DestAdr:=X"04A5"; |
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349 | when others => --cas des processus spawn |
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350 | Mygroup.grp<=x"0000";-- rank 0 |
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351 | DestAdr:=X"022F"; |
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352 | destRank:=0; |
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353 | end case; |
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354 | RunState<=WinPost; |
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355 | when WinPost => |
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356 | if ct=0 then |
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357 | -- synthesis translate_off |
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358 | write (l,string'("Dlen;"& integer'image(dlen) & ";WPost1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now)))); |
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359 | report l.all; |
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360 | writeline (f, l) ; |
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361 | -- synthesis translate_on |
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362 | end if; |
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363 | |
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364 | pMPI_Win_Post(ct,Libr,sram,MyGroup,0,MyWin); |
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365 | |
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366 | if ct=0 then |
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367 | RunState<=WinStart; |
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368 | -- synthesis translate_off |
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369 | write (l,string'("Dlen;"& integer'image(dlen) & ";WPost2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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370 | report l.all; |
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371 | writeline (f, l) ; |
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372 | -- synthesis translate_on |
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373 | end if; |
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374 | |
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375 | when WinStart => |
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376 | if ct=0 then |
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377 | -- synthesis translate_off |
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378 | write (l,string'("Dlen;" & integer'image(dlen) & ";WStart1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now)))); |
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379 | report l.all; |
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380 | writeline (f, l) ; |
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381 | -- synthesis translate_on |
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382 | end if; |
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383 | pMPI_Win_start(ct,Libr,sram,MyGroup,0,MyWin); |
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384 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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385 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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386 | |
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387 | dcount:=ct; |
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388 | |
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389 | if ct=0 then |
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390 | if spawn='0' then |
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391 | RunState<=PutData; |
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392 | else |
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393 | RunState<=WinCompleted; |
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394 | end if; |
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395 | -- synthesis translate_off |
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396 | write (l,string'("Dlen;" & integer'image(dlen) & ";WStart2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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397 | report l.all; |
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398 | writeline (f, l) ; |
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399 | -- synthesis translate_on |
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400 | end if; |
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401 | |
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402 | |
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403 | when putdata => --construire le packet pour le Put |
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404 | |
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405 | --dlen:=251; --- |
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406 | if ct=0 then |
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407 | -- synthesis translate_off |
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408 | write (l,string'("Dlen;" & integer'image(dlen) & ";PUT1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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409 | report l.all; |
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410 | writeline (f, l) ; |
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411 | -- synthesis translate_on |
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412 | end if; |
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413 | |
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414 | SrcAdr:=X"0105";--std_logic_vector(to_unsigned(DATAPTR,ADRLEN)); |
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415 | --DestAdr:=X"033F"; |
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416 | pMPI_put(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win); |
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417 | |
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418 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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419 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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420 | |
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421 | dcount:=ct; |
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422 | |
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423 | if ct=0 then |
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424 | RunState<=GetData; |
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425 | -- synthesis translate_off |
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426 | report "Put of Process n°; " & image(MyRank) & "; ended at ; " & real'image(rt(now)); |
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427 | write (l,string'("Dlen;" & integer'image(dlen) & ";PUT2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at time ; " & real'image(rt(now)))); |
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428 | report l.all; |
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429 | writeline (f, l) ; |
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430 | -- synthesis translate_on |
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431 | end if; |
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432 | |
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433 | |
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434 | when getdata => --positionnement du mot de longueur des données |
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435 | --dlen:=251; --- |
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436 | if ct=0 then |
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437 | -- synthesis translate_off |
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438 | write (l,string'("Dlen;" & integer'image(dlen) & ";GET1; " & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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439 | report l.all; |
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440 | writeline (f, l) ; |
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441 | -- synthesis translate_on |
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442 | end if; |
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443 | |
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444 | SrcAdr:=X"0104"; |
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445 | DestAdr:=X"1400"; |
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446 | if unsigned(MyRank) = 0 then |
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447 | --pMPI_GET(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win); |
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448 | else |
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449 | |
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450 | --pMPI_GET(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win); |
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451 | end if; |
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452 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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453 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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454 | |
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455 | dcount:=ct; |
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456 | |
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457 | if ct=0 then |
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458 | if unsigned(MyRank)/=0 then |
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459 | RunState<=wincompleted; |
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460 | else |
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461 | nb_rma:=nb_rma+1; |
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462 | if nb_rma=2 then |
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463 | RunState<=wincompleted; |
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464 | nb_rma:=0; |
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465 | end if; |
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466 | end if; |
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467 | -- synthesis translate_off |
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468 | assert ct/=0 report "GET_END " & integer'image(destrank) |
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469 | severity Warning ; |
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470 | write (l,string'("Dlen ;" & integer'image(dlen) & ";GET2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
471 | report l.all; |
---|
472 | |
---|
473 | writeline (f, l) ; |
---|
474 | -- synthesis translate_on |
---|
475 | end if; |
---|
476 | |
---|
477 | when WinCompleted => |
---|
478 | if ct=0 then |
---|
479 | -- synthesis translate_off |
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480 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Compl1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
---|
481 | report l.all; |
---|
482 | writeline (f, l) ; |
---|
483 | -- synthesis translate_on |
---|
484 | end if; |
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485 | pMPI_Win_Complete(ct,Libr,sram,MyWin ); |
---|
486 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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487 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
---|
488 | |
---|
489 | if ct=0 then |
---|
490 | RunState<=WinWait; |
---|
491 | -- synthesis translate_off |
---|
492 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Compl2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
493 | report l.all; |
---|
494 | writeline (f, l) ; |
---|
495 | -- synthesis translate_on |
---|
496 | |
---|
497 | end if; |
---|
498 | when WinWait => |
---|
499 | if ct=0 then |
---|
500 | -- synthesis translate_off |
---|
501 | write (l,string'("Dlen ;" & integer'image(dlen) & ";WAIT1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
---|
502 | report l.all; |
---|
503 | writeline (f, l) ; |
---|
504 | -- synthesis translate_on |
---|
505 | end if; |
---|
506 | pMPI_Win_wait(ct,Libr,sram,MyWin ); |
---|
507 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
---|
508 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
---|
509 | |
---|
510 | if ct=0 then |
---|
511 | if unsigned(Myrank)>1 or spawn='1' then |
---|
512 | RunState<=Finalize; |
---|
513 | else |
---|
514 | RunState<=GetCmd; |
---|
515 | end if; |
---|
516 | -- synthesis translate_off |
---|
517 | write (l,string'("Dlen ;" & integer'image(dlen) & ";WAIT2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
518 | report l.all; |
---|
519 | writeline (f, l) ; |
---|
520 | -- synthesis translate_on |
---|
521 | |
---|
522 | end if; |
---|
523 | when GetCmd=> |
---|
524 | adresse:=4; --adresse des paramètres |
---|
525 | readmem(ct,Libr,SRam,std_logic_vector(to_unsigned(adresse,ADRLEN)),param); |
---|
526 | if ct=0 then |
---|
527 | if unsigned(MyRank)=0 then |
---|
528 | if unsigned(param)=5 then |
---|
529 | Runstate<=MPISpawn; |
---|
530 | else |
---|
531 | Runstate<=MPISpawn; |
---|
532 | end if; |
---|
533 | else |
---|
534 | Runstate<=MPISpawn; |
---|
535 | end if; |
---|
536 | |
---|
537 | end if; |
---|
538 | when MpiSpawn => |
---|
539 | if ct=0 then |
---|
540 | -- synthesis translate_off |
---|
541 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Spawn1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
---|
542 | report l.all; |
---|
543 | writeline (f, l) ; |
---|
544 | -- synthesis translate_on |
---|
545 | end if; |
---|
546 | --(NextCtx : inout natural;signal Interf:inout Core_io;signal SysRam :inout typ_dpram; |
---|
547 | |
---|
548 | maxprocs:=2; |
---|
549 | pMPI_Comm_Spawn(ct,Libr,sram,command,argv,maxprocs,info,root,comm,intercomm,array_of_errcodes); |
---|
550 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
---|
551 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
---|
552 | |
---|
553 | if ct=0 then |
---|
554 | if unsigned(Myrank)=0 and spawn='0' then |
---|
555 | MyGroup.Grp<=x"000C"; |
---|
556 | spawn:='1'; |
---|
557 | Runstate<=WinPost; |
---|
558 | else |
---|
559 | RunState<=Finalize; |
---|
560 | end if; |
---|
561 | -- synthesis translate_off |
---|
562 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Spawn2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
563 | report l.all; |
---|
564 | writeline (f, l) ; |
---|
565 | -- synthesis translate_on |
---|
566 | |
---|
567 | end if; |
---|
568 | when finalize => |
---|
569 | if ct=0 then |
---|
570 | -- synthesis translate_off |
---|
571 | write (l,string'("Dlen ;" & integer'image(dlen) & ";FINALIZE1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
---|
572 | report l.all; |
---|
573 | writeline (f, l) ; |
---|
574 | -- synthesis translate_on |
---|
575 | end if; |
---|
576 | sram.O.we<='0'; |
---|
577 | sram.O.ena<='0'; |
---|
578 | sram.O.enb<='0'; |
---|
579 | if ct=0 then |
---|
580 | RunState<=start; |
---|
581 | -- synthesis translate_off |
---|
582 | write (l,string'("Dlen ;" & integer'image(dlen) & ";FINALIZE2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
583 | report l.all; |
---|
584 | writeline (f, l) ; |
---|
585 | file_close(f); |
---|
586 | fopened:='0'; |
---|
587 | -- synthesis translate_on |
---|
588 | end if; |
---|
589 | |
---|
590 | when st_timeout => |
---|
591 | |
---|
592 | sram.O.we<='0'; |
---|
593 | sram.O.ena<='0'; |
---|
594 | sram.O.enb<='0'; |
---|
595 | |
---|
596 | RunState<=start; |
---|
597 | end case; |
---|
598 | ct_state<=ct; --pour débogage |
---|
599 | --ct_out<=ct; |
---|
600 | end if; |
---|
601 | end if; |
---|
602 | |
---|
603 | end process pPutGet; |
---|
604 | --ct_out<=ct_state; |
---|
605 | ht_state<=runstate; |
---|
606 | out_proc:process(clk) |
---|
607 | variable compteur:natural; |
---|
608 | begin |
---|
609 | if rising_edge(clk) then |
---|
610 | if reset='1' then |
---|
611 | ct_out<=x"00"; |
---|
612 | compteur:=0; |
---|
613 | elsif compteur>=5000000 then |
---|
614 | compteur:=0; |
---|
615 | ct_out<=to_unsigned(ct_state,8); |
---|
616 | elsif compteur<=2500000 then |
---|
617 | ct_out<=to_unsigned(ct_state+128,8); |
---|
618 | compteur:=compteur+1; |
---|
619 | else |
---|
620 | ct_out<=to_unsigned(ct_state,8); |
---|
621 | compteur:=compteur+1; |
---|
622 | end if; |
---|
623 | end if; |
---|
624 | end process; |
---|
625 | end Behavioral; |
---|
626 | |
---|