1 | ---------------------------------------------------------------------------------- |
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2 | -- Company: |
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3 | -- Engineer: |
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4 | -- |
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5 | -- Create Date: 14:00:24 08/01/2013 |
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6 | -- Design Name: |
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7 | -- Module Name: Ex5_FSM - Behavioral |
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8 | -- Project Name: |
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9 | -- Target Devices: |
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10 | -- Tool versions: |
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11 | -- Description: |
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12 | -- |
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13 | -- Dependencies: |
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14 | -- |
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15 | -- Revision: |
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16 | -- Revision 0.01 - File Created |
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17 | -- Additional Comments: |
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18 | -- |
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19 | ---------------------------------------------------------------------------------- |
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20 | library IEEE; |
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21 | use IEEE.STD_LOGIC_1164.ALL; |
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22 | |
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23 | -- Uncomment the following library declaration if using |
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24 | -- arithmetic functions with Signed or Unsigned values |
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25 | --use IEEE.NUMERIC_STD.ALL; |
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26 | |
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27 | -- Uncomment the following library declaration if instantiating |
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28 | -- any Xilinx primitives in this code. |
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29 | --library UNISIM; |
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30 | --use UNISIM.VComponents.all; |
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31 | |
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32 | entity Ex5_FSM is |
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33 | Port ( clk : in STD_LOGIC; |
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34 | reset : in STD_LOGIC; |
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35 | |
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36 | SpawnOn : in STD_LOGIC; |
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37 | NocPortFree : in STD_LOGIC; |
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38 | InterCSet : in STD_LOGIC; |
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39 | TaskLoaded : in STD_LOGIC; |
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40 | TaskInit : in STD_LOGIC; |
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41 | TaskOn : in STD_LOGIC; |
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42 | TimeOut : out STD_LOGIC; |
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43 | DataReceived : in STD_LOGIC_VECTOR (7 downto 0); |
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44 | DataToSend : out STD_LOGIC_VECTOR (7 downto 0)); |
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45 | end Ex5_FSM; |
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46 | |
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47 | architecture Behavioral of Ex5_FSM is |
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48 | type Spawn_type is (Init,CheckFree,LoadTask,CountTask,StartTask,WaitTaskInit,SetGroup,SetInterCom,RetInterCom,ErrSpawn,EndSpawn); |
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49 | signal spawn_st, next_spawn : spawn_type; |
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50 | begin |
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51 | --Insert the following in the architecture after the begin keyword |
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52 | SYNC_spawn: process (clk) |
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53 | begin |
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54 | if (clk'event and clk = '1') then |
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55 | if (reset = '1') then |
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56 | spawn_st <= init; |
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57 | |
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58 | else |
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59 | spawn_st <= next_spawn; |
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60 | --<output> <= <output>_i; |
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61 | -- assign other outputs to internal signals |
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62 | end if; |
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63 | end if; |
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64 | end process; |
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65 | |
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66 | --MOORE State-Machine - Outputs based on state only |
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67 | OUTPUT_DECODE: process (Spawn_st) |
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68 | begin |
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69 | --insert statements to decode internal output signals |
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70 | --below is simple example |
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71 | case (spawn_st) is |
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72 | when init => |
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73 | |
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74 | when CheckFree => |
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75 | |
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76 | when LoadTask => |
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77 | |
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78 | when StartTask => |
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79 | |
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80 | when CountTask => |
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81 | |
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82 | when WaitAllTaskInit => |
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83 | |
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84 | when SetGroup => |
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85 | |
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86 | when SetInterCom => |
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87 | |
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88 | when RetInterCom => |
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89 | |
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90 | when EndSpawn => |
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91 | |
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92 | when others => |
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93 | |
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94 | end case; |
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95 | end process; |
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96 | |
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97 | NEXT_STATE_DECODE: process (spawn_st, spawnOn,Datareceived) |
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98 | begin |
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99 | --declare default state for next_state to avoid latches |
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100 | next_spawn <= spawn_st; --default is to stay in current state |
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101 | --insert statements to decode next_state |
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102 | --below is a simple example |
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103 | case (spawn_st) is |
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104 | when init => |
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105 | if spawnOn = '1' then |
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106 | next_spawn <= Checkfree; |
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107 | end if; |
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108 | when CheckFree => |
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109 | if NoCPortFree = '1' then |
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110 | next_spawn<= LoadTask; |
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111 | end if; |
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112 | when LoadTask => |
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113 | next_spawn <= CountTask; |
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114 | when StartTask => |
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115 | if TaskInit = '1' then |
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116 | next_spawn <= WaitAllTaskInit; |
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117 | end if; |
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118 | when WaitAllTaskInit => |
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119 | if InterComSet = '1' then |
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120 | next_spawn <= SetGroup; |
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121 | end if; |
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122 | when SetGroup => |
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123 | if InterComSet = '1' then |
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124 | next_spawn <= SetInterCom ; |
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125 | end if; |
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126 | when SetInterCom => |
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127 | if InterComSet = '1' then |
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128 | next_spawn <= RetInterCom ; |
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129 | end if; |
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130 | when RetInterCom => |
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131 | if AppAck = '1' then |
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132 | next_spawn <= EndSpawn; |
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133 | end if; |
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134 | when others => |
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135 | next_spawn <= init; |
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136 | end case; |
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137 | end process; |
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138 | |
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139 | |
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140 | end Behavioral; |
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141 | |
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