Last change
on this file since 125 was
115,
checked in by rolagamo, 10 years ago
|
Ajout des Cores utilisés dans le projet
|
File size:
755 bytes
|
Rev | Line | |
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[115] | 1 | <?xml version="1.0" encoding="UTF-8"?> |
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| 2 | <!-- IMPORTANT: This is an internal file that has been generated --> |
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| 3 | <!-- by the Xilinx ISE software. Any direct editing or --> |
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| 4 | <!-- changes made to this file may result in unpredictable --> |
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| 5 | <!-- behavior or data corruption. It is strongly advised that --> |
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| 6 | <!-- users do not edit the contents of this file. --> |
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| 7 | <!-- --> |
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| 8 | <!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --> |
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| 9 | |
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| 10 | <messages> |
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| 11 | <msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file "D:/MPI_HCL/Test_Timer/ipcore_dir/mem_4k8.vhd" into library work</arg> |
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| 12 | </msg> |
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| 13 | |
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| 14 | </messages> |
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| 15 | |
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