source: PROJECT_CORE_MPI/MPI_HCL/TRUNK/Test_Timer/ipcore_dir/mem8k8_ste/example_design/mem8k8_top.xdc @ 115

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# Core Period Constraint. This constraint can be modified, and is
# valid as long as it is met after place and route.
create_clock -name "TS_CLKA" -period 20.0 [ get_ports CLKA ]
  
create_clock -name "TS_CLKB" -period 20.0 [ get_ports CLKB ]
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