source: PROJECT_CORE_MPI/SWITCH_GEN/BRANCHES/v0.02/SCHEDULER4_4.VHD

Last change on this file was 22, checked in by rolagamo, 12 years ago
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1---------------------------------------------------------------------------------
2-- Company:
3-- Engineer: KIEGAING EMMANUEL GEL EN 5
4--
5-- Create Date:    03:56:34 05/06/2011
6-- Design Name:
7-- Module Name:    Sheduler - Behavioral
8-- Project Name:
9-- Target Devices:
10-- Tool versions:
11-- Description: Module de l'ordonnanceur du switch crossbar
12-- l'algorithme utilisée est le DPA (diagonal propagation arbiter)
13--
14-- Dependencies:
15--
16-- Revision:
17-- Revision 0.01 - File Created
18-- Additional Comments:
19--
20----------------------------------------------------------------------------------
21library IEEE;
22use IEEE.STD_LOGIC_1164.ALL;
23use IEEE.STD_LOGIC_ARITH.ALL;
24use IEEE.STD_LOGIC_UNSIGNED.ALL;
25--use Work.Sheduler_package.all;
26
27---- Uncomment the following library declaration if instantiating
28---- any Xilinx primitives in this code.
29--library UNISIM;
30--use UNISIM.VComponents.all;
31entity Scheduler4_4 is
32    Port ( Request : in  STD_LOGIC_VECTOR (16 downto 1);
33                   Fifo_full : in STD_LOGIC_VECTOR (4 downto 1);
34           clk : in  STD_LOGIC;
35           reset : in  STD_LOGIC;
36            priority_rotation : in  STD_LOGIC_VECTOR (4 downto 1);
37           port_grant : out  STD_LOGIC_VECTOR (16 downto 1));
38end Scheduler4_4;
39
40architecture Behavioral of Scheduler4_4 is
41--Declaration du types
42--tableau de signaux de connexion des cellules arbitres
43TYPE C_Bar_Signal_Array IS ARRAY(7 downto 1) of STD_LOGIC_VECTOR(4 downto 1);
44-- declaration du composant cellule d'arbitrage
45Component Arbiter
46  PORT (P, Fifo_full,Request, West,North : in  STD_LOGIC;
47        Grant,East,South : out  STD_LOGIC );
48End Component;--Signaux de connexion des cellues
49SIGNAL south_2_north :  C_Bar_Signal_Array; -- connexion south north
50SIGNAL east_2_west   :  C_Bar_Signal_Array; -- connexion east west
51SIGNAL Signal_mask      : C_Bar_Signal_Array;-- connexion des masques de priorité
52SIGNAL Signal_grant     : C_Bar_Signal_Array;-- connexion des signaux de validation
53SIGNAL Signal_priority  : STD_LOGIC_VECTOR (7 DOWNTO 1);--signal pour la connection des vecteur de priorité
54SIGNAL High         : std_logic;--niveau pour les cellules des extremités nord et ouest
55 signal grant_latch,req_grant: std_logic_vector(16 downto 1);
56 signal priority_rotation_en : std_logic;
57 signal Grant :  std_logic_vector(16 downto 1);
58 begin
59
60--validation de la rotation de priorité lorsque aucun port n'emet
61req_grant<=(request and grant_latch);
62 priority_rotation_en <= '1' when unsigned(req_grant) = 0 or unsigned(priority_rotation) = 15 else      '0';
63
64--latch  qui memorise le signal grant pendant la transmission
65grant_latch_process : process(clk)
66 begin
67  if rising_edge(clk) then
68   if reset = '1' then
69                grant_latch <= (others => '0');
70         elsif priority_rotation_en = '1' then
71           grant_latch <= Grant;
72   end if;
73   end if;
74 end process;
75 port_grant <=  grant_latch;
76 Grant(1)  <= Signal_grant(1)(1) or Signal_grant(5)(1); --  Grant(1,1)
77Grant(2)  <= Signal_grant(2)(2) or Signal_grant(6)(2); --  Grant(1,2)
78Grant(3)  <= Signal_grant(3)(3) or Signal_grant(7)(3); --  Grant(1,3)
79Grant(4)  <= Signal_grant(4)(4) ;                      --  Grant(1,4)
80Grant(5)  <= Signal_grant(2)(1) or Signal_grant(6)(1); --  Grant(2,1)
81Grant(6)  <= Signal_grant(3)(2) or Signal_grant(7)(2); --  Grant(2,2)
82Grant(7)  <= Signal_grant(4)(3) ;                      --  Grant(2,3)
83Grant(8)  <= Signal_grant(1)(4) or Signal_grant(5)(4); --  Grant(2,4)
84Grant(9)  <= Signal_grant(3)(1) or Signal_grant(7)(1); --  Grant(3,1)
85Grant(10)  <= Signal_grant(4)(2) ;                      --  Grant(3,2)
86Grant(11)  <= Signal_grant(1)(3) or Signal_grant(5)(3); --  Grant(3,3)
87Grant(12)  <= Signal_grant(2)(4) or Signal_grant(6)(4); --  Grant(3,4)
88Grant(13)  <= Signal_grant(4)(1) ;                      --  Grant(4,1)
89Grant(14)  <= Signal_grant(1)(2) or Signal_grant(5)(2); --  Grant(4,2)
90Grant(15)  <= Signal_grant(2)(3) or Signal_grant(6)(3); --  Grant(4,3)
91Grant(16)  <= Signal_grant(3)(4) or Signal_grant(7)(4); --  Grant(4,4)
92High <= '1';
93
94----instantiations des cellules arbitres et interconnection
95
96-------------------------- Diagonale n° 1
97
98
99Arbiter_1_1 : Arbiter
100
101PORT MAP (Request => Request(1), North => High, West => High, P => Signal_priority(7), Fifo_full => Fifo_full(1), 
102South => south_2_north(1)(1), East => east_2_west(1)(1) , Grant => Signal_grant(1)(1));
103
104Arbiter_1_2 : Arbiter
105
106PORT MAP (Request => Request(14), North => High, West => High, P => Signal_priority(7), Fifo_full => Fifo_full(2), 
107South => south_2_north(1)(2), East => east_2_west(1)(2) , Grant => Signal_grant(1)(2));
108
109Arbiter_1_3 : Arbiter
110
111PORT MAP (Request => Request(11), North => High, West => High, P => Signal_priority(7), Fifo_full => Fifo_full(3), 
112South => south_2_north(1)(3), East => east_2_west(1)(3) , Grant => Signal_grant(1)(3));
113
114Arbiter_1_4 : Arbiter
115
116PORT MAP (Request => Request(8), North => High, West => High, P => Signal_priority(7), Fifo_full => Fifo_full(4), 
117South => south_2_north(1)(4), East => east_2_west(1)(4) , Grant => Signal_grant(1)(4));
118
119-------------------------- Diagonale n° 2
120
121
122Arbiter_2_1 : Arbiter
123
124PORT MAP (Request => Request(5), North => south_2_north(1)(1), West => east_2_west(1)(4), P => Signal_priority(6), Fifo_full => Fifo_full(1), 
125South => south_2_north(2)(1), East => east_2_west(2)(1) , Grant => Signal_grant(2)(1));
126
127Arbiter_2_2 : Arbiter
128
129PORT MAP (Request => Request(2), North => south_2_north(1)(2), West => east_2_west(1)(1), P => Signal_priority(6), Fifo_full => Fifo_full(2), 
130South => south_2_north(2)(2), East => east_2_west(2)(2) , Grant => Signal_grant(2)(2));
131
132Arbiter_2_3 : Arbiter
133
134PORT MAP (Request => Request(15), North => south_2_north(1)(3), West => east_2_west(1)(2), P => Signal_priority(6), Fifo_full => Fifo_full(3), 
135South => south_2_north(2)(3), East => east_2_west(2)(3) , Grant => Signal_grant(2)(3));
136
137Arbiter_2_4 : Arbiter
138
139PORT MAP (Request => Request(12), North => south_2_north(1)(4), West => east_2_west(1)(3), P => Signal_priority(6), Fifo_full => Fifo_full(4), 
140South => south_2_north(2)(4), East => east_2_west(2)(4) , Grant => Signal_grant(2)(4));
141
142-------------------------- Diagonale n° 3
143
144
145Arbiter_3_1 : Arbiter
146
147PORT MAP (Request => Request(9), North => south_2_north(2)(1), West => east_2_west(2)(4), P => Signal_priority(5), Fifo_full => Fifo_full(1), 
148South => south_2_north(3)(1), East => east_2_west(3)(1) , Grant => Signal_grant(3)(1));
149
150Arbiter_3_2 : Arbiter
151
152PORT MAP (Request => Request(6), North => south_2_north(2)(2), West => east_2_west(2)(1), P => Signal_priority(5), Fifo_full => Fifo_full(2), 
153South => south_2_north(3)(2), East => east_2_west(3)(2) , Grant => Signal_grant(3)(2));
154
155Arbiter_3_3 : Arbiter
156
157PORT MAP (Request => Request(3), North => south_2_north(2)(3), West => east_2_west(2)(2), P => Signal_priority(5), Fifo_full => Fifo_full(3), 
158South => south_2_north(3)(3), East => east_2_west(3)(3) , Grant => Signal_grant(3)(3));
159
160Arbiter_3_4 : Arbiter
161
162PORT MAP (Request => Request(16), North => south_2_north(2)(4), West => east_2_west(2)(3), P => Signal_priority(5), Fifo_full => Fifo_full(4), 
163South => south_2_north(3)(4), East => east_2_west(3)(4) , Grant => Signal_grant(3)(4));
164
165-------------------------- Diagonale n° 4
166
167
168Arbiter_4_1 : Arbiter
169
170PORT MAP (Request => Request(13), North => south_2_north(3)(1), West => east_2_west(3)(4), P => Signal_priority(4), Fifo_full => Fifo_full(1), 
171South => south_2_north(4)(1), East => east_2_west(4)(1) , Grant => Signal_grant(4)(1));
172
173Arbiter_4_2 : Arbiter
174
175PORT MAP (Request => Request(10), North => south_2_north(3)(2), West => east_2_west(3)(1), P => Signal_priority(4), Fifo_full => Fifo_full(2), 
176South => south_2_north(4)(2), East => east_2_west(4)(2) , Grant => Signal_grant(4)(2));
177
178Arbiter_4_3 : Arbiter
179
180PORT MAP (Request => Request(7), North => south_2_north(3)(3), West => east_2_west(3)(2), P => Signal_priority(4), Fifo_full => Fifo_full(3), 
181South => south_2_north(4)(3), East => east_2_west(4)(3) , Grant => Signal_grant(4)(3));
182
183Arbiter_4_4 : Arbiter
184
185PORT MAP (Request => Request(4), North => south_2_north(3)(4), West => east_2_west(3)(3), P => Signal_priority(4), Fifo_full => Fifo_full(4), 
186South => south_2_north(4)(4), East => east_2_west(4)(4) , Grant => Signal_grant(4)(4));
187
188-------------------------- Diagonale n° 5
189
190
191Arbiter_5_1 : Arbiter
192
193PORT MAP (Request => Request(1), North => south_2_north(4)(1), West => east_2_west(4)(4), P => Signal_priority(3), Fifo_full => Fifo_full(1), 
194South => south_2_north(5)(1), East => east_2_west(5)(1) , Grant => Signal_grant(5)(1));
195
196Arbiter_5_2 : Arbiter
197
198PORT MAP (Request => Request(14), North => south_2_north(4)(2), West => east_2_west(4)(1), P => Signal_priority(3), Fifo_full => Fifo_full(2), 
199South => south_2_north(5)(2), East => east_2_west(5)(2) , Grant => Signal_grant(5)(2));
200
201Arbiter_5_3 : Arbiter
202
203PORT MAP (Request => Request(11), North => south_2_north(4)(3), West => east_2_west(4)(2), P => Signal_priority(3), Fifo_full => Fifo_full(3), 
204South => south_2_north(5)(3), East => east_2_west(5)(3) , Grant => Signal_grant(5)(3));
205
206Arbiter_5_4 : Arbiter
207
208PORT MAP (Request => Request(8), North => south_2_north(4)(4), West => east_2_west(4)(3), P => Signal_priority(3), Fifo_full => Fifo_full(4), 
209South => south_2_north(5)(4), East => east_2_west(5)(4) , Grant => Signal_grant(5)(4));
210
211-------------------------- Diagonale n° 6
212
213
214Arbiter_6_1 : Arbiter
215
216PORT MAP (Request => Request(5), North => south_2_north(5)(1), West => east_2_west(5)(4), P => Signal_priority(2), Fifo_full => Fifo_full(1), 
217South => south_2_north(6)(1), East => east_2_west(6)(1) , Grant => Signal_grant(6)(1));
218
219Arbiter_6_2 : Arbiter
220
221PORT MAP (Request => Request(2), North => south_2_north(5)(2), West => east_2_west(5)(1), P => Signal_priority(2), Fifo_full => Fifo_full(2), 
222South => south_2_north(6)(2), East => east_2_west(6)(2) , Grant => Signal_grant(6)(2));
223
224Arbiter_6_3 : Arbiter
225
226PORT MAP (Request => Request(15), North => south_2_north(5)(3), West => east_2_west(5)(2), P => Signal_priority(2), Fifo_full => Fifo_full(3), 
227South => south_2_north(6)(3), East => east_2_west(6)(3) , Grant => Signal_grant(6)(3));
228
229Arbiter_6_4 : Arbiter
230
231PORT MAP (Request => Request(12), North => south_2_north(5)(4), West => east_2_west(5)(3), P => Signal_priority(2), Fifo_full => Fifo_full(4), 
232South => south_2_north(6)(4), East => east_2_west(6)(4) , Grant => Signal_grant(6)(4));
233
234-------------------------- Diagonale n° 7
235
236
237Arbiter_7_1 : Arbiter
238
239PORT MAP (Request => Request(9), North => south_2_north(6)(1), West => east_2_west(6)(4), P => Signal_priority(1), Fifo_full => Fifo_full(1), 
240South => south_2_north(7)(1), East => east_2_west(7)(1) , Grant => Signal_grant(7)(1));
241
242Arbiter_7_2 : Arbiter
243
244PORT MAP (Request => Request(6), North => south_2_north(6)(2), West => east_2_west(6)(1), P => Signal_priority(1), Fifo_full => Fifo_full(2), 
245South => south_2_north(7)(2), East => east_2_west(7)(2) , Grant => Signal_grant(7)(2));
246
247Arbiter_7_3 : Arbiter
248
249PORT MAP (Request => Request(3), North => south_2_north(6)(3), West => east_2_west(6)(2), P => Signal_priority(1), Fifo_full => Fifo_full(3), 
250South => south_2_north(7)(3), East => east_2_west(7)(3) , Grant => Signal_grant(7)(3));
251
252Arbiter_7_4 : Arbiter
253
254PORT MAP (Request => Request(16), North => south_2_north(6)(4), West => east_2_west(6)(3), P => Signal_priority(1), Fifo_full => Fifo_full(4), 
255South => south_2_north(7)(4), East => east_2_west(7)(4) , Grant => Signal_grant(7)(4));
256
257
258--processus permettant de roter la priorité des diagonales à chaque front d'horloge
259 -- rotation round robin
260         round_robin : process(clk)
261        begin
262                if rising_edge(clk) then
263                 if reset ='1' then
264                    Signal_priority <= "1111000";
265                  elsif priority_rotation_en = '1' then
266                    case Signal_priority is
267                       when "1111000" => Signal_priority <= "0111100";
268                       when "0111100" => Signal_priority <= "0011110";
269                       when "0011110" => Signal_priority <= "0001111";
270                       when "0001111" => Signal_priority <= "1111000";
271                       when others    => Signal_priority <= "1111000";
272                  end case;
273                 end if;
274             end if;
275         end process;
276
277end Behavioral;
278
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