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Crossbar.vhd @ 98

Last change on this file since 98 was 22, checked in by rolagamo, 12 years ago

File size: 115.3 KB

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1	----------------------------------------------------------------------------------
2	-- Company:
3	-- Engineer: KIEGAING EMMANUEL
4	--
5	-- Create Date: 11:48:18 06/19/2011
6	-- Design Name:
7	-- Module Name: Crossbar - Behavioral
8	-- Project Name:
9	-- Target Devices:
10	-- Tool versions:
11	-- Description: module implémentant les crossbar
12	-- ce module instacie les crossbar 1 bit du fichier crossbit.vhd
13	--
14	-- CROSSBAR GENERIQUE
15	-- Revision: 1.0
16	-- a été retiré les signaux inutilisées comme fp, port_source, etc...
17	-- Revision 0.01 - File Created
18	-- Additional Comments:
19	--
20	----------------------------------------------------------------------------------
21	library IEEE;
22	use IEEE.STD_LOGIC_1164.ALL;
23	use IEEE.STD_LOGIC_ARITH.ALL;
24	use IEEE.STD_LOGIC_UNSIGNED.ALL;
25	library NocLib ;
26	use NocLib.CoreTypes.all;
27	---- Uncomment the following library declaration if instantiating
28	---- any Xilinx primitives in this code.
29	--library UNISIM;
30	--use UNISIM.VComponents.all;
31
32	entity Crossbar is
33	generic
34	(
35	number_of_crossbar_ports: positive := 4
36	);
37	Port ( Port1_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
38	Port2_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
39	Port3_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
40	Port4_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
41	Port5_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
42	Port6_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
43	Port7_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
44	Port8_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
45	Port9_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
46	Port10_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
47	Port11_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
48	Port12_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
49	Port13_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
50	Port14_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
51	Port15_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
52	Port16_in : in STD_LOGIC_VECTOR (Word-1 downto 0);
53
54	Port1_pulse_in : in std_logic;
55	Port2_pulse_in : in std_logic;
56	Port3_pulse_in : in std_logic;
57	Port4_pulse_in : in std_logic;
58	Port5_pulse_in : in std_logic;
59	Port6_pulse_in : in std_logic;
60	Port7_pulse_in : in std_logic;
61	Port8_pulse_in : in std_logic;
62	Port9_pulse_in : in std_logic;
63	Port10_pulse_in : in std_logic;
64	Port11_pulse_in : in std_logic;
65	Port12_pulse_in : in std_logic;
66	Port13_pulse_in : in std_logic;
67	Port14_pulse_in : in std_logic;
68	Port15_pulse_in : in std_logic;
69	Port16_pulse_in : in std_logic;
70
71	Port1_pulse_out : out std_logic;
72	Port2_pulse_out : out std_logic;
73	Port3_pulse_out : out std_logic;
74	Port4_pulse_out : out std_logic;
75	Port5_pulse_out : out std_logic;
76	Port6_pulse_out : out std_logic;
77	Port7_pulse_out : out std_logic;
78	Port8_pulse_out : out std_logic;
79	Port9_pulse_out : out std_logic;
80	Port10_pulse_out : out std_logic;
81	Port11_pulse_out : out std_logic;
82	Port12_pulse_out : out std_logic;
83	Port13_pulse_out : out std_logic;
84	Port14_pulse_out : out std_logic;
85	Port15_pulse_out : out std_logic;
86	Port16_pulse_out : out std_logic;
87
88	Port1_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
89	Port2_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
90	Port3_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
91	Port4_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
92	Port5_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
93	Port6_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
94	Port7_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
95	Port8_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
96	Port9_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
97	Port10_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
98	Port11_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
99	Port12_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
100	Port13_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
101	Port14_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
102	Port15_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
103	Port16_out : out STD_LOGIC_VECTOR (Word-1 downto 0);
104
105	Ctrl : in STD_LOGIC_VECTOR (number_of_crossbar_ports*number_of_crossbar_ports downto 1)
106	);
107	end Crossbar;
108
109	architecture Behavioral of Crossbar is
110
111	-- declaration du crossbar un bit instanciés pour former les crossbars
112	COMPONENT Crossbit
113	generic
114	(
115	number_of_ports : positive := 4
116	);
117	Port ( Control : in STD_LOGIC_VECTOR (number_of_ports*number_of_ports downto 1);
118	Data_In : in STD_LOGIC_VECTOR (number_of_ports downto 1);
119	Data_out : out STD_LOGIC_VECTOR (number_of_ports downto 1));
120	END COMPONENT;
121
122	begin
123	-- La matrice interconnectee
124	-- le circuit genere depend du parametre generique nombre de ports
125
126	--======================crossbar 2 ports=======================
127
128	crossbar2x2 : if number_of_crossbar_ports = 2 generate
129
130	-- crossbit du bit 0 de donnée
131
132	Data0_Crossbit: Crossbit
133	GENERIC MAP(number_of_ports => 2)
134	PORT MAP(
135
136	Control => Ctrl,
137	Data_In(1) => Port1_in(0),
138	Data_In(2) => Port2_in(0),
139	Data_out(1)=> Port1_out(0),
140	Data_out(2)=> Port2_out(0)
141
142	);
143	-- crossbit du bit 1 de donnée
144
145	Data1_Crossbit: Crossbit
146	GENERIC MAP(number_of_ports => 2)
147	PORT MAP(
148
149	Control => Ctrl,
150	Data_In(1) => Port1_in(1),
151	Data_In(2) => Port2_in(1),
152	Data_out(1)=> Port1_out(1),
153	Data_out(2)=> Port2_out(1)
154
155	);
156	-- crossbit du bit 2 de donnée
157
158	Data2_Crossbit: Crossbit
159	GENERIC MAP(number_of_ports => 2)
160	PORT MAP(
161
162	Control => Ctrl,
163	Data_In(1) => Port1_in(2),
164	Data_In(2) => Port2_in(2),
165	Data_out(1)=> Port1_out(2),
166	Data_out(2)=> Port2_out(2)
167
168	);
169	-- crossbit du bit 3 de donnée
170
171	Data3_Crossbit: Crossbit
172	GENERIC MAP(number_of_ports => 2)
173	PORT MAP(
174
175	Control => Ctrl,
176	Data_In(1) => Port1_in(3),
177	Data_In(2) => Port2_in(3),
178	Data_out(1)=> Port1_out(3),
179	Data_out(2)=> Port2_out(3)
180
181	);
182	-- crossbit du bit 4 de donnée
183
184	Data4_Crossbit: Crossbit
185	GENERIC MAP(number_of_ports => 2)
186	PORT MAP(
187
188	Control => Ctrl,
189	Data_In(1) => Port1_in(4),
190	Data_In(2) => Port2_in(4),
191	Data_out(1)=> Port1_out(4),
192	Data_out(2)=> Port2_out(4)
193
194	);
195	-- crossbit du bit 5 de donnée
196
197	Data5_Crossbit: Crossbit
198	GENERIC MAP(number_of_ports => 2)
199	PORT MAP(
200
201	Control => Ctrl,
202	Data_In(1) => Port1_in(5),
203	Data_In(2) => Port2_in(5),
204	Data_out(1)=> Port1_out(5),
205	Data_out(2)=> Port2_out(5)
206
207	);
208	-- crossbit du bit 6 de donnée
209
210	Data6_Crossbit: Crossbit
211	GENERIC MAP(number_of_ports => 2)
212	PORT MAP(
213
214	Control => Ctrl,
215	Data_In(1) => Port1_in(6),
216	Data_In(2) => Port2_in(6),
217	Data_out(1)=> Port1_out(6),
218	Data_out(2)=> Port2_out(6)
219
220	);
221	-- crossbit du bit 7 de donnée
222
223	Data7_Crossbit: Crossbit
224	GENERIC MAP(number_of_ports => 2)
225	PORT MAP(
226
227	Control => Ctrl,
228	Data_In(1) => Port1_in(7),
229	Data_In(2) => Port2_in(7),
230	Data_out(1)=> Port1_out(7),
231	Data_out(2)=> Port2_out(7)
232
233	);
234	-- crossbit du pulse_out 2 ports
235
236	Pulse_out_Crossbit2: Crossbit
237	GENERIC MAP(number_of_ports => 2)
238	PORT MAP(
239
240	Control => Ctrl,
241	Data_In(1) => Port1_pulse_in,
242	Data_In(2) => Port2_pulse_in,
243	Data_out(1) => Port1_pulse_out,
244	Data_out(2) => Port2_pulse_out
245
246	);
247	end generate crossbar2x2;
248
249
250	--======================crossbar 3 ports=======================
251
252	crossbar3x3 : if number_of_crossbar_ports = 3 generate
253
254	-- crossbit du bit 0 de donnée
255
256	Data0_Crossbit: Crossbit
257	GENERIC MAP(number_of_ports => 3)
258	PORT MAP(
259
260	Control => Ctrl,
261	Data_In(1) => Port1_in(0),
262	Data_In(2) => Port2_in(0),
263	Data_In(3) => Port3_in(0),
264	Data_out(1)=> Port1_out(0),
265	Data_out(2)=> Port2_out(0),
266	Data_out(3)=> Port3_out(0)
267
268	);
269	-- crossbit du bit 1 de donnée
270
271	Data1_Crossbit: Crossbit
272	GENERIC MAP(number_of_ports => 3)
273	PORT MAP(
274
275	Control => Ctrl,
276	Data_In(1) => Port1_in(1),
277	Data_In(2) => Port2_in(1),
278	Data_In(3) => Port3_in(1),
279	Data_out(1)=> Port1_out(1),
280	Data_out(2)=> Port2_out(1),
281	Data_out(3)=> Port3_out(1)
282
283	);
284	-- crossbit du bit 2 de donnée
285
286	Data2_Crossbit: Crossbit
287	GENERIC MAP(number_of_ports => 3)
288	PORT MAP(
289
290	Control => Ctrl,
291	Data_In(1) => Port1_in(2),
292	Data_In(2) => Port2_in(2),
293	Data_In(3) => Port3_in(2),
294	Data_out(1)=> Port1_out(2),
295	Data_out(2)=> Port2_out(2),
296	Data_out(3)=> Port3_out(2)
297
298	);
299	-- crossbit du bit 3 de donnée
300
301	Data3_Crossbit: Crossbit
302	GENERIC MAP(number_of_ports => 3)
303	PORT MAP(
304
305	Control => Ctrl,
306	Data_In(1) => Port1_in(3),
307	Data_In(2) => Port2_in(3),
308	Data_In(3) => Port3_in(3),
309	Data_out(1)=> Port1_out(3),
310	Data_out(2)=> Port2_out(3),
311	Data_out(3)=> Port3_out(3)
312
313	);
314	-- crossbit du bit 4 de donnée
315
316	Data4_Crossbit: Crossbit
317	GENERIC MAP(number_of_ports => 3)
318	PORT MAP(
319
320	Control => Ctrl,
321	Data_In(1) => Port1_in(4),
322	Data_In(2) => Port2_in(4),
323	Data_In(3) => Port3_in(4),
324	Data_out(1)=> Port1_out(4),
325	Data_out(2)=> Port2_out(4),
326	Data_out(3)=> Port3_out(4)
327
328	);
329	-- crossbit du bit 5 de donnée
330
331	Data5_Crossbit: Crossbit
332	GENERIC MAP(number_of_ports => 3)
333	PORT MAP(
334
335	Control => Ctrl,
336	Data_In(1) => Port1_in(5),
337	Data_In(2) => Port2_in(5),
338	Data_In(3) => Port3_in(5),
339	Data_out(1)=> Port1_out(5),
340	Data_out(2)=> Port2_out(5),
341	Data_out(3)=> Port3_out(5)
342
343	);
344	-- crossbit du bit 6 de donnée
345
346	Data6_Crossbit: Crossbit
347	GENERIC MAP(number_of_ports => 3)
348	PORT MAP(
349
350	Control => Ctrl,
351	Data_In(1) => Port1_in(6),
352	Data_In(2) => Port2_in(6),
353	Data_In(3) => Port3_in(6),
354	Data_out(1)=> Port1_out(6),
355	Data_out(2)=> Port2_out(6),
356	Data_out(3)=> Port3_out(6)
357
358	);
359	-- crossbit du bit 7 de donnée
360
361	Data7_Crossbit: Crossbit
362	GENERIC MAP(number_of_ports => 3)
363	PORT MAP(
364
365	Control => Ctrl,
366	Data_In(1) => Port1_in(7),
367	Data_In(2) => Port2_in(7),
368	Data_In(3) => Port3_in(7),
369	Data_out(1)=> Port1_out(7),
370	Data_out(2)=> Port2_out(7),
371	Data_out(3)=> Port3_out(7)
372
373	);
374	-- crossbit du pulse_out 3 ports
375
376	Pulse_out_Crossbit3: Crossbit
377	GENERIC MAP(number_of_ports => 3)
378	PORT MAP(
379
380	Control => Ctrl,
381	Data_In(1) => Port1_pulse_in,
382	Data_In(2) => Port2_pulse_in,
383	Data_In(3) => Port3_pulse_in,
384	Data_out(1) => Port1_pulse_out,
385	Data_out(2) => Port2_pulse_out,
386	Data_out(3) => Port3_pulse_out
387
388	);
389	end generate crossbar3x3;
390
391
392	--======================crossbar 4 ports=======================
393
394	crossbar4x4 : if number_of_crossbar_ports = 4 generate
395
396	-- crossbit du bit 0 de donnée
397
398	Data0_Crossbit: Crossbit
399	GENERIC MAP(number_of_ports => 4)
400	PORT MAP(
401
402	Control => Ctrl,
403	Data_In(1) => Port1_in(0),
404	Data_In(2) => Port2_in(0),
405	Data_In(3) => Port3_in(0),
406	Data_In(4) => Port4_in(0),
407	Data_out(1)=> Port1_out(0),
408	Data_out(2)=> Port2_out(0),
409	Data_out(3)=> Port3_out(0),
410	Data_out(4)=> Port4_out(0)
411
412	);
413	-- crossbit du bit 1 de donnée
414
415	Data1_Crossbit: Crossbit
416	GENERIC MAP(number_of_ports => 4)
417	PORT MAP(
418
419	Control => Ctrl,
420	Data_In(1) => Port1_in(1),
421	Data_In(2) => Port2_in(1),
422	Data_In(3) => Port3_in(1),
423	Data_In(4) => Port4_in(1),
424	Data_out(1)=> Port1_out(1),
425	Data_out(2)=> Port2_out(1),
426	Data_out(3)=> Port3_out(1),
427	Data_out(4)=> Port4_out(1)
428
429	);
430	-- crossbit du bit 2 de donnée
431
432	Data2_Crossbit: Crossbit
433	GENERIC MAP(number_of_ports => 4)
434	PORT MAP(
435
436	Control => Ctrl,
437	Data_In(1) => Port1_in(2),
438	Data_In(2) => Port2_in(2),
439	Data_In(3) => Port3_in(2),
440	Data_In(4) => Port4_in(2),
441	Data_out(1)=> Port1_out(2),
442	Data_out(2)=> Port2_out(2),
443	Data_out(3)=> Port3_out(2),
444	Data_out(4)=> Port4_out(2)
445
446	);
447	-- crossbit du bit 3 de donnée
448
449	Data3_Crossbit: Crossbit
450	GENERIC MAP(number_of_ports => 4)
451	PORT MAP(
452
453	Control => Ctrl,
454	Data_In(1) => Port1_in(3),
455	Data_In(2) => Port2_in(3),
456	Data_In(3) => Port3_in(3),
457	Data_In(4) => Port4_in(3),
458	Data_out(1)=> Port1_out(3),
459	Data_out(2)=> Port2_out(3),
460	Data_out(3)=> Port3_out(3),
461	Data_out(4)=> Port4_out(3)
462
463	);
464	-- crossbit du bit 4 de donnée
465
466	Data4_Crossbit: Crossbit
467	GENERIC MAP(number_of_ports => 4)
468	PORT MAP(
469
470	Control => Ctrl,
471	Data_In(1) => Port1_in(4),
472	Data_In(2) => Port2_in(4),
473	Data_In(3) => Port3_in(4),
474	Data_In(4) => Port4_in(4),
475	Data_out(1)=> Port1_out(4),
476	Data_out(2)=> Port2_out(4),
477	Data_out(3)=> Port3_out(4),
478	Data_out(4)=> Port4_out(4)
479
480	);
481	-- crossbit du bit 5 de donnée
482
483	Data5_Crossbit: Crossbit
484	GENERIC MAP(number_of_ports => 4)
485	PORT MAP(
486
487	Control => Ctrl,
488	Data_In(1) => Port1_in(5),
489	Data_In(2) => Port2_in(5),
490	Data_In(3) => Port3_in(5),
491	Data_In(4) => Port4_in(5),
492	Data_out(1)=> Port1_out(5),
493	Data_out(2)=> Port2_out(5),
494	Data_out(3)=> Port3_out(5),
495	Data_out(4)=> Port4_out(5)
496
497	);
498	-- crossbit du bit 6 de donnée
499
500	Data6_Crossbit: Crossbit
501	GENERIC MAP(number_of_ports => 4)
502	PORT MAP(
503
504	Control => Ctrl,
505	Data_In(1) => Port1_in(6),
506	Data_In(2) => Port2_in(6),
507	Data_In(3) => Port3_in(6),
508	Data_In(4) => Port4_in(6),
509	Data_out(1)=> Port1_out(6),
510	Data_out(2)=> Port2_out(6),
511	Data_out(3)=> Port3_out(6),
512	Data_out(4)=> Port4_out(6)
513
514	);
515	-- crossbit du bit 7 de donnée
516
517	Data7_Crossbit: Crossbit
518	GENERIC MAP(number_of_ports => 4)
519	PORT MAP(
520
521	Control => Ctrl,
522	Data_In(1) => Port1_in(7),
523	Data_In(2) => Port2_in(7),
524	Data_In(3) => Port3_in(7),
525	Data_In(4) => Port4_in(7),
526	Data_out(1)=> Port1_out(7),
527	Data_out(2)=> Port2_out(7),
528	Data_out(3)=> Port3_out(7),
529	Data_out(4)=> Port4_out(7)
530
531	);
532	-- crossbit du pulse_out 4 ports
533
534	Pulse_out_Crossbit4: Crossbit
535	GENERIC MAP(number_of_ports => 4)
536	PORT MAP(
537
538	Control => Ctrl,
539	Data_In(1) => Port1_pulse_in,
540	Data_In(2) => Port2_pulse_in,
541	Data_In(3) => Port3_pulse_in,
542	Data_In(4) => Port4_pulse_in,
543	Data_out(1) => Port1_pulse_out,
544	Data_out(2) => Port2_pulse_out,
545	Data_out(3) => Port3_pulse_out,
546	Data_out(4) => Port4_pulse_out
547
548	);
549	end generate crossbar4x4;
550
551
552	--======================crossbar 5 ports=======================
553
554	crossbar5x5 : if number_of_crossbar_ports = 5 generate
555
556	-- crossbit du bit 0 de donnée
557
558	Data0_Crossbit: Crossbit
559	GENERIC MAP(number_of_ports => 5)
560	PORT MAP(
561
562	Control => Ctrl,
563	Data_In(1) => Port1_in(0),
564	Data_In(2) => Port2_in(0),
565	Data_In(3) => Port3_in(0),
566	Data_In(4) => Port4_in(0),
567	Data_In(5) => Port5_in(0),
568	Data_out(1)=> Port1_out(0),
569	Data_out(2)=> Port2_out(0),
570	Data_out(3)=> Port3_out(0),
571	Data_out(4)=> Port4_out(0),
572	Data_out(5)=> Port5_out(0)
573
574	);
575	-- crossbit du bit 1 de donnée
576
577	Data1_Crossbit: Crossbit
578	GENERIC MAP(number_of_ports => 5)
579	PORT MAP(
580
581	Control => Ctrl,
582	Data_In(1) => Port1_in(1),
583	Data_In(2) => Port2_in(1),
584	Data_In(3) => Port3_in(1),
585	Data_In(4) => Port4_in(1),
586	Data_In(5) => Port5_in(1),
587	Data_out(1)=> Port1_out(1),
588	Data_out(2)=> Port2_out(1),
589	Data_out(3)=> Port3_out(1),
590	Data_out(4)=> Port4_out(1),
591	Data_out(5)=> Port5_out(1)
592
593	);
594	-- crossbit du bit 2 de donnée
595
596	Data2_Crossbit: Crossbit
597	GENERIC MAP(number_of_ports => 5)
598	PORT MAP(
599
600	Control => Ctrl,
601	Data_In(1) => Port1_in(2),
602	Data_In(2) => Port2_in(2),
603	Data_In(3) => Port3_in(2),
604	Data_In(4) => Port4_in(2),
605	Data_In(5) => Port5_in(2),
606	Data_out(1)=> Port1_out(2),
607	Data_out(2)=> Port2_out(2),
608	Data_out(3)=> Port3_out(2),
609	Data_out(4)=> Port4_out(2),
610	Data_out(5)=> Port5_out(2)
611
612	);
613	-- crossbit du bit 3 de donnée
614
615	Data3_Crossbit: Crossbit
616	GENERIC MAP(number_of_ports => 5)
617	PORT MAP(
618
619	Control => Ctrl,
620	Data_In(1) => Port1_in(3),
621	Data_In(2) => Port2_in(3),
622	Data_In(3) => Port3_in(3),
623	Data_In(4) => Port4_in(3),
624	Data_In(5) => Port5_in(3),
625	Data_out(1)=> Port1_out(3),
626	Data_out(2)=> Port2_out(3),
627	Data_out(3)=> Port3_out(3),
628	Data_out(4)=> Port4_out(3),
629	Data_out(5)=> Port5_out(3)
630
631	);
632	-- crossbit du bit 4 de donnée
633
634	Data4_Crossbit: Crossbit
635	GENERIC MAP(number_of_ports => 5)
636	PORT MAP(
637
638	Control => Ctrl,
639	Data_In(1) => Port1_in(4),
640	Data_In(2) => Port2_in(4),
641	Data_In(3) => Port3_in(4),
642	Data_In(4) => Port4_in(4),
643	Data_In(5) => Port5_in(4),
644	Data_out(1)=> Port1_out(4),
645	Data_out(2)=> Port2_out(4),
646	Data_out(3)=> Port3_out(4),
647	Data_out(4)=> Port4_out(4),
648	Data_out(5)=> Port5_out(4)
649
650	);
651	-- crossbit du bit 5 de donnée
652
653	Data5_Crossbit: Crossbit
654	GENERIC MAP(number_of_ports => 5)
655	PORT MAP(
656
657	Control => Ctrl,
658	Data_In(1) => Port1_in(5),
659	Data_In(2) => Port2_in(5),
660	Data_In(3) => Port3_in(5),
661	Data_In(4) => Port4_in(5),
662	Data_In(5) => Port5_in(5),
663	Data_out(1)=> Port1_out(5),
664	Data_out(2)=> Port2_out(5),
665	Data_out(3)=> Port3_out(5),
666	Data_out(4)=> Port4_out(5),
667	Data_out(5)=> Port5_out(5)
668
669	);
670	-- crossbit du bit 6 de donnée
671
672	Data6_Crossbit: Crossbit
673	GENERIC MAP(number_of_ports => 5)
674	PORT MAP(
675
676	Control => Ctrl,
677	Data_In(1) => Port1_in(6),
678	Data_In(2) => Port2_in(6),
679	Data_In(3) => Port3_in(6),
680	Data_In(4) => Port4_in(6),
681	Data_In(5) => Port5_in(6),
682	Data_out(1)=> Port1_out(6),
683	Data_out(2)=> Port2_out(6),
684	Data_out(3)=> Port3_out(6),
685	Data_out(4)=> Port4_out(6),
686	Data_out(5)=> Port5_out(6)
687
688	);
689	-- crossbit du bit 7 de donnée
690
691	Data7_Crossbit: Crossbit
692	GENERIC MAP(number_of_ports => 5)
693	PORT MAP(
694
695	Control => Ctrl,
696	Data_In(1) => Port1_in(7),
697	Data_In(2) => Port2_in(7),
698	Data_In(3) => Port3_in(7),
699	Data_In(4) => Port4_in(7),
700	Data_In(5) => Port5_in(7),
701	Data_out(1)=> Port1_out(7),
702	Data_out(2)=> Port2_out(7),
703	Data_out(3)=> Port3_out(7),
704	Data_out(4)=> Port4_out(7),
705	Data_out(5)=> Port5_out(7)
706
707	);
708	-- crossbit du pulse_out 5 ports
709
710	Pulse_out_Crossbit5: Crossbit
711	GENERIC MAP(number_of_ports => 5)
712	PORT MAP(
713
714	Control => Ctrl,
715	Data_In(1) => Port1_pulse_in,
716	Data_In(2) => Port2_pulse_in,
717	Data_In(3) => Port3_pulse_in,
718	Data_In(4) => Port4_pulse_in,
719	Data_In(5) => Port5_pulse_in,
720	Data_out(1) => Port1_pulse_out,
721	Data_out(2) => Port2_pulse_out,
722	Data_out(3) => Port3_pulse_out,
723	Data_out(4) => Port4_pulse_out,
724	Data_out(5) => Port5_pulse_out
725
726	);
727	end generate crossbar5x5;
728
729
730	--======================crossbar 6 ports=======================
731
732	crossbar6x6 : if number_of_crossbar_ports = 6 generate
733
734	-- crossbit du bit 0 de donnée
735
736	Data0_Crossbit: Crossbit
737	GENERIC MAP(number_of_ports => 6)
738	PORT MAP(
739
740	Control => Ctrl,
741	Data_In(1) => Port1_in(0),
742	Data_In(2) => Port2_in(0),
743	Data_In(3) => Port3_in(0),
744	Data_In(4) => Port4_in(0),
745	Data_In(5) => Port5_in(0),
746	Data_In(6) => Port6_in(0),
747	Data_out(1)=> Port1_out(0),
748	Data_out(2)=> Port2_out(0),
749	Data_out(3)=> Port3_out(0),
750	Data_out(4)=> Port4_out(0),
751	Data_out(5)=> Port5_out(0),
752	Data_out(6)=> Port6_out(0)
753
754	);
755	-- crossbit du bit 1 de donnée
756
757	Data1_Crossbit: Crossbit
758	GENERIC MAP(number_of_ports => 6)
759	PORT MAP(
760
761	Control => Ctrl,
762	Data_In(1) => Port1_in(1),
763	Data_In(2) => Port2_in(1),
764	Data_In(3) => Port3_in(1),
765	Data_In(4) => Port4_in(1),
766	Data_In(5) => Port5_in(1),
767	Data_In(6) => Port6_in(1),
768	Data_out(1)=> Port1_out(1),
769	Data_out(2)=> Port2_out(1),
770	Data_out(3)=> Port3_out(1),
771	Data_out(4)=> Port4_out(1),
772	Data_out(5)=> Port5_out(1),
773	Data_out(6)=> Port6_out(1)
774
775	);
776	-- crossbit du bit 2 de donnée
777
778	Data2_Crossbit: Crossbit
779	GENERIC MAP(number_of_ports => 6)
780	PORT MAP(
781
782	Control => Ctrl,
783	Data_In(1) => Port1_in(2),
784	Data_In(2) => Port2_in(2),
785	Data_In(3) => Port3_in(2),
786	Data_In(4) => Port4_in(2),
787	Data_In(5) => Port5_in(2),
788	Data_In(6) => Port6_in(2),
789	Data_out(1)=> Port1_out(2),
790	Data_out(2)=> Port2_out(2),
791	Data_out(3)=> Port3_out(2),
792	Data_out(4)=> Port4_out(2),
793	Data_out(5)=> Port5_out(2),
794	Data_out(6)=> Port6_out(2)
795
796	);
797	-- crossbit du bit 3 de donnée
798
799	Data3_Crossbit: Crossbit
800	GENERIC MAP(number_of_ports => 6)
801	PORT MAP(
802
803	Control => Ctrl,
804	Data_In(1) => Port1_in(3),
805	Data_In(2) => Port2_in(3),
806	Data_In(3) => Port3_in(3),
807	Data_In(4) => Port4_in(3),
808	Data_In(5) => Port5_in(3),
809	Data_In(6) => Port6_in(3),
810	Data_out(1)=> Port1_out(3),
811	Data_out(2)=> Port2_out(3),
812	Data_out(3)=> Port3_out(3),
813	Data_out(4)=> Port4_out(3),
814	Data_out(5)=> Port5_out(3),
815	Data_out(6)=> Port6_out(3)
816
817	);
818	-- crossbit du bit 4 de donnée
819
820	Data4_Crossbit: Crossbit
821	GENERIC MAP(number_of_ports => 6)
822	PORT MAP(
823
824	Control => Ctrl,
825	Data_In(1) => Port1_in(4),
826	Data_In(2) => Port2_in(4),
827	Data_In(3) => Port3_in(4),
828	Data_In(4) => Port4_in(4),
829	Data_In(5) => Port5_in(4),
830	Data_In(6) => Port6_in(4),
831	Data_out(1)=> Port1_out(4),
832	Data_out(2)=> Port2_out(4),
833	Data_out(3)=> Port3_out(4),
834	Data_out(4)=> Port4_out(4),
835	Data_out(5)=> Port5_out(4),
836	Data_out(6)=> Port6_out(4)
837
838	);
839	-- crossbit du bit 5 de donnée
840
841	Data5_Crossbit: Crossbit
842	GENERIC MAP(number_of_ports => 6)
843	PORT MAP(
844
845	Control => Ctrl,
846	Data_In(1) => Port1_in(5),
847	Data_In(2) => Port2_in(5),
848	Data_In(3) => Port3_in(5),
849	Data_In(4) => Port4_in(5),
850	Data_In(5) => Port5_in(5),
851	Data_In(6) => Port6_in(5),
852	Data_out(1)=> Port1_out(5),
853	Data_out(2)=> Port2_out(5),
854	Data_out(3)=> Port3_out(5),
855	Data_out(4)=> Port4_out(5),
856	Data_out(5)=> Port5_out(5),
857	Data_out(6)=> Port6_out(5)
858
859	);
860	-- crossbit du bit 6 de donnée
861
862	Data6_Crossbit: Crossbit
863	GENERIC MAP(number_of_ports => 6)
864	PORT MAP(
865
866	Control => Ctrl,
867	Data_In(1) => Port1_in(6),
868	Data_In(2) => Port2_in(6),
869	Data_In(3) => Port3_in(6),
870	Data_In(4) => Port4_in(6),
871	Data_In(5) => Port5_in(6),
872	Data_In(6) => Port6_in(6),
873	Data_out(1)=> Port1_out(6),
874	Data_out(2)=> Port2_out(6),
875	Data_out(3)=> Port3_out(6),
876	Data_out(4)=> Port4_out(6),
877	Data_out(5)=> Port5_out(6),
878	Data_out(6)=> Port6_out(6)
879
880	);
881	-- crossbit du bit 7 de donnée
882
883	Data7_Crossbit: Crossbit
884	GENERIC MAP(number_of_ports => 6)
885	PORT MAP(
886
887	Control => Ctrl,
888	Data_In(1) => Port1_in(7),
889	Data_In(2) => Port2_in(7),
890	Data_In(3) => Port3_in(7),
891	Data_In(4) => Port4_in(7),
892	Data_In(5) => Port5_in(7),
893	Data_In(6) => Port6_in(7),
894	Data_out(1)=> Port1_out(7),
895	Data_out(2)=> Port2_out(7),
896	Data_out(3)=> Port3_out(7),
897	Data_out(4)=> Port4_out(7),
898	Data_out(5)=> Port5_out(7),
899	Data_out(6)=> Port6_out(7)
900
901	);
902	-- crossbit du pulse_out 6 ports
903
904	Pulse_out_Crossbit6: Crossbit
905	GENERIC MAP(number_of_ports => 6)
906	PORT MAP(
907
908	Control => Ctrl,
909	Data_In(1) => Port1_pulse_in,
910	Data_In(2) => Port2_pulse_in,
911	Data_In(3) => Port3_pulse_in,
912	Data_In(4) => Port4_pulse_in,
913	Data_In(5) => Port5_pulse_in,
914	Data_In(6) => Port6_pulse_in,
915	Data_out(1) => Port1_pulse_out,
916	Data_out(2) => Port2_pulse_out,
917	Data_out(3) => Port3_pulse_out,
918	Data_out(4) => Port4_pulse_out,
919	Data_out(5) => Port5_pulse_out,
920	Data_out(6) => Port6_pulse_out
921
922	);
923	end generate crossbar6x6;
924
925
926	--======================crossbar 7 ports=======================
927
928	crossbar7x7 : if number_of_crossbar_ports = 7 generate
929
930	-- crossbit du bit 0 de donnée
931
932	Data0_Crossbit: Crossbit
933	GENERIC MAP(number_of_ports => 7)
934	PORT MAP(
935
936	Control => Ctrl,
937	Data_In(1) => Port1_in(0),
938	Data_In(2) => Port2_in(0),
939	Data_In(3) => Port3_in(0),
940	Data_In(4) => Port4_in(0),
941	Data_In(5) => Port5_in(0),
942	Data_In(6) => Port6_in(0),
943	Data_In(7) => Port7_in(0),
944	Data_out(1)=> Port1_out(0),
945	Data_out(2)=> Port2_out(0),
946	Data_out(3)=> Port3_out(0),
947	Data_out(4)=> Port4_out(0),
948	Data_out(5)=> Port5_out(0),
949	Data_out(6)=> Port6_out(0),
950	Data_out(7)=> Port7_out(0)
951
952	);
953	-- crossbit du bit 1 de donnée
954
955	Data1_Crossbit: Crossbit
956	GENERIC MAP(number_of_ports => 7)
957	PORT MAP(
958
959	Control => Ctrl,
960	Data_In(1) => Port1_in(1),
961	Data_In(2) => Port2_in(1),
962	Data_In(3) => Port3_in(1),
963	Data_In(4) => Port4_in(1),
964	Data_In(5) => Port5_in(1),
965	Data_In(6) => Port6_in(1),
966	Data_In(7) => Port7_in(1),
967	Data_out(1)=> Port1_out(1),
968	Data_out(2)=> Port2_out(1),
969	Data_out(3)=> Port3_out(1),
970	Data_out(4)=> Port4_out(1),
971	Data_out(5)=> Port5_out(1),
972	Data_out(6)=> Port6_out(1),
973	Data_out(7)=> Port7_out(1)
974
975	);
976	-- crossbit du bit 2 de donnée
977
978	Data2_Crossbit: Crossbit
979	GENERIC MAP(number_of_ports => 7)
980	PORT MAP(
981
982	Control => Ctrl,
983	Data_In(1) => Port1_in(2),
984	Data_In(2) => Port2_in(2),
985	Data_In(3) => Port3_in(2),
986	Data_In(4) => Port4_in(2),
987	Data_In(5) => Port5_in(2),
988	Data_In(6) => Port6_in(2),
989	Data_In(7) => Port7_in(2),
990	Data_out(1)=> Port1_out(2),
991	Data_out(2)=> Port2_out(2),
992	Data_out(3)=> Port3_out(2),
993	Data_out(4)=> Port4_out(2),
994	Data_out(5)=> Port5_out(2),
995	Data_out(6)=> Port6_out(2),
996	Data_out(7)=> Port7_out(2)
997
998	);
999	-- crossbit du bit 3 de donnée
1000
1001	Data3_Crossbit: Crossbit
1002	GENERIC MAP(number_of_ports => 7)
1003	PORT MAP(
1004
1005	Control => Ctrl,
1006	Data_In(1) => Port1_in(3),
1007	Data_In(2) => Port2_in(3),
1008	Data_In(3) => Port3_in(3),
1009	Data_In(4) => Port4_in(3),
1010	Data_In(5) => Port5_in(3),
1011	Data_In(6) => Port6_in(3),
1012	Data_In(7) => Port7_in(3),
1013	Data_out(1)=> Port1_out(3),
1014	Data_out(2)=> Port2_out(3),
1015	Data_out(3)=> Port3_out(3),
1016	Data_out(4)=> Port4_out(3),
1017	Data_out(5)=> Port5_out(3),
1018	Data_out(6)=> Port6_out(3),
1019	Data_out(7)=> Port7_out(3)
1020
1021	);
1022	-- crossbit du bit 4 de donnée
1023
1024	Data4_Crossbit: Crossbit
1025	GENERIC MAP(number_of_ports => 7)
1026	PORT MAP(
1027
1028	Control => Ctrl,
1029	Data_In(1) => Port1_in(4),
1030	Data_In(2) => Port2_in(4),
1031	Data_In(3) => Port3_in(4),
1032	Data_In(4) => Port4_in(4),
1033	Data_In(5) => Port5_in(4),
1034	Data_In(6) => Port6_in(4),
1035	Data_In(7) => Port7_in(4),
1036	Data_out(1)=> Port1_out(4),
1037	Data_out(2)=> Port2_out(4),
1038	Data_out(3)=> Port3_out(4),
1039	Data_out(4)=> Port4_out(4),
1040	Data_out(5)=> Port5_out(4),
1041	Data_out(6)=> Port6_out(4),
1042	Data_out(7)=> Port7_out(4)
1043
1044	);
1045	-- crossbit du bit 5 de donnée
1046
1047	Data5_Crossbit: Crossbit
1048	GENERIC MAP(number_of_ports => 7)
1049	PORT MAP(
1050
1051	Control => Ctrl,
1052	Data_In(1) => Port1_in(5),
1053	Data_In(2) => Port2_in(5),
1054	Data_In(3) => Port3_in(5),
1055	Data_In(4) => Port4_in(5),
1056	Data_In(5) => Port5_in(5),
1057	Data_In(6) => Port6_in(5),
1058	Data_In(7) => Port7_in(5),
1059	Data_out(1)=> Port1_out(5),
1060	Data_out(2)=> Port2_out(5),
1061	Data_out(3)=> Port3_out(5),
1062	Data_out(4)=> Port4_out(5),
1063	Data_out(5)=> Port5_out(5),
1064	Data_out(6)=> Port6_out(5),
1065	Data_out(7)=> Port7_out(5)
1066
1067	);
1068	-- crossbit du bit 6 de donnée
1069
1070	Data6_Crossbit: Crossbit
1071	GENERIC MAP(number_of_ports => 7)
1072	PORT MAP(
1073
1074	Control => Ctrl,
1075	Data_In(1) => Port1_in(6),
1076	Data_In(2) => Port2_in(6),
1077	Data_In(3) => Port3_in(6),
1078	Data_In(4) => Port4_in(6),
1079	Data_In(5) => Port5_in(6),
1080	Data_In(6) => Port6_in(6),
1081	Data_In(7) => Port7_in(6),
1082	Data_out(1)=> Port1_out(6),
1083	Data_out(2)=> Port2_out(6),
1084	Data_out(3)=> Port3_out(6),
1085	Data_out(4)=> Port4_out(6),
1086	Data_out(5)=> Port5_out(6),
1087	Data_out(6)=> Port6_out(6),
1088	Data_out(7)=> Port7_out(6)
1089
1090	);
1091	-- crossbit du bit 7 de donnée
1092
1093	Data7_Crossbit: Crossbit
1094	GENERIC MAP(number_of_ports => 7)
1095	PORT MAP(
1096
1097	Control => Ctrl,
1098	Data_In(1) => Port1_in(7),
1099	Data_In(2) => Port2_in(7),
1100	Data_In(3) => Port3_in(7),
1101	Data_In(4) => Port4_in(7),
1102	Data_In(5) => Port5_in(7),
1103	Data_In(6) => Port6_in(7),
1104	Data_In(7) => Port7_in(7),
1105	Data_out(1)=> Port1_out(7),
1106	Data_out(2)=> Port2_out(7),
1107	Data_out(3)=> Port3_out(7),
1108	Data_out(4)=> Port4_out(7),
1109	Data_out(5)=> Port5_out(7),
1110	Data_out(6)=> Port6_out(7),
1111	Data_out(7)=> Port7_out(7)
1112
1113	);
1114	-- crossbit du pulse_out 7 ports
1115
1116	Pulse_out_Crossbit7: Crossbit
1117	GENERIC MAP(number_of_ports => 7)
1118	PORT MAP(
1119
1120	Control => Ctrl,
1121	Data_In(1) => Port1_pulse_in,
1122	Data_In(2) => Port2_pulse_in,
1123	Data_In(3) => Port3_pulse_in,
1124	Data_In(4) => Port4_pulse_in,
1125	Data_In(5) => Port5_pulse_in,
1126	Data_In(6) => Port6_pulse_in,
1127	Data_In(7) => Port7_pulse_in,
1128	Data_out(1) => Port1_pulse_out,
1129	Data_out(2) => Port2_pulse_out,
1130	Data_out(3) => Port3_pulse_out,
1131	Data_out(4) => Port4_pulse_out,
1132	Data_out(5) => Port5_pulse_out,
1133	Data_out(6) => Port6_pulse_out,
1134	Data_out(7) => Port7_pulse_out
1135
1136	);
1137	end generate crossbar7x7;
1138
1139
1140	--======================crossbar 8 ports=======================
1141
1142	crossbar8x8 : if number_of_crossbar_ports = 8 generate
1143
1144	-- crossbit du bit 0 de donnée
1145
1146	Data0_Crossbit: Crossbit
1147	GENERIC MAP(number_of_ports => 8)
1148	PORT MAP(
1149
1150	Control => Ctrl,
1151	Data_In(1) => Port1_in(0),
1152	Data_In(2) => Port2_in(0),
1153	Data_In(3) => Port3_in(0),
1154	Data_In(4) => Port4_in(0),
1155	Data_In(5) => Port5_in(0),
1156	Data_In(6) => Port6_in(0),
1157	Data_In(7) => Port7_in(0),
1158	Data_In(8) => Port8_in(0),
1159	Data_out(1)=> Port1_out(0),
1160	Data_out(2)=> Port2_out(0),
1161	Data_out(3)=> Port3_out(0),
1162	Data_out(4)=> Port4_out(0),
1163	Data_out(5)=> Port5_out(0),
1164	Data_out(6)=> Port6_out(0),
1165	Data_out(7)=> Port7_out(0),
1166	Data_out(8)=> Port8_out(0)
1167
1168	);
1169	-- crossbit du bit 1 de donnée
1170
1171	Data1_Crossbit: Crossbit
1172	GENERIC MAP(number_of_ports => 8)
1173	PORT MAP(
1174
1175	Control => Ctrl,
1176	Data_In(1) => Port1_in(1),
1177	Data_In(2) => Port2_in(1),
1178	Data_In(3) => Port3_in(1),
1179	Data_In(4) => Port4_in(1),
1180	Data_In(5) => Port5_in(1),
1181	Data_In(6) => Port6_in(1),
1182	Data_In(7) => Port7_in(1),
1183	Data_In(8) => Port8_in(1),
1184	Data_out(1)=> Port1_out(1),
1185	Data_out(2)=> Port2_out(1),
1186	Data_out(3)=> Port3_out(1),
1187	Data_out(4)=> Port4_out(1),
1188	Data_out(5)=> Port5_out(1),
1189	Data_out(6)=> Port6_out(1),
1190	Data_out(7)=> Port7_out(1),
1191	Data_out(8)=> Port8_out(1)
1192
1193	);
1194	-- crossbit du bit 2 de donnée
1195
1196	Data2_Crossbit: Crossbit
1197	GENERIC MAP(number_of_ports => 8)
1198	PORT MAP(
1199
1200	Control => Ctrl,
1201	Data_In(1) => Port1_in(2),
1202	Data_In(2) => Port2_in(2),
1203	Data_In(3) => Port3_in(2),
1204	Data_In(4) => Port4_in(2),
1205	Data_In(5) => Port5_in(2),
1206	Data_In(6) => Port6_in(2),
1207	Data_In(7) => Port7_in(2),
1208	Data_In(8) => Port8_in(2),
1209	Data_out(1)=> Port1_out(2),
1210	Data_out(2)=> Port2_out(2),
1211	Data_out(3)=> Port3_out(2),
1212	Data_out(4)=> Port4_out(2),
1213	Data_out(5)=> Port5_out(2),
1214	Data_out(6)=> Port6_out(2),
1215	Data_out(7)=> Port7_out(2),
1216	Data_out(8)=> Port8_out(2)
1217
1218	);
1219	-- crossbit du bit 3 de donnée
1220
1221	Data3_Crossbit: Crossbit
1222	GENERIC MAP(number_of_ports => 8)
1223	PORT MAP(
1224
1225	Control => Ctrl,
1226	Data_In(1) => Port1_in(3),
1227	Data_In(2) => Port2_in(3),
1228	Data_In(3) => Port3_in(3),
1229	Data_In(4) => Port4_in(3),
1230	Data_In(5) => Port5_in(3),
1231	Data_In(6) => Port6_in(3),
1232	Data_In(7) => Port7_in(3),
1233	Data_In(8) => Port8_in(3),
1234	Data_out(1)=> Port1_out(3),
1235	Data_out(2)=> Port2_out(3),
1236	Data_out(3)=> Port3_out(3),
1237	Data_out(4)=> Port4_out(3),
1238	Data_out(5)=> Port5_out(3),
1239	Data_out(6)=> Port6_out(3),
1240	Data_out(7)=> Port7_out(3),
1241	Data_out(8)=> Port8_out(3)
1242
1243	);
1244	-- crossbit du bit 4 de donnée
1245
1246	Data4_Crossbit: Crossbit
1247	GENERIC MAP(number_of_ports => 8)
1248	PORT MAP(
1249
1250	Control => Ctrl,
1251	Data_In(1) => Port1_in(4),
1252	Data_In(2) => Port2_in(4),
1253	Data_In(3) => Port3_in(4),
1254	Data_In(4) => Port4_in(4),
1255	Data_In(5) => Port5_in(4),
1256	Data_In(6) => Port6_in(4),
1257	Data_In(7) => Port7_in(4),
1258	Data_In(8) => Port8_in(4),
1259	Data_out(1)=> Port1_out(4),
1260	Data_out(2)=> Port2_out(4),
1261	Data_out(3)=> Port3_out(4),
1262	Data_out(4)=> Port4_out(4),
1263	Data_out(5)=> Port5_out(4),
1264	Data_out(6)=> Port6_out(4),
1265	Data_out(7)=> Port7_out(4),
1266	Data_out(8)=> Port8_out(4)
1267
1268	);
1269	-- crossbit du bit 5 de donnée
1270
1271	Data5_Crossbit: Crossbit
1272	GENERIC MAP(number_of_ports => 8)
1273	PORT MAP(
1274
1275	Control => Ctrl,
1276	Data_In(1) => Port1_in(5),
1277	Data_In(2) => Port2_in(5),
1278	Data_In(3) => Port3_in(5),
1279	Data_In(4) => Port4_in(5),
1280	Data_In(5) => Port5_in(5),
1281	Data_In(6) => Port6_in(5),
1282	Data_In(7) => Port7_in(5),
1283	Data_In(8) => Port8_in(5),
1284	Data_out(1)=> Port1_out(5),
1285	Data_out(2)=> Port2_out(5),
1286	Data_out(3)=> Port3_out(5),
1287	Data_out(4)=> Port4_out(5),
1288	Data_out(5)=> Port5_out(5),
1289	Data_out(6)=> Port6_out(5),
1290	Data_out(7)=> Port7_out(5),
1291	Data_out(8)=> Port8_out(5)
1292
1293	);
1294	-- crossbit du bit 6 de donnée
1295
1296	Data6_Crossbit: Crossbit
1297	GENERIC MAP(number_of_ports => 8)
1298	PORT MAP(
1299
1300	Control => Ctrl,
1301	Data_In(1) => Port1_in(6),
1302	Data_In(2) => Port2_in(6),
1303	Data_In(3) => Port3_in(6),
1304	Data_In(4) => Port4_in(6),
1305	Data_In(5) => Port5_in(6),
1306	Data_In(6) => Port6_in(6),
1307	Data_In(7) => Port7_in(6),
1308	Data_In(8) => Port8_in(6),
1309	Data_out(1)=> Port1_out(6),
1310	Data_out(2)=> Port2_out(6),
1311	Data_out(3)=> Port3_out(6),
1312	Data_out(4)=> Port4_out(6),
1313	Data_out(5)=> Port5_out(6),
1314	Data_out(6)=> Port6_out(6),
1315	Data_out(7)=> Port7_out(6),
1316	Data_out(8)=> Port8_out(6)
1317
1318	);
1319	-- crossbit du bit 7 de donnée
1320
1321	Data7_Crossbit: Crossbit
1322	GENERIC MAP(number_of_ports => 8)
1323	PORT MAP(
1324
1325	Control => Ctrl,
1326	Data_In(1) => Port1_in(7),
1327	Data_In(2) => Port2_in(7),
1328	Data_In(3) => Port3_in(7),
1329	Data_In(4) => Port4_in(7),
1330	Data_In(5) => Port5_in(7),
1331	Data_In(6) => Port6_in(7),
1332	Data_In(7) => Port7_in(7),
1333	Data_In(8) => Port8_in(7),
1334	Data_out(1)=> Port1_out(7),
1335	Data_out(2)=> Port2_out(7),
1336	Data_out(3)=> Port3_out(7),
1337	Data_out(4)=> Port4_out(7),
1338	Data_out(5)=> Port5_out(7),
1339	Data_out(6)=> Port6_out(7),
1340	Data_out(7)=> Port7_out(7),
1341	Data_out(8)=> Port8_out(7)
1342
1343	);
1344	-- crossbit du pulse_out 8 ports
1345
1346	Pulse_out_Crossbit8: Crossbit
1347	GENERIC MAP(number_of_ports => 8)
1348	PORT MAP(
1349
1350	Control => Ctrl,
1351	Data_In(1) => Port1_pulse_in,
1352	Data_In(2) => Port2_pulse_in,
1353	Data_In(3) => Port3_pulse_in,
1354	Data_In(4) => Port4_pulse_in,
1355	Data_In(5) => Port5_pulse_in,
1356	Data_In(6) => Port6_pulse_in,
1357	Data_In(7) => Port7_pulse_in,
1358	Data_In(8) => Port8_pulse_in,
1359	Data_out(1) => Port1_pulse_out,
1360	Data_out(2) => Port2_pulse_out,
1361	Data_out(3) => Port3_pulse_out,
1362	Data_out(4) => Port4_pulse_out,
1363	Data_out(5) => Port5_pulse_out,
1364	Data_out(6) => Port6_pulse_out,
1365	Data_out(7) => Port7_pulse_out,
1366	Data_out(8) => Port8_pulse_out
1367
1368	);
1369	end generate crossbar8x8;
1370
1371
1372	--======================crossbar 9 ports=======================
1373
1374	crossbar9x9 : if number_of_crossbar_ports = 9 generate
1375
1376	-- crossbit du bit 0 de donnée
1377
1378	Data0_Crossbit: Crossbit
1379	GENERIC MAP(number_of_ports => 9)
1380	PORT MAP(
1381
1382	Control => Ctrl,
1383	Data_In(1) => Port1_in(0),
1384	Data_In(2) => Port2_in(0),
1385	Data_In(3) => Port3_in(0),
1386	Data_In(4) => Port4_in(0),
1387	Data_In(5) => Port5_in(0),
1388	Data_In(6) => Port6_in(0),
1389	Data_In(7) => Port7_in(0),
1390	Data_In(8) => Port8_in(0),
1391	Data_In(9) => Port9_in(0),
1392	Data_out(1)=> Port1_out(0),
1393	Data_out(2)=> Port2_out(0),
1394	Data_out(3)=> Port3_out(0),
1395	Data_out(4)=> Port4_out(0),
1396	Data_out(5)=> Port5_out(0),
1397	Data_out(6)=> Port6_out(0),
1398	Data_out(7)=> Port7_out(0),
1399	Data_out(8)=> Port8_out(0),
1400	Data_out(9)=> Port9_out(0)
1401
1402	);
1403	-- crossbit du bit 1 de donnée
1404
1405	Data1_Crossbit: Crossbit
1406	GENERIC MAP(number_of_ports => 9)
1407	PORT MAP(
1408
1409	Control => Ctrl,
1410	Data_In(1) => Port1_in(1),
1411	Data_In(2) => Port2_in(1),
1412	Data_In(3) => Port3_in(1),
1413	Data_In(4) => Port4_in(1),
1414	Data_In(5) => Port5_in(1),
1415	Data_In(6) => Port6_in(1),
1416	Data_In(7) => Port7_in(1),
1417	Data_In(8) => Port8_in(1),
1418	Data_In(9) => Port9_in(1),
1419	Data_out(1)=> Port1_out(1),
1420	Data_out(2)=> Port2_out(1),
1421	Data_out(3)=> Port3_out(1),
1422	Data_out(4)=> Port4_out(1),
1423	Data_out(5)=> Port5_out(1),
1424	Data_out(6)=> Port6_out(1),
1425	Data_out(7)=> Port7_out(1),
1426	Data_out(8)=> Port8_out(1),
1427	Data_out(9)=> Port9_out(1)
1428
1429	);
1430	-- crossbit du bit 2 de donnée
1431
1432	Data2_Crossbit: Crossbit
1433	GENERIC MAP(number_of_ports => 9)
1434	PORT MAP(
1435
1436	Control => Ctrl,
1437	Data_In(1) => Port1_in(2),
1438	Data_In(2) => Port2_in(2),
1439	Data_In(3) => Port3_in(2),
1440	Data_In(4) => Port4_in(2),
1441	Data_In(5) => Port5_in(2),
1442	Data_In(6) => Port6_in(2),
1443	Data_In(7) => Port7_in(2),
1444	Data_In(8) => Port8_in(2),
1445	Data_In(9) => Port9_in(2),
1446	Data_out(1)=> Port1_out(2),
1447	Data_out(2)=> Port2_out(2),
1448	Data_out(3)=> Port3_out(2),
1449	Data_out(4)=> Port4_out(2),
1450	Data_out(5)=> Port5_out(2),
1451	Data_out(6)=> Port6_out(2),
1452	Data_out(7)=> Port7_out(2),
1453	Data_out(8)=> Port8_out(2),
1454	Data_out(9)=> Port9_out(2)
1455
1456	);
1457	-- crossbit du bit 3 de donnée
1458
1459	Data3_Crossbit: Crossbit
1460	GENERIC MAP(number_of_ports => 9)
1461	PORT MAP(
1462
1463	Control => Ctrl,
1464	Data_In(1) => Port1_in(3),
1465	Data_In(2) => Port2_in(3),
1466	Data_In(3) => Port3_in(3),
1467	Data_In(4) => Port4_in(3),
1468	Data_In(5) => Port5_in(3),
1469	Data_In(6) => Port6_in(3),
1470	Data_In(7) => Port7_in(3),
1471	Data_In(8) => Port8_in(3),
1472	Data_In(9) => Port9_in(3),
1473	Data_out(1)=> Port1_out(3),
1474	Data_out(2)=> Port2_out(3),
1475	Data_out(3)=> Port3_out(3),
1476	Data_out(4)=> Port4_out(3),
1477	Data_out(5)=> Port5_out(3),
1478	Data_out(6)=> Port6_out(3),
1479	Data_out(7)=> Port7_out(3),
1480	Data_out(8)=> Port8_out(3),
1481	Data_out(9)=> Port9_out(3)
1482
1483	);
1484	-- crossbit du bit 4 de donnée
1485
1486	Data4_Crossbit: Crossbit
1487	GENERIC MAP(number_of_ports => 9)
1488	PORT MAP(
1489
1490	Control => Ctrl,
1491	Data_In(1) => Port1_in(4),
1492	Data_In(2) => Port2_in(4),
1493	Data_In(3) => Port3_in(4),
1494	Data_In(4) => Port4_in(4),
1495	Data_In(5) => Port5_in(4),
1496	Data_In(6) => Port6_in(4),
1497	Data_In(7) => Port7_in(4),
1498	Data_In(8) => Port8_in(4),
1499	Data_In(9) => Port9_in(4),
1500	Data_out(1)=> Port1_out(4),
1501	Data_out(2)=> Port2_out(4),
1502	Data_out(3)=> Port3_out(4),
1503	Data_out(4)=> Port4_out(4),
1504	Data_out(5)=> Port5_out(4),
1505	Data_out(6)=> Port6_out(4),
1506	Data_out(7)=> Port7_out(4),
1507	Data_out(8)=> Port8_out(4),
1508	Data_out(9)=> Port9_out(4)
1509
1510	);
1511	-- crossbit du bit 5 de donnée
1512
1513	Data5_Crossbit: Crossbit
1514	GENERIC MAP(number_of_ports => 9)
1515	PORT MAP(
1516
1517	Control => Ctrl,
1518	Data_In(1) => Port1_in(5),
1519	Data_In(2) => Port2_in(5),
1520	Data_In(3) => Port3_in(5),
1521	Data_In(4) => Port4_in(5),
1522	Data_In(5) => Port5_in(5),
1523	Data_In(6) => Port6_in(5),
1524	Data_In(7) => Port7_in(5),
1525	Data_In(8) => Port8_in(5),
1526	Data_In(9) => Port9_in(5),
1527	Data_out(1)=> Port1_out(5),
1528	Data_out(2)=> Port2_out(5),
1529	Data_out(3)=> Port3_out(5),
1530	Data_out(4)=> Port4_out(5),
1531	Data_out(5)=> Port5_out(5),
1532	Data_out(6)=> Port6_out(5),
1533	Data_out(7)=> Port7_out(5),
1534	Data_out(8)=> Port8_out(5),
1535	Data_out(9)=> Port9_out(5)
1536
1537	);
1538	-- crossbit du bit 6 de donnée
1539
1540	Data6_Crossbit: Crossbit
1541	GENERIC MAP(number_of_ports => 9)
1542	PORT MAP(
1543
1544	Control => Ctrl,
1545	Data_In(1) => Port1_in(6),
1546	Data_In(2) => Port2_in(6),
1547	Data_In(3) => Port3_in(6),
1548	Data_In(4) => Port4_in(6),
1549	Data_In(5) => Port5_in(6),
1550	Data_In(6) => Port6_in(6),
1551	Data_In(7) => Port7_in(6),
1552	Data_In(8) => Port8_in(6),
1553	Data_In(9) => Port9_in(6),
1554	Data_out(1)=> Port1_out(6),
1555	Data_out(2)=> Port2_out(6),
1556	Data_out(3)=> Port3_out(6),
1557	Data_out(4)=> Port4_out(6),
1558	Data_out(5)=> Port5_out(6),
1559	Data_out(6)=> Port6_out(6),
1560	Data_out(7)=> Port7_out(6),
1561	Data_out(8)=> Port8_out(6),
1562	Data_out(9)=> Port9_out(6)
1563
1564	);
1565	-- crossbit du bit 7 de donnée
1566
1567	Data7_Crossbit: Crossbit
1568	GENERIC MAP(number_of_ports => 9)
1569	PORT MAP(
1570
1571	Control => Ctrl,
1572	Data_In(1) => Port1_in(7),
1573	Data_In(2) => Port2_in(7),
1574	Data_In(3) => Port3_in(7),
1575	Data_In(4) => Port4_in(7),
1576	Data_In(5) => Port5_in(7),
1577	Data_In(6) => Port6_in(7),
1578	Data_In(7) => Port7_in(7),
1579	Data_In(8) => Port8_in(7),
1580	Data_In(9) => Port9_in(7),
1581	Data_out(1)=> Port1_out(7),
1582	Data_out(2)=> Port2_out(7),
1583	Data_out(3)=> Port3_out(7),
1584	Data_out(4)=> Port4_out(7),
1585	Data_out(5)=> Port5_out(7),
1586	Data_out(6)=> Port6_out(7),
1587	Data_out(7)=> Port7_out(7),
1588	Data_out(8)=> Port8_out(7),
1589	Data_out(9)=> Port9_out(7)
1590
1591	);
1592	-- crossbit du pulse_out 9 ports
1593
1594	Pulse_out_Crossbit9: Crossbit
1595	GENERIC MAP(number_of_ports => 9)
1596	PORT MAP(
1597
1598	Control => Ctrl,
1599	Data_In(1) => Port1_pulse_in,
1600	Data_In(2) => Port2_pulse_in,
1601	Data_In(3) => Port3_pulse_in,
1602	Data_In(4) => Port4_pulse_in,
1603	Data_In(5) => Port5_pulse_in,
1604	Data_In(6) => Port6_pulse_in,
1605	Data_In(7) => Port7_pulse_in,
1606	Data_In(8) => Port8_pulse_in,
1607	Data_In(9) => Port9_pulse_in,
1608	Data_out(1) => Port1_pulse_out,
1609	Data_out(2) => Port2_pulse_out,
1610	Data_out(3) => Port3_pulse_out,
1611	Data_out(4) => Port4_pulse_out,
1612	Data_out(5) => Port5_pulse_out,
1613	Data_out(6) => Port6_pulse_out,
1614	Data_out(7) => Port7_pulse_out,
1615	Data_out(8) => Port8_pulse_out,
1616	Data_out(9) => Port9_pulse_out
1617
1618	);
1619	end generate crossbar9x9;
1620
1621
1622	--======================crossbar 10 ports=======================
1623
1624	crossbar10x10 : if number_of_crossbar_ports = 10 generate
1625
1626	-- crossbit du bit 0 de donnée
1627
1628	Data0_Crossbit: Crossbit
1629	GENERIC MAP(number_of_ports => 10)
1630	PORT MAP(
1631
1632	Control => Ctrl,
1633	Data_In(1) => Port1_in(0),
1634	Data_In(2) => Port2_in(0),
1635	Data_In(3) => Port3_in(0),
1636	Data_In(4) => Port4_in(0),
1637	Data_In(5) => Port5_in(0),
1638	Data_In(6) => Port6_in(0),
1639	Data_In(7) => Port7_in(0),
1640	Data_In(8) => Port8_in(0),
1641	Data_In(9) => Port9_in(0),
1642	Data_In(10) => Port10_in(0),
1643	Data_out(1)=> Port1_out(0),
1644	Data_out(2)=> Port2_out(0),
1645	Data_out(3)=> Port3_out(0),
1646	Data_out(4)=> Port4_out(0),
1647	Data_out(5)=> Port5_out(0),
1648	Data_out(6)=> Port6_out(0),
1649	Data_out(7)=> Port7_out(0),
1650	Data_out(8)=> Port8_out(0),
1651	Data_out(9)=> Port9_out(0),
1652	Data_out(10)=> Port10_out(0)
1653
1654	);
1655	-- crossbit du bit 1 de donnée
1656
1657	Data1_Crossbit: Crossbit
1658	GENERIC MAP(number_of_ports => 10)
1659	PORT MAP(
1660
1661	Control => Ctrl,
1662	Data_In(1) => Port1_in(1),
1663	Data_In(2) => Port2_in(1),
1664	Data_In(3) => Port3_in(1),
1665	Data_In(4) => Port4_in(1),
1666	Data_In(5) => Port5_in(1),
1667	Data_In(6) => Port6_in(1),
1668	Data_In(7) => Port7_in(1),
1669	Data_In(8) => Port8_in(1),
1670	Data_In(9) => Port9_in(1),
1671	Data_In(10) => Port10_in(1),
1672	Data_out(1)=> Port1_out(1),
1673	Data_out(2)=> Port2_out(1),
1674	Data_out(3)=> Port3_out(1),
1675	Data_out(4)=> Port4_out(1),
1676	Data_out(5)=> Port5_out(1),
1677	Data_out(6)=> Port6_out(1),
1678	Data_out(7)=> Port7_out(1),
1679	Data_out(8)=> Port8_out(1),
1680	Data_out(9)=> Port9_out(1),
1681	Data_out(10)=> Port10_out(1)
1682
1683	);
1684	-- crossbit du bit 2 de donnée
1685
1686	Data2_Crossbit: Crossbit
1687	GENERIC MAP(number_of_ports => 10)
1688	PORT MAP(
1689
1690	Control => Ctrl,
1691	Data_In(1) => Port1_in(2),
1692	Data_In(2) => Port2_in(2),
1693	Data_In(3) => Port3_in(2),
1694	Data_In(4) => Port4_in(2),
1695	Data_In(5) => Port5_in(2),
1696	Data_In(6) => Port6_in(2),
1697	Data_In(7) => Port7_in(2),
1698	Data_In(8) => Port8_in(2),
1699	Data_In(9) => Port9_in(2),
1700	Data_In(10) => Port10_in(2),
1701	Data_out(1)=> Port1_out(2),
1702	Data_out(2)=> Port2_out(2),
1703	Data_out(3)=> Port3_out(2),
1704	Data_out(4)=> Port4_out(2),
1705	Data_out(5)=> Port5_out(2),
1706	Data_out(6)=> Port6_out(2),
1707	Data_out(7)=> Port7_out(2),
1708	Data_out(8)=> Port8_out(2),
1709	Data_out(9)=> Port9_out(2),
1710	Data_out(10)=> Port10_out(2)
1711
1712	);
1713	-- crossbit du bit 3 de donnée
1714
1715	Data3_Crossbit: Crossbit
1716	GENERIC MAP(number_of_ports => 10)
1717	PORT MAP(
1718
1719	Control => Ctrl,
1720	Data_In(1) => Port1_in(3),
1721	Data_In(2) => Port2_in(3),
1722	Data_In(3) => Port3_in(3),
1723	Data_In(4) => Port4_in(3),
1724	Data_In(5) => Port5_in(3),
1725	Data_In(6) => Port6_in(3),
1726	Data_In(7) => Port7_in(3),
1727	Data_In(8) => Port8_in(3),
1728	Data_In(9) => Port9_in(3),
1729	Data_In(10) => Port10_in(3),
1730	Data_out(1)=> Port1_out(3),
1731	Data_out(2)=> Port2_out(3),
1732	Data_out(3)=> Port3_out(3),
1733	Data_out(4)=> Port4_out(3),
1734	Data_out(5)=> Port5_out(3),
1735	Data_out(6)=> Port6_out(3),
1736	Data_out(7)=> Port7_out(3),
1737	Data_out(8)=> Port8_out(3),
1738	Data_out(9)=> Port9_out(3),
1739	Data_out(10)=> Port10_out(3)
1740
1741	);
1742	-- crossbit du bit 4 de donnée
1743
1744	Data4_Crossbit: Crossbit
1745	GENERIC MAP(number_of_ports => 10)
1746	PORT MAP(
1747
1748	Control => Ctrl,
1749	Data_In(1) => Port1_in(4),
1750	Data_In(2) => Port2_in(4),
1751	Data_In(3) => Port3_in(4),
1752	Data_In(4) => Port4_in(4),
1753	Data_In(5) => Port5_in(4),
1754	Data_In(6) => Port6_in(4),
1755	Data_In(7) => Port7_in(4),
1756	Data_In(8) => Port8_in(4),
1757	Data_In(9) => Port9_in(4),
1758	Data_In(10) => Port10_in(4),
1759	Data_out(1)=> Port1_out(4),
1760	Data_out(2)=> Port2_out(4),
1761	Data_out(3)=> Port3_out(4),
1762	Data_out(4)=> Port4_out(4),
1763	Data_out(5)=> Port5_out(4),
1764	Data_out(6)=> Port6_out(4),
1765	Data_out(7)=> Port7_out(4),
1766	Data_out(8)=> Port8_out(4),
1767	Data_out(9)=> Port9_out(4),
1768	Data_out(10)=> Port10_out(4)
1769
1770	);
1771	-- crossbit du bit 5 de donnée
1772
1773	Data5_Crossbit: Crossbit
1774	GENERIC MAP(number_of_ports => 10)
1775	PORT MAP(
1776
1777	Control => Ctrl,
1778	Data_In(1) => Port1_in(5),
1779	Data_In(2) => Port2_in(5),
1780	Data_In(3) => Port3_in(5),
1781	Data_In(4) => Port4_in(5),
1782	Data_In(5) => Port5_in(5),
1783	Data_In(6) => Port6_in(5),
1784	Data_In(7) => Port7_in(5),
1785	Data_In(8) => Port8_in(5),
1786	Data_In(9) => Port9_in(5),
1787	Data_In(10) => Port10_in(5),
1788	Data_out(1)=> Port1_out(5),
1789	Data_out(2)=> Port2_out(5),
1790	Data_out(3)=> Port3_out(5),
1791	Data_out(4)=> Port4_out(5),
1792	Data_out(5)=> Port5_out(5),
1793	Data_out(6)=> Port6_out(5),
1794	Data_out(7)=> Port7_out(5),
1795	Data_out(8)=> Port8_out(5),
1796	Data_out(9)=> Port9_out(5),
1797	Data_out(10)=> Port10_out(5)
1798
1799	);
1800	-- crossbit du bit 6 de donnée
1801
1802	Data6_Crossbit: Crossbit
1803	GENERIC MAP(number_of_ports => 10)
1804	PORT MAP(
1805
1806	Control => Ctrl,
1807	Data_In(1) => Port1_in(6),
1808	Data_In(2) => Port2_in(6),
1809	Data_In(3) => Port3_in(6),
1810	Data_In(4) => Port4_in(6),
1811	Data_In(5) => Port5_in(6),
1812	Data_In(6) => Port6_in(6),
1813	Data_In(7) => Port7_in(6),
1814	Data_In(8) => Port8_in(6),
1815	Data_In(9) => Port9_in(6),
1816	Data_In(10) => Port10_in(6),
1817	Data_out(1)=> Port1_out(6),
1818	Data_out(2)=> Port2_out(6),
1819	Data_out(3)=> Port3_out(6),
1820	Data_out(4)=> Port4_out(6),
1821	Data_out(5)=> Port5_out(6),
1822	Data_out(6)=> Port6_out(6),
1823	Data_out(7)=> Port7_out(6),
1824	Data_out(8)=> Port8_out(6),
1825	Data_out(9)=> Port9_out(6),
1826	Data_out(10)=> Port10_out(6)
1827
1828	);
1829	-- crossbit du bit 7 de donnée
1830
1831	Data7_Crossbit: Crossbit
1832	GENERIC MAP(number_of_ports => 10)
1833	PORT MAP(
1834
1835	Control => Ctrl,
1836	Data_In(1) => Port1_in(7),
1837	Data_In(2) => Port2_in(7),
1838	Data_In(3) => Port3_in(7),
1839	Data_In(4) => Port4_in(7),
1840	Data_In(5) => Port5_in(7),
1841	Data_In(6) => Port6_in(7),
1842	Data_In(7) => Port7_in(7),
1843	Data_In(8) => Port8_in(7),
1844	Data_In(9) => Port9_in(7),
1845	Data_In(10) => Port10_in(7),
1846	Data_out(1)=> Port1_out(7),
1847	Data_out(2)=> Port2_out(7),
1848	Data_out(3)=> Port3_out(7),
1849	Data_out(4)=> Port4_out(7),
1850	Data_out(5)=> Port5_out(7),
1851	Data_out(6)=> Port6_out(7),
1852	Data_out(7)=> Port7_out(7),
1853	Data_out(8)=> Port8_out(7),
1854	Data_out(9)=> Port9_out(7),
1855	Data_out(10)=> Port10_out(7)
1856
1857	);
1858	-- crossbit du pulse_out 10 ports
1859
1860	Pulse_out_Crossbit10: Crossbit
1861	GENERIC MAP(number_of_ports => 10)
1862	PORT MAP(
1863
1864	Control => Ctrl,
1865	Data_In(1) => Port1_pulse_in,
1866	Data_In(2) => Port2_pulse_in,
1867	Data_In(3) => Port3_pulse_in,
1868	Data_In(4) => Port4_pulse_in,
1869	Data_In(5) => Port5_pulse_in,
1870	Data_In(6) => Port6_pulse_in,
1871	Data_In(7) => Port7_pulse_in,
1872	Data_In(8) => Port8_pulse_in,
1873	Data_In(9) => Port9_pulse_in,
1874	Data_In(10) => Port10_pulse_in,
1875	Data_out(1) => Port1_pulse_out,
1876	Data_out(2) => Port2_pulse_out,
1877	Data_out(3) => Port3_pulse_out,
1878	Data_out(4) => Port4_pulse_out,
1879	Data_out(5) => Port5_pulse_out,
1880	Data_out(6) => Port6_pulse_out,
1881	Data_out(7) => Port7_pulse_out,
1882	Data_out(8) => Port8_pulse_out,
1883	Data_out(9) => Port9_pulse_out,
1884	Data_out(10) => Port10_pulse_out
1885
1886	);
1887	end generate crossbar10x10;
1888
1889
1890	--======================crossbar 11 ports=======================
1891
1892	crossbar11x11 : if number_of_crossbar_ports = 11 generate
1893
1894	-- crossbit du bit 0 de donnée
1895
1896	Data0_Crossbit: Crossbit
1897	GENERIC MAP(number_of_ports => 11)
1898	PORT MAP(
1899
1900	Control => Ctrl,
1901	Data_In(1) => Port1_in(0),
1902	Data_In(2) => Port2_in(0),
1903	Data_In(3) => Port3_in(0),
1904	Data_In(4) => Port4_in(0),
1905	Data_In(5) => Port5_in(0),
1906	Data_In(6) => Port6_in(0),
1907	Data_In(7) => Port7_in(0),
1908	Data_In(8) => Port8_in(0),
1909	Data_In(9) => Port9_in(0),
1910	Data_In(10) => Port10_in(0),
1911	Data_In(11) => Port11_in(0),
1912	Data_out(1)=> Port1_out(0),
1913	Data_out(2)=> Port2_out(0),
1914	Data_out(3)=> Port3_out(0),
1915	Data_out(4)=> Port4_out(0),
1916	Data_out(5)=> Port5_out(0),
1917	Data_out(6)=> Port6_out(0),
1918	Data_out(7)=> Port7_out(0),
1919	Data_out(8)=> Port8_out(0),
1920	Data_out(9)=> Port9_out(0),
1921	Data_out(10)=> Port10_out(0),
1922	Data_out(11)=> Port11_out(0)
1923
1924	);
1925	-- crossbit du bit 1 de donnée
1926
1927	Data1_Crossbit: Crossbit
1928	GENERIC MAP(number_of_ports => 11)
1929	PORT MAP(
1930
1931	Control => Ctrl,
1932	Data_In(1) => Port1_in(1),
1933	Data_In(2) => Port2_in(1),
1934	Data_In(3) => Port3_in(1),
1935	Data_In(4) => Port4_in(1),
1936	Data_In(5) => Port5_in(1),
1937	Data_In(6) => Port6_in(1),
1938	Data_In(7) => Port7_in(1),
1939	Data_In(8) => Port8_in(1),
1940	Data_In(9) => Port9_in(1),
1941	Data_In(10) => Port10_in(1),
1942	Data_In(11) => Port11_in(1),
1943	Data_out(1)=> Port1_out(1),
1944	Data_out(2)=> Port2_out(1),
1945	Data_out(3)=> Port3_out(1),
1946	Data_out(4)=> Port4_out(1),
1947	Data_out(5)=> Port5_out(1),
1948	Data_out(6)=> Port6_out(1),
1949	Data_out(7)=> Port7_out(1),
1950	Data_out(8)=> Port8_out(1),
1951	Data_out(9)=> Port9_out(1),
1952	Data_out(10)=> Port10_out(1),
1953	Data_out(11)=> Port11_out(1)
1954
1955	);
1956	-- crossbit du bit 2 de donnée
1957
1958	Data2_Crossbit: Crossbit
1959	GENERIC MAP(number_of_ports => 11)
1960	PORT MAP(
1961
1962	Control => Ctrl,
1963	Data_In(1) => Port1_in(2),
1964	Data_In(2) => Port2_in(2),
1965	Data_In(3) => Port3_in(2),
1966	Data_In(4) => Port4_in(2),
1967	Data_In(5) => Port5_in(2),
1968	Data_In(6) => Port6_in(2),
1969	Data_In(7) => Port7_in(2),
1970	Data_In(8) => Port8_in(2),
1971	Data_In(9) => Port9_in(2),
1972	Data_In(10) => Port10_in(2),
1973	Data_In(11) => Port11_in(2),
1974	Data_out(1)=> Port1_out(2),
1975	Data_out(2)=> Port2_out(2),
1976	Data_out(3)=> Port3_out(2),
1977	Data_out(4)=> Port4_out(2),
1978	Data_out(5)=> Port5_out(2),
1979	Data_out(6)=> Port6_out(2),
1980	Data_out(7)=> Port7_out(2),
1981	Data_out(8)=> Port8_out(2),
1982	Data_out(9)=> Port9_out(2),
1983	Data_out(10)=> Port10_out(2),
1984	Data_out(11)=> Port11_out(2)
1985
1986	);
1987	-- crossbit du bit 3 de donnée
1988
1989	Data3_Crossbit: Crossbit
1990	GENERIC MAP(number_of_ports => 11)
1991	PORT MAP(
1992
1993	Control => Ctrl,
1994	Data_In(1) => Port1_in(3),
1995	Data_In(2) => Port2_in(3),
1996	Data_In(3) => Port3_in(3),
1997	Data_In(4) => Port4_in(3),
1998	Data_In(5) => Port5_in(3),
1999	Data_In(6) => Port6_in(3),
2000	Data_In(7) => Port7_in(3),
2001	Data_In(8) => Port8_in(3),
2002	Data_In(9) => Port9_in(3),
2003	Data_In(10) => Port10_in(3),
2004	Data_In(11) => Port11_in(3),
2005	Data_out(1)=> Port1_out(3),
2006	Data_out(2)=> Port2_out(3),
2007	Data_out(3)=> Port3_out(3),
2008	Data_out(4)=> Port4_out(3),
2009	Data_out(5)=> Port5_out(3),
2010	Data_out(6)=> Port6_out(3),
2011	Data_out(7)=> Port7_out(3),
2012	Data_out(8)=> Port8_out(3),
2013	Data_out(9)=> Port9_out(3),
2014	Data_out(10)=> Port10_out(3),
2015	Data_out(11)=> Port11_out(3)
2016
2017	);
2018	-- crossbit du bit 4 de donnée
2019
2020	Data4_Crossbit: Crossbit
2021	GENERIC MAP(number_of_ports => 11)
2022	PORT MAP(
2023
2024	Control => Ctrl,
2025	Data_In(1) => Port1_in(4),
2026	Data_In(2) => Port2_in(4),
2027	Data_In(3) => Port3_in(4),
2028	Data_In(4) => Port4_in(4),
2029	Data_In(5) => Port5_in(4),
2030	Data_In(6) => Port6_in(4),
2031	Data_In(7) => Port7_in(4),
2032	Data_In(8) => Port8_in(4),
2033	Data_In(9) => Port9_in(4),
2034	Data_In(10) => Port10_in(4),
2035	Data_In(11) => Port11_in(4),
2036	Data_out(1)=> Port1_out(4),
2037	Data_out(2)=> Port2_out(4),
2038	Data_out(3)=> Port3_out(4),
2039	Data_out(4)=> Port4_out(4),
2040	Data_out(5)=> Port5_out(4),
2041	Data_out(6)=> Port6_out(4),
2042	Data_out(7)=> Port7_out(4),
2043	Data_out(8)=> Port8_out(4),
2044	Data_out(9)=> Port9_out(4),
2045	Data_out(10)=> Port10_out(4),
2046	Data_out(11)=> Port11_out(4)
2047
2048	);
2049	-- crossbit du bit 5 de donnée
2050
2051	Data5_Crossbit: Crossbit
2052	GENERIC MAP(number_of_ports => 11)
2053	PORT MAP(
2054
2055	Control => Ctrl,
2056	Data_In(1) => Port1_in(5),
2057	Data_In(2) => Port2_in(5),
2058	Data_In(3) => Port3_in(5),
2059	Data_In(4) => Port4_in(5),
2060	Data_In(5) => Port5_in(5),
2061	Data_In(6) => Port6_in(5),
2062	Data_In(7) => Port7_in(5),
2063	Data_In(8) => Port8_in(5),
2064	Data_In(9) => Port9_in(5),
2065	Data_In(10) => Port10_in(5),
2066	Data_In(11) => Port11_in(5),
2067	Data_out(1)=> Port1_out(5),
2068	Data_out(2)=> Port2_out(5),
2069	Data_out(3)=> Port3_out(5),
2070	Data_out(4)=> Port4_out(5),
2071	Data_out(5)=> Port5_out(5),
2072	Data_out(6)=> Port6_out(5),
2073	Data_out(7)=> Port7_out(5),
2074	Data_out(8)=> Port8_out(5),
2075	Data_out(9)=> Port9_out(5),
2076	Data_out(10)=> Port10_out(5),
2077	Data_out(11)=> Port11_out(5)
2078
2079	);
2080	-- crossbit du bit 6 de donnée
2081
2082	Data6_Crossbit: Crossbit
2083	GENERIC MAP(number_of_ports => 11)
2084	PORT MAP(
2085
2086	Control => Ctrl,
2087	Data_In(1) => Port1_in(6),
2088	Data_In(2) => Port2_in(6),
2089	Data_In(3) => Port3_in(6),
2090	Data_In(4) => Port4_in(6),
2091	Data_In(5) => Port5_in(6),
2092	Data_In(6) => Port6_in(6),
2093	Data_In(7) => Port7_in(6),
2094	Data_In(8) => Port8_in(6),
2095	Data_In(9) => Port9_in(6),
2096	Data_In(10) => Port10_in(6),
2097	Data_In(11) => Port11_in(6),
2098	Data_out(1)=> Port1_out(6),
2099	Data_out(2)=> Port2_out(6),
2100	Data_out(3)=> Port3_out(6),
2101	Data_out(4)=> Port4_out(6),
2102	Data_out(5)=> Port5_out(6),
2103	Data_out(6)=> Port6_out(6),
2104	Data_out(7)=> Port7_out(6),
2105	Data_out(8)=> Port8_out(6),
2106	Data_out(9)=> Port9_out(6),
2107	Data_out(10)=> Port10_out(6),
2108	Data_out(11)=> Port11_out(6)
2109
2110	);
2111	-- crossbit du bit 7 de donnée
2112
2113	Data7_Crossbit: Crossbit
2114	GENERIC MAP(number_of_ports => 11)
2115	PORT MAP(
2116
2117	Control => Ctrl,
2118	Data_In(1) => Port1_in(7),
2119	Data_In(2) => Port2_in(7),
2120	Data_In(3) => Port3_in(7),
2121	Data_In(4) => Port4_in(7),
2122	Data_In(5) => Port5_in(7),
2123	Data_In(6) => Port6_in(7),
2124	Data_In(7) => Port7_in(7),
2125	Data_In(8) => Port8_in(7),
2126	Data_In(9) => Port9_in(7),
2127	Data_In(10) => Port10_in(7),
2128	Data_In(11) => Port11_in(7),
2129	Data_out(1)=> Port1_out(7),
2130	Data_out(2)=> Port2_out(7),
2131	Data_out(3)=> Port3_out(7),
2132	Data_out(4)=> Port4_out(7),
2133	Data_out(5)=> Port5_out(7),
2134	Data_out(6)=> Port6_out(7),
2135	Data_out(7)=> Port7_out(7),
2136	Data_out(8)=> Port8_out(7),
2137	Data_out(9)=> Port9_out(7),
2138	Data_out(10)=> Port10_out(7),
2139	Data_out(11)=> Port11_out(7)
2140
2141	);
2142	-- crossbit du pulse_out 11 ports
2143
2144	Pulse_out_Crossbit11: Crossbit
2145	GENERIC MAP(number_of_ports => 11)
2146	PORT MAP(
2147
2148	Control => Ctrl,
2149	Data_In(1) => Port1_pulse_in,
2150	Data_In(2) => Port2_pulse_in,
2151	Data_In(3) => Port3_pulse_in,
2152	Data_In(4) => Port4_pulse_in,
2153	Data_In(5) => Port5_pulse_in,
2154	Data_In(6) => Port6_pulse_in,
2155	Data_In(7) => Port7_pulse_in,
2156	Data_In(8) => Port8_pulse_in,
2157	Data_In(9) => Port9_pulse_in,
2158	Data_In(10) => Port10_pulse_in,
2159	Data_In(11) => Port11_pulse_in,
2160	Data_out(1) => Port1_pulse_out,
2161	Data_out(2) => Port2_pulse_out,
2162	Data_out(3) => Port3_pulse_out,
2163	Data_out(4) => Port4_pulse_out,
2164	Data_out(5) => Port5_pulse_out,
2165	Data_out(6) => Port6_pulse_out,
2166	Data_out(7) => Port7_pulse_out,
2167	Data_out(8) => Port8_pulse_out,
2168	Data_out(9) => Port9_pulse_out,
2169	Data_out(10) => Port10_pulse_out,
2170	Data_out(11) => Port11_pulse_out
2171
2172	);
2173	end generate crossbar11x11;
2174
2175
2176	--======================crossbar 12 ports=======================
2177
2178	crossbar12x12 : if number_of_crossbar_ports = 12 generate
2179
2180	-- crossbit du bit 0 de donnée
2181
2182	Data0_Crossbit: Crossbit
2183	GENERIC MAP(number_of_ports => 12)
2184	PORT MAP(
2185
2186	Control => Ctrl,
2187	Data_In(1) => Port1_in(0),
2188	Data_In(2) => Port2_in(0),
2189	Data_In(3) => Port3_in(0),
2190	Data_In(4) => Port4_in(0),
2191	Data_In(5) => Port5_in(0),
2192	Data_In(6) => Port6_in(0),
2193	Data_In(7) => Port7_in(0),
2194	Data_In(8) => Port8_in(0),
2195	Data_In(9) => Port9_in(0),
2196	Data_In(10) => Port10_in(0),
2197	Data_In(11) => Port11_in(0),
2198	Data_In(12) => Port12_in(0),
2199	Data_out(1)=> Port1_out(0),
2200	Data_out(2)=> Port2_out(0),
2201	Data_out(3)=> Port3_out(0),
2202	Data_out(4)=> Port4_out(0),
2203	Data_out(5)=> Port5_out(0),
2204	Data_out(6)=> Port6_out(0),
2205	Data_out(7)=> Port7_out(0),
2206	Data_out(8)=> Port8_out(0),
2207	Data_out(9)=> Port9_out(0),
2208	Data_out(10)=> Port10_out(0),
2209	Data_out(11)=> Port11_out(0),
2210	Data_out(12)=> Port12_out(0)
2211
2212	);
2213	-- crossbit du bit 1 de donnée
2214
2215	Data1_Crossbit: Crossbit
2216	GENERIC MAP(number_of_ports => 12)
2217	PORT MAP(
2218
2219	Control => Ctrl,
2220	Data_In(1) => Port1_in(1),
2221	Data_In(2) => Port2_in(1),
2222	Data_In(3) => Port3_in(1),
2223	Data_In(4) => Port4_in(1),
2224	Data_In(5) => Port5_in(1),
2225	Data_In(6) => Port6_in(1),
2226	Data_In(7) => Port7_in(1),
2227	Data_In(8) => Port8_in(1),
2228	Data_In(9) => Port9_in(1),
2229	Data_In(10) => Port10_in(1),
2230	Data_In(11) => Port11_in(1),
2231	Data_In(12) => Port12_in(1),
2232	Data_out(1)=> Port1_out(1),
2233	Data_out(2)=> Port2_out(1),
2234	Data_out(3)=> Port3_out(1),
2235	Data_out(4)=> Port4_out(1),
2236	Data_out(5)=> Port5_out(1),
2237	Data_out(6)=> Port6_out(1),
2238	Data_out(7)=> Port7_out(1),
2239	Data_out(8)=> Port8_out(1),
2240	Data_out(9)=> Port9_out(1),
2241	Data_out(10)=> Port10_out(1),
2242	Data_out(11)=> Port11_out(1),
2243	Data_out(12)=> Port12_out(1)
2244
2245	);
2246	-- crossbit du bit 2 de donnée
2247
2248	Data2_Crossbit: Crossbit
2249	GENERIC MAP(number_of_ports => 12)
2250	PORT MAP(
2251
2252	Control => Ctrl,
2253	Data_In(1) => Port1_in(2),
2254	Data_In(2) => Port2_in(2),
2255	Data_In(3) => Port3_in(2),
2256	Data_In(4) => Port4_in(2),
2257	Data_In(5) => Port5_in(2),
2258	Data_In(6) => Port6_in(2),
2259	Data_In(7) => Port7_in(2),
2260	Data_In(8) => Port8_in(2),
2261	Data_In(9) => Port9_in(2),
2262	Data_In(10) => Port10_in(2),
2263	Data_In(11) => Port11_in(2),
2264	Data_In(12) => Port12_in(2),
2265	Data_out(1)=> Port1_out(2),
2266	Data_out(2)=> Port2_out(2),
2267	Data_out(3)=> Port3_out(2),
2268	Data_out(4)=> Port4_out(2),
2269	Data_out(5)=> Port5_out(2),
2270	Data_out(6)=> Port6_out(2),
2271	Data_out(7)=> Port7_out(2),
2272	Data_out(8)=> Port8_out(2),
2273	Data_out(9)=> Port9_out(2),
2274	Data_out(10)=> Port10_out(2),
2275	Data_out(11)=> Port11_out(2),
2276	Data_out(12)=> Port12_out(2)
2277
2278	);
2279	-- crossbit du bit 3 de donnée
2280
2281	Data3_Crossbit: Crossbit
2282	GENERIC MAP(number_of_ports => 12)
2283	PORT MAP(
2284
2285	Control => Ctrl,
2286	Data_In(1) => Port1_in(3),
2287	Data_In(2) => Port2_in(3),
2288	Data_In(3) => Port3_in(3),
2289	Data_In(4) => Port4_in(3),
2290	Data_In(5) => Port5_in(3),
2291	Data_In(6) => Port6_in(3),
2292	Data_In(7) => Port7_in(3),
2293	Data_In(8) => Port8_in(3),
2294	Data_In(9) => Port9_in(3),
2295	Data_In(10) => Port10_in(3),
2296	Data_In(11) => Port11_in(3),
2297	Data_In(12) => Port12_in(3),
2298	Data_out(1)=> Port1_out(3),
2299	Data_out(2)=> Port2_out(3),
2300	Data_out(3)=> Port3_out(3),
2301	Data_out(4)=> Port4_out(3),
2302	Data_out(5)=> Port5_out(3),
2303	Data_out(6)=> Port6_out(3),
2304	Data_out(7)=> Port7_out(3),
2305	Data_out(8)=> Port8_out(3),
2306	Data_out(9)=> Port9_out(3),
2307	Data_out(10)=> Port10_out(3),
2308	Data_out(11)=> Port11_out(3),
2309	Data_out(12)=> Port12_out(3)
2310
2311	);
2312	-- crossbit du bit 4 de donnée
2313
2314	Data4_Crossbit: Crossbit
2315	GENERIC MAP(number_of_ports => 12)
2316	PORT MAP(
2317
2318	Control => Ctrl,
2319	Data_In(1) => Port1_in(4),
2320	Data_In(2) => Port2_in(4),
2321	Data_In(3) => Port3_in(4),
2322	Data_In(4) => Port4_in(4),
2323	Data_In(5) => Port5_in(4),
2324	Data_In(6) => Port6_in(4),
2325	Data_In(7) => Port7_in(4),
2326	Data_In(8) => Port8_in(4),
2327	Data_In(9) => Port9_in(4),
2328	Data_In(10) => Port10_in(4),
2329	Data_In(11) => Port11_in(4),
2330	Data_In(12) => Port12_in(4),
2331	Data_out(1)=> Port1_out(4),
2332	Data_out(2)=> Port2_out(4),
2333	Data_out(3)=> Port3_out(4),
2334	Data_out(4)=> Port4_out(4),
2335	Data_out(5)=> Port5_out(4),
2336	Data_out(6)=> Port6_out(4),
2337	Data_out(7)=> Port7_out(4),
2338	Data_out(8)=> Port8_out(4),
2339	Data_out(9)=> Port9_out(4),
2340	Data_out(10)=> Port10_out(4),
2341	Data_out(11)=> Port11_out(4),
2342	Data_out(12)=> Port12_out(4)
2343
2344	);
2345	-- crossbit du bit 5 de donnée
2346
2347	Data5_Crossbit: Crossbit
2348	GENERIC MAP(number_of_ports => 12)
2349	PORT MAP(
2350
2351	Control => Ctrl,
2352	Data_In(1) => Port1_in(5),
2353	Data_In(2) => Port2_in(5),
2354	Data_In(3) => Port3_in(5),
2355	Data_In(4) => Port4_in(5),
2356	Data_In(5) => Port5_in(5),
2357	Data_In(6) => Port6_in(5),
2358	Data_In(7) => Port7_in(5),
2359	Data_In(8) => Port8_in(5),
2360	Data_In(9) => Port9_in(5),
2361	Data_In(10) => Port10_in(5),
2362	Data_In(11) => Port11_in(5),
2363	Data_In(12) => Port12_in(5),
2364	Data_out(1)=> Port1_out(5),
2365	Data_out(2)=> Port2_out(5),
2366	Data_out(3)=> Port3_out(5),
2367	Data_out(4)=> Port4_out(5),
2368	Data_out(5)=> Port5_out(5),
2369	Data_out(6)=> Port6_out(5),
2370	Data_out(7)=> Port7_out(5),
2371	Data_out(8)=> Port8_out(5),
2372	Data_out(9)=> Port9_out(5),
2373	Data_out(10)=> Port10_out(5),
2374	Data_out(11)=> Port11_out(5),
2375	Data_out(12)=> Port12_out(5)
2376
2377	);
2378	-- crossbit du bit 6 de donnée
2379
2380	Data6_Crossbit: Crossbit
2381	GENERIC MAP(number_of_ports => 12)
2382	PORT MAP(
2383
2384	Control => Ctrl,
2385	Data_In(1) => Port1_in(6),
2386	Data_In(2) => Port2_in(6),
2387	Data_In(3) => Port3_in(6),
2388	Data_In(4) => Port4_in(6),
2389	Data_In(5) => Port5_in(6),
2390	Data_In(6) => Port6_in(6),
2391	Data_In(7) => Port7_in(6),
2392	Data_In(8) => Port8_in(6),
2393	Data_In(9) => Port9_in(6),
2394	Data_In(10) => Port10_in(6),
2395	Data_In(11) => Port11_in(6),
2396	Data_In(12) => Port12_in(6),
2397	Data_out(1)=> Port1_out(6),
2398	Data_out(2)=> Port2_out(6),
2399	Data_out(3)=> Port3_out(6),
2400	Data_out(4)=> Port4_out(6),
2401	Data_out(5)=> Port5_out(6),
2402	Data_out(6)=> Port6_out(6),
2403	Data_out(7)=> Port7_out(6),
2404	Data_out(8)=> Port8_out(6),
2405	Data_out(9)=> Port9_out(6),
2406	Data_out(10)=> Port10_out(6),
2407	Data_out(11)=> Port11_out(6),
2408	Data_out(12)=> Port12_out(6)
2409
2410	);
2411	-- crossbit du bit 7 de donnée
2412
2413	Data7_Crossbit: Crossbit
2414	GENERIC MAP(number_of_ports => 12)
2415	PORT MAP(
2416
2417	Control => Ctrl,
2418	Data_In(1) => Port1_in(7),
2419	Data_In(2) => Port2_in(7),
2420	Data_In(3) => Port3_in(7),
2421	Data_In(4) => Port4_in(7),
2422	Data_In(5) => Port5_in(7),
2423	Data_In(6) => Port6_in(7),
2424	Data_In(7) => Port7_in(7),
2425	Data_In(8) => Port8_in(7),
2426	Data_In(9) => Port9_in(7),
2427	Data_In(10) => Port10_in(7),
2428	Data_In(11) => Port11_in(7),
2429	Data_In(12) => Port12_in(7),
2430	Data_out(1)=> Port1_out(7),
2431	Data_out(2)=> Port2_out(7),
2432	Data_out(3)=> Port3_out(7),
2433	Data_out(4)=> Port4_out(7),
2434	Data_out(5)=> Port5_out(7),
2435	Data_out(6)=> Port6_out(7),
2436	Data_out(7)=> Port7_out(7),
2437	Data_out(8)=> Port8_out(7),
2438	Data_out(9)=> Port9_out(7),
2439	Data_out(10)=> Port10_out(7),
2440	Data_out(11)=> Port11_out(7),
2441	Data_out(12)=> Port12_out(7)
2442
2443	);
2444	-- crossbit du pulse_out 12 ports
2445
2446	Pulse_out_Crossbit12: Crossbit
2447	GENERIC MAP(number_of_ports => 12)
2448	PORT MAP(
2449
2450	Control => Ctrl,
2451	Data_In(1) => Port1_pulse_in,
2452	Data_In(2) => Port2_pulse_in,
2453	Data_In(3) => Port3_pulse_in,
2454	Data_In(4) => Port4_pulse_in,
2455	Data_In(5) => Port5_pulse_in,
2456	Data_In(6) => Port6_pulse_in,
2457	Data_In(7) => Port7_pulse_in,
2458	Data_In(8) => Port8_pulse_in,
2459	Data_In(9) => Port9_pulse_in,
2460	Data_In(10) => Port10_pulse_in,
2461	Data_In(11) => Port11_pulse_in,
2462	Data_In(12) => Port12_pulse_in,
2463	Data_out(1) => Port1_pulse_out,
2464	Data_out(2) => Port2_pulse_out,
2465	Data_out(3) => Port3_pulse_out,
2466	Data_out(4) => Port4_pulse_out,
2467	Data_out(5) => Port5_pulse_out,
2468	Data_out(6) => Port6_pulse_out,
2469	Data_out(7) => Port7_pulse_out,
2470	Data_out(8) => Port8_pulse_out,
2471	Data_out(9) => Port9_pulse_out,
2472	Data_out(10) => Port10_pulse_out,
2473	Data_out(11) => Port11_pulse_out,
2474	Data_out(12) => Port12_pulse_out
2475
2476	);
2477	end generate crossbar12x12;
2478
2479
2480	--======================crossbar 13 ports=======================
2481
2482	crossbar13x13 : if number_of_crossbar_ports = 13 generate
2483
2484	-- crossbit du bit 0 de donnée
2485
2486	Data0_Crossbit: Crossbit
2487	GENERIC MAP(number_of_ports => 13)
2488	PORT MAP(
2489
2490	Control => Ctrl,
2491	Data_In(1) => Port1_in(0),
2492	Data_In(2) => Port2_in(0),
2493	Data_In(3) => Port3_in(0),
2494	Data_In(4) => Port4_in(0),
2495	Data_In(5) => Port5_in(0),
2496	Data_In(6) => Port6_in(0),
2497	Data_In(7) => Port7_in(0),
2498	Data_In(8) => Port8_in(0),
2499	Data_In(9) => Port9_in(0),
2500	Data_In(10) => Port10_in(0),
2501	Data_In(11) => Port11_in(0),
2502	Data_In(12) => Port12_in(0),
2503	Data_In(13) => Port13_in(0),
2504	Data_out(1)=> Port1_out(0),
2505	Data_out(2)=> Port2_out(0),
2506	Data_out(3)=> Port3_out(0),
2507	Data_out(4)=> Port4_out(0),
2508	Data_out(5)=> Port5_out(0),
2509	Data_out(6)=> Port6_out(0),
2510	Data_out(7)=> Port7_out(0),
2511	Data_out(8)=> Port8_out(0),
2512	Data_out(9)=> Port9_out(0),
2513	Data_out(10)=> Port10_out(0),
2514	Data_out(11)=> Port11_out(0),
2515	Data_out(12)=> Port12_out(0),
2516	Data_out(13)=> Port13_out(0)
2517
2518	);
2519	-- crossbit du bit 1 de donnée
2520
2521	Data1_Crossbit: Crossbit
2522	GENERIC MAP(number_of_ports => 13)
2523	PORT MAP(
2524
2525	Control => Ctrl,
2526	Data_In(1) => Port1_in(1),
2527	Data_In(2) => Port2_in(1),
2528	Data_In(3) => Port3_in(1),
2529	Data_In(4) => Port4_in(1),
2530	Data_In(5) => Port5_in(1),
2531	Data_In(6) => Port6_in(1),
2532	Data_In(7) => Port7_in(1),
2533	Data_In(8) => Port8_in(1),
2534	Data_In(9) => Port9_in(1),
2535	Data_In(10) => Port10_in(1),
2536	Data_In(11) => Port11_in(1),
2537	Data_In(12) => Port12_in(1),
2538	Data_In(13) => Port13_in(1),
2539	Data_out(1)=> Port1_out(1),
2540	Data_out(2)=> Port2_out(1),
2541	Data_out(3)=> Port3_out(1),
2542	Data_out(4)=> Port4_out(1),
2543	Data_out(5)=> Port5_out(1),
2544	Data_out(6)=> Port6_out(1),
2545	Data_out(7)=> Port7_out(1),
2546	Data_out(8)=> Port8_out(1),
2547	Data_out(9)=> Port9_out(1),
2548	Data_out(10)=> Port10_out(1),
2549	Data_out(11)=> Port11_out(1),
2550	Data_out(12)=> Port12_out(1),
2551	Data_out(13)=> Port13_out(1)
2552
2553	);
2554	-- crossbit du bit 2 de donnée
2555
2556	Data2_Crossbit: Crossbit
2557	GENERIC MAP(number_of_ports => 13)
2558	PORT MAP(
2559
2560	Control => Ctrl,
2561	Data_In(1) => Port1_in(2),
2562	Data_In(2) => Port2_in(2),
2563	Data_In(3) => Port3_in(2),
2564	Data_In(4) => Port4_in(2),
2565	Data_In(5) => Port5_in(2),
2566	Data_In(6) => Port6_in(2),
2567	Data_In(7) => Port7_in(2),
2568	Data_In(8) => Port8_in(2),
2569	Data_In(9) => Port9_in(2),
2570	Data_In(10) => Port10_in(2),
2571	Data_In(11) => Port11_in(2),
2572	Data_In(12) => Port12_in(2),
2573	Data_In(13) => Port13_in(2),
2574	Data_out(1)=> Port1_out(2),
2575	Data_out(2)=> Port2_out(2),
2576	Data_out(3)=> Port3_out(2),
2577	Data_out(4)=> Port4_out(2),
2578	Data_out(5)=> Port5_out(2),
2579	Data_out(6)=> Port6_out(2),
2580	Data_out(7)=> Port7_out(2),
2581	Data_out(8)=> Port8_out(2),
2582	Data_out(9)=> Port9_out(2),
2583	Data_out(10)=> Port10_out(2),
2584	Data_out(11)=> Port11_out(2),
2585	Data_out(12)=> Port12_out(2),
2586	Data_out(13)=> Port13_out(2)
2587
2588	);
2589	-- crossbit du bit 3 de donnée
2590
2591	Data3_Crossbit: Crossbit
2592	GENERIC MAP(number_of_ports => 13)
2593	PORT MAP(
2594
2595	Control => Ctrl,
2596	Data_In(1) => Port1_in(3),
2597	Data_In(2) => Port2_in(3),
2598	Data_In(3) => Port3_in(3),
2599	Data_In(4) => Port4_in(3),
2600	Data_In(5) => Port5_in(3),
2601	Data_In(6) => Port6_in(3),
2602	Data_In(7) => Port7_in(3),
2603	Data_In(8) => Port8_in(3),
2604	Data_In(9) => Port9_in(3),
2605	Data_In(10) => Port10_in(3),
2606	Data_In(11) => Port11_in(3),
2607	Data_In(12) => Port12_in(3),
2608	Data_In(13) => Port13_in(3),
2609	Data_out(1)=> Port1_out(3),
2610	Data_out(2)=> Port2_out(3),
2611	Data_out(3)=> Port3_out(3),
2612	Data_out(4)=> Port4_out(3),
2613	Data_out(5)=> Port5_out(3),
2614	Data_out(6)=> Port6_out(3),
2615	Data_out(7)=> Port7_out(3),
2616	Data_out(8)=> Port8_out(3),
2617	Data_out(9)=> Port9_out(3),
2618	Data_out(10)=> Port10_out(3),
2619	Data_out(11)=> Port11_out(3),
2620	Data_out(12)=> Port12_out(3),
2621	Data_out(13)=> Port13_out(3)
2622
2623	);
2624	-- crossbit du bit 4 de donnée
2625
2626	Data4_Crossbit: Crossbit
2627	GENERIC MAP(number_of_ports => 13)
2628	PORT MAP(
2629
2630	Control => Ctrl,
2631	Data_In(1) => Port1_in(4),
2632	Data_In(2) => Port2_in(4),
2633	Data_In(3) => Port3_in(4),
2634	Data_In(4) => Port4_in(4),
2635	Data_In(5) => Port5_in(4),
2636	Data_In(6) => Port6_in(4),
2637	Data_In(7) => Port7_in(4),
2638	Data_In(8) => Port8_in(4),
2639	Data_In(9) => Port9_in(4),
2640	Data_In(10) => Port10_in(4),
2641	Data_In(11) => Port11_in(4),
2642	Data_In(12) => Port12_in(4),
2643	Data_In(13) => Port13_in(4),
2644	Data_out(1)=> Port1_out(4),
2645	Data_out(2)=> Port2_out(4),
2646	Data_out(3)=> Port3_out(4),
2647	Data_out(4)=> Port4_out(4),
2648	Data_out(5)=> Port5_out(4),
2649	Data_out(6)=> Port6_out(4),
2650	Data_out(7)=> Port7_out(4),
2651	Data_out(8)=> Port8_out(4),
2652	Data_out(9)=> Port9_out(4),
2653	Data_out(10)=> Port10_out(4),
2654	Data_out(11)=> Port11_out(4),
2655	Data_out(12)=> Port12_out(4),
2656	Data_out(13)=> Port13_out(4)
2657
2658	);
2659	-- crossbit du bit 5 de donnée
2660
2661	Data5_Crossbit: Crossbit
2662	GENERIC MAP(number_of_ports => 13)
2663	PORT MAP(
2664
2665	Control => Ctrl,
2666	Data_In(1) => Port1_in(5),
2667	Data_In(2) => Port2_in(5),
2668	Data_In(3) => Port3_in(5),
2669	Data_In(4) => Port4_in(5),
2670	Data_In(5) => Port5_in(5),
2671	Data_In(6) => Port6_in(5),
2672	Data_In(7) => Port7_in(5),
2673	Data_In(8) => Port8_in(5),
2674	Data_In(9) => Port9_in(5),
2675	Data_In(10) => Port10_in(5),
2676	Data_In(11) => Port11_in(5),
2677	Data_In(12) => Port12_in(5),
2678	Data_In(13) => Port13_in(5),
2679	Data_out(1)=> Port1_out(5),
2680	Data_out(2)=> Port2_out(5),
2681	Data_out(3)=> Port3_out(5),
2682	Data_out(4)=> Port4_out(5),
2683	Data_out(5)=> Port5_out(5),
2684	Data_out(6)=> Port6_out(5),
2685	Data_out(7)=> Port7_out(5),
2686	Data_out(8)=> Port8_out(5),
2687	Data_out(9)=> Port9_out(5),
2688	Data_out(10)=> Port10_out(5),
2689	Data_out(11)=> Port11_out(5),
2690	Data_out(12)=> Port12_out(5),
2691	Data_out(13)=> Port13_out(5)
2692
2693	);
2694	-- crossbit du bit 6 de donnée
2695
2696	Data6_Crossbit: Crossbit
2697	GENERIC MAP(number_of_ports => 13)
2698	PORT MAP(
2699
2700	Control => Ctrl,
2701	Data_In(1) => Port1_in(6),
2702	Data_In(2) => Port2_in(6),
2703	Data_In(3) => Port3_in(6),
2704	Data_In(4) => Port4_in(6),
2705	Data_In(5) => Port5_in(6),
2706	Data_In(6) => Port6_in(6),
2707	Data_In(7) => Port7_in(6),
2708	Data_In(8) => Port8_in(6),
2709	Data_In(9) => Port9_in(6),
2710	Data_In(10) => Port10_in(6),
2711	Data_In(11) => Port11_in(6),
2712	Data_In(12) => Port12_in(6),
2713	Data_In(13) => Port13_in(6),
2714	Data_out(1)=> Port1_out(6),
2715	Data_out(2)=> Port2_out(6),
2716	Data_out(3)=> Port3_out(6),
2717	Data_out(4)=> Port4_out(6),
2718	Data_out(5)=> Port5_out(6),
2719	Data_out(6)=> Port6_out(6),
2720	Data_out(7)=> Port7_out(6),
2721	Data_out(8)=> Port8_out(6),
2722	Data_out(9)=> Port9_out(6),
2723	Data_out(10)=> Port10_out(6),
2724	Data_out(11)=> Port11_out(6),
2725	Data_out(12)=> Port12_out(6),
2726	Data_out(13)=> Port13_out(6)
2727
2728	);
2729	-- crossbit du bit 7 de donnée
2730
2731	Data7_Crossbit: Crossbit
2732	GENERIC MAP(number_of_ports => 13)
2733	PORT MAP(
2734
2735	Control => Ctrl,
2736	Data_In(1) => Port1_in(7),
2737	Data_In(2) => Port2_in(7),
2738	Data_In(3) => Port3_in(7),
2739	Data_In(4) => Port4_in(7),
2740	Data_In(5) => Port5_in(7),
2741	Data_In(6) => Port6_in(7),
2742	Data_In(7) => Port7_in(7),
2743	Data_In(8) => Port8_in(7),
2744	Data_In(9) => Port9_in(7),
2745	Data_In(10) => Port10_in(7),
2746	Data_In(11) => Port11_in(7),
2747	Data_In(12) => Port12_in(7),
2748	Data_In(13) => Port13_in(7),
2749	Data_out(1)=> Port1_out(7),
2750	Data_out(2)=> Port2_out(7),
2751	Data_out(3)=> Port3_out(7),
2752	Data_out(4)=> Port4_out(7),
2753	Data_out(5)=> Port5_out(7),
2754	Data_out(6)=> Port6_out(7),
2755	Data_out(7)=> Port7_out(7),
2756	Data_out(8)=> Port8_out(7),
2757	Data_out(9)=> Port9_out(7),
2758	Data_out(10)=> Port10_out(7),
2759	Data_out(11)=> Port11_out(7),
2760	Data_out(12)=> Port12_out(7),
2761	Data_out(13)=> Port13_out(7)
2762
2763	);
2764	-- crossbit du pulse_out 13 ports
2765
2766	Pulse_out_Crossbit13: Crossbit
2767	GENERIC MAP(number_of_ports => 13)
2768	PORT MAP(
2769
2770	Control => Ctrl,
2771	Data_In(1) => Port1_pulse_in,
2772	Data_In(2) => Port2_pulse_in,
2773	Data_In(3) => Port3_pulse_in,
2774	Data_In(4) => Port4_pulse_in,
2775	Data_In(5) => Port5_pulse_in,
2776	Data_In(6) => Port6_pulse_in,
2777	Data_In(7) => Port7_pulse_in,
2778	Data_In(8) => Port8_pulse_in,
2779	Data_In(9) => Port9_pulse_in,
2780	Data_In(10) => Port10_pulse_in,
2781	Data_In(11) => Port11_pulse_in,
2782	Data_In(12) => Port12_pulse_in,
2783	Data_In(13) => Port13_pulse_in,
2784	Data_out(1) => Port1_pulse_out,
2785	Data_out(2) => Port2_pulse_out,
2786	Data_out(3) => Port3_pulse_out,
2787	Data_out(4) => Port4_pulse_out,
2788	Data_out(5) => Port5_pulse_out,
2789	Data_out(6) => Port6_pulse_out,
2790	Data_out(7) => Port7_pulse_out,
2791	Data_out(8) => Port8_pulse_out,
2792	Data_out(9) => Port9_pulse_out,
2793	Data_out(10) => Port10_pulse_out,
2794	Data_out(11) => Port11_pulse_out,
2795	Data_out(12) => Port12_pulse_out,
2796	Data_out(13) => Port13_pulse_out
2797
2798	);
2799	end generate crossbar13x13;
2800
2801
2802	--======================crossbar 14 ports=======================
2803
2804	crossbar14x14 : if number_of_crossbar_ports = 14 generate
2805
2806	-- crossbit du bit 0 de donnée
2807
2808	Data0_Crossbit: Crossbit
2809	GENERIC MAP(number_of_ports => 14)
2810	PORT MAP(
2811
2812	Control => Ctrl,
2813	Data_In(1) => Port1_in(0),
2814	Data_In(2) => Port2_in(0),
2815	Data_In(3) => Port3_in(0),
2816	Data_In(4) => Port4_in(0),
2817	Data_In(5) => Port5_in(0),
2818	Data_In(6) => Port6_in(0),
2819	Data_In(7) => Port7_in(0),
2820	Data_In(8) => Port8_in(0),
2821	Data_In(9) => Port9_in(0),
2822	Data_In(10) => Port10_in(0),
2823	Data_In(11) => Port11_in(0),
2824	Data_In(12) => Port12_in(0),
2825	Data_In(13) => Port13_in(0),
2826	Data_In(14) => Port14_in(0),
2827	Data_out(1)=> Port1_out(0),
2828	Data_out(2)=> Port2_out(0),
2829	Data_out(3)=> Port3_out(0),
2830	Data_out(4)=> Port4_out(0),
2831	Data_out(5)=> Port5_out(0),
2832	Data_out(6)=> Port6_out(0),
2833	Data_out(7)=> Port7_out(0),
2834	Data_out(8)=> Port8_out(0),
2835	Data_out(9)=> Port9_out(0),
2836	Data_out(10)=> Port10_out(0),
2837	Data_out(11)=> Port11_out(0),
2838	Data_out(12)=> Port12_out(0),
2839	Data_out(13)=> Port13_out(0),
2840	Data_out(14)=> Port14_out(0)
2841
2842	);
2843	-- crossbit du bit 1 de donnée
2844
2845	Data1_Crossbit: Crossbit
2846	GENERIC MAP(number_of_ports => 14)
2847	PORT MAP(
2848
2849	Control => Ctrl,
2850	Data_In(1) => Port1_in(1),
2851	Data_In(2) => Port2_in(1),
2852	Data_In(3) => Port3_in(1),
2853	Data_In(4) => Port4_in(1),
2854	Data_In(5) => Port5_in(1),
2855	Data_In(6) => Port6_in(1),
2856	Data_In(7) => Port7_in(1),
2857	Data_In(8) => Port8_in(1),
2858	Data_In(9) => Port9_in(1),
2859	Data_In(10) => Port10_in(1),
2860	Data_In(11) => Port11_in(1),
2861	Data_In(12) => Port12_in(1),
2862	Data_In(13) => Port13_in(1),
2863	Data_In(14) => Port14_in(1),
2864	Data_out(1)=> Port1_out(1),
2865	Data_out(2)=> Port2_out(1),
2866	Data_out(3)=> Port3_out(1),
2867	Data_out(4)=> Port4_out(1),
2868	Data_out(5)=> Port5_out(1),
2869	Data_out(6)=> Port6_out(1),
2870	Data_out(7)=> Port7_out(1),
2871	Data_out(8)=> Port8_out(1),
2872	Data_out(9)=> Port9_out(1),
2873	Data_out(10)=> Port10_out(1),
2874	Data_out(11)=> Port11_out(1),
2875	Data_out(12)=> Port12_out(1),
2876	Data_out(13)=> Port13_out(1),
2877	Data_out(14)=> Port14_out(1)
2878
2879	);
2880	-- crossbit du bit 2 de donnée
2881
2882	Data2_Crossbit: Crossbit
2883	GENERIC MAP(number_of_ports => 14)
2884	PORT MAP(
2885
2886	Control => Ctrl,
2887	Data_In(1) => Port1_in(2),
2888	Data_In(2) => Port2_in(2),
2889	Data_In(3) => Port3_in(2),
2890	Data_In(4) => Port4_in(2),
2891	Data_In(5) => Port5_in(2),
2892	Data_In(6) => Port6_in(2),
2893	Data_In(7) => Port7_in(2),
2894	Data_In(8) => Port8_in(2),
2895	Data_In(9) => Port9_in(2),
2896	Data_In(10) => Port10_in(2),
2897	Data_In(11) => Port11_in(2),
2898	Data_In(12) => Port12_in(2),
2899	Data_In(13) => Port13_in(2),
2900	Data_In(14) => Port14_in(2),
2901	Data_out(1)=> Port1_out(2),
2902	Data_out(2)=> Port2_out(2),
2903	Data_out(3)=> Port3_out(2),
2904	Data_out(4)=> Port4_out(2),
2905	Data_out(5)=> Port5_out(2),
2906	Data_out(6)=> Port6_out(2),
2907	Data_out(7)=> Port7_out(2),
2908	Data_out(8)=> Port8_out(2),
2909	Data_out(9)=> Port9_out(2),
2910	Data_out(10)=> Port10_out(2),
2911	Data_out(11)=> Port11_out(2),
2912	Data_out(12)=> Port12_out(2),
2913	Data_out(13)=> Port13_out(2),
2914	Data_out(14)=> Port14_out(2)
2915
2916	);
2917	-- crossbit du bit 3 de donnée
2918
2919	Data3_Crossbit: Crossbit
2920	GENERIC MAP(number_of_ports => 14)
2921	PORT MAP(
2922
2923	Control => Ctrl,
2924	Data_In(1) => Port1_in(3),
2925	Data_In(2) => Port2_in(3),
2926	Data_In(3) => Port3_in(3),
2927	Data_In(4) => Port4_in(3),
2928	Data_In(5) => Port5_in(3),
2929	Data_In(6) => Port6_in(3),
2930	Data_In(7) => Port7_in(3),
2931	Data_In(8) => Port8_in(3),
2932	Data_In(9) => Port9_in(3),
2933	Data_In(10) => Port10_in(3),
2934	Data_In(11) => Port11_in(3),
2935	Data_In(12) => Port12_in(3),
2936	Data_In(13) => Port13_in(3),
2937	Data_In(14) => Port14_in(3),
2938	Data_out(1)=> Port1_out(3),
2939	Data_out(2)=> Port2_out(3),
2940	Data_out(3)=> Port3_out(3),
2941	Data_out(4)=> Port4_out(3),
2942	Data_out(5)=> Port5_out(3),
2943	Data_out(6)=> Port6_out(3),
2944	Data_out(7)=> Port7_out(3),
2945	Data_out(8)=> Port8_out(3),
2946	Data_out(9)=> Port9_out(3),
2947	Data_out(10)=> Port10_out(3),
2948	Data_out(11)=> Port11_out(3),
2949	Data_out(12)=> Port12_out(3),
2950	Data_out(13)=> Port13_out(3),
2951	Data_out(14)=> Port14_out(3)
2952
2953	);
2954	-- crossbit du bit 4 de donnée
2955
2956	Data4_Crossbit: Crossbit
2957	GENERIC MAP(number_of_ports => 14)
2958	PORT MAP(
2959
2960	Control => Ctrl,
2961	Data_In(1) => Port1_in(4),
2962	Data_In(2) => Port2_in(4),
2963	Data_In(3) => Port3_in(4),
2964	Data_In(4) => Port4_in(4),
2965	Data_In(5) => Port5_in(4),
2966	Data_In(6) => Port6_in(4),
2967	Data_In(7) => Port7_in(4),
2968	Data_In(8) => Port8_in(4),
2969	Data_In(9) => Port9_in(4),
2970	Data_In(10) => Port10_in(4),
2971	Data_In(11) => Port11_in(4),
2972	Data_In(12) => Port12_in(4),
2973	Data_In(13) => Port13_in(4),
2974	Data_In(14) => Port14_in(4),
2975	Data_out(1)=> Port1_out(4),
2976	Data_out(2)=> Port2_out(4),
2977	Data_out(3)=> Port3_out(4),
2978	Data_out(4)=> Port4_out(4),
2979	Data_out(5)=> Port5_out(4),
2980	Data_out(6)=> Port6_out(4),
2981	Data_out(7)=> Port7_out(4),
2982	Data_out(8)=> Port8_out(4),
2983	Data_out(9)=> Port9_out(4),
2984	Data_out(10)=> Port10_out(4),
2985	Data_out(11)=> Port11_out(4),
2986	Data_out(12)=> Port12_out(4),
2987	Data_out(13)=> Port13_out(4),
2988	Data_out(14)=> Port14_out(4)
2989
2990	);
2991	-- crossbit du bit 5 de donnée
2992
2993	Data5_Crossbit: Crossbit
2994	GENERIC MAP(number_of_ports => 14)
2995	PORT MAP(
2996
2997	Control => Ctrl,
2998	Data_In(1) => Port1_in(5),
2999	Data_In(2) => Port2_in(5),
3000	Data_In(3) => Port3_in(5),
3001	Data_In(4) => Port4_in(5),
3002	Data_In(5) => Port5_in(5),
3003	Data_In(6) => Port6_in(5),
3004	Data_In(7) => Port7_in(5),
3005	Data_In(8) => Port8_in(5),
3006	Data_In(9) => Port9_in(5),
3007	Data_In(10) => Port10_in(5),
3008	Data_In(11) => Port11_in(5),
3009	Data_In(12) => Port12_in(5),
3010	Data_In(13) => Port13_in(5),
3011	Data_In(14) => Port14_in(5),
3012	Data_out(1)=> Port1_out(5),
3013	Data_out(2)=> Port2_out(5),
3014	Data_out(3)=> Port3_out(5),
3015	Data_out(4)=> Port4_out(5),
3016	Data_out(5)=> Port5_out(5),
3017	Data_out(6)=> Port6_out(5),
3018	Data_out(7)=> Port7_out(5),
3019	Data_out(8)=> Port8_out(5),
3020	Data_out(9)=> Port9_out(5),
3021	Data_out(10)=> Port10_out(5),
3022	Data_out(11)=> Port11_out(5),
3023	Data_out(12)=> Port12_out(5),
3024	Data_out(13)=> Port13_out(5),
3025	Data_out(14)=> Port14_out(5)
3026
3027	);
3028	-- crossbit du bit 6 de donnée
3029
3030	Data6_Crossbit: Crossbit
3031	GENERIC MAP(number_of_ports => 14)
3032	PORT MAP(
3033
3034	Control => Ctrl,
3035	Data_In(1) => Port1_in(6),
3036	Data_In(2) => Port2_in(6),
3037	Data_In(3) => Port3_in(6),
3038	Data_In(4) => Port4_in(6),
3039	Data_In(5) => Port5_in(6),
3040	Data_In(6) => Port6_in(6),
3041	Data_In(7) => Port7_in(6),
3042	Data_In(8) => Port8_in(6),
3043	Data_In(9) => Port9_in(6),
3044	Data_In(10) => Port10_in(6),
3045	Data_In(11) => Port11_in(6),
3046	Data_In(12) => Port12_in(6),
3047	Data_In(13) => Port13_in(6),
3048	Data_In(14) => Port14_in(6),
3049	Data_out(1)=> Port1_out(6),
3050	Data_out(2)=> Port2_out(6),
3051	Data_out(3)=> Port3_out(6),
3052	Data_out(4)=> Port4_out(6),
3053	Data_out(5)=> Port5_out(6),
3054	Data_out(6)=> Port6_out(6),
3055	Data_out(7)=> Port7_out(6),
3056	Data_out(8)=> Port8_out(6),
3057	Data_out(9)=> Port9_out(6),
3058	Data_out(10)=> Port10_out(6),
3059	Data_out(11)=> Port11_out(6),
3060	Data_out(12)=> Port12_out(6),
3061	Data_out(13)=> Port13_out(6),
3062	Data_out(14)=> Port14_out(6)
3063
3064	);
3065	-- crossbit du bit 7 de donnée
3066
3067	Data7_Crossbit: Crossbit
3068	GENERIC MAP(number_of_ports => 14)
3069	PORT MAP(
3070
3071	Control => Ctrl,
3072	Data_In(1) => Port1_in(7),
3073	Data_In(2) => Port2_in(7),
3074	Data_In(3) => Port3_in(7),
3075	Data_In(4) => Port4_in(7),
3076	Data_In(5) => Port5_in(7),
3077	Data_In(6) => Port6_in(7),
3078	Data_In(7) => Port7_in(7),
3079	Data_In(8) => Port8_in(7),
3080	Data_In(9) => Port9_in(7),
3081	Data_In(10) => Port10_in(7),
3082	Data_In(11) => Port11_in(7),
3083	Data_In(12) => Port12_in(7),
3084	Data_In(13) => Port13_in(7),
3085	Data_In(14) => Port14_in(7),
3086	Data_out(1)=> Port1_out(7),
3087	Data_out(2)=> Port2_out(7),
3088	Data_out(3)=> Port3_out(7),
3089	Data_out(4)=> Port4_out(7),
3090	Data_out(5)=> Port5_out(7),
3091	Data_out(6)=> Port6_out(7),
3092	Data_out(7)=> Port7_out(7),
3093	Data_out(8)=> Port8_out(7),
3094	Data_out(9)=> Port9_out(7),
3095	Data_out(10)=> Port10_out(7),
3096	Data_out(11)=> Port11_out(7),
3097	Data_out(12)=> Port12_out(7),
3098	Data_out(13)=> Port13_out(7),
3099	Data_out(14)=> Port14_out(7)
3100
3101	);
3102	-- crossbit du pulse_out 14 ports
3103
3104	Pulse_out_Crossbit14: Crossbit
3105	GENERIC MAP(number_of_ports => 14)
3106	PORT MAP(
3107
3108	Control => Ctrl,
3109	Data_In(1) => Port1_pulse_in,
3110	Data_In(2) => Port2_pulse_in,
3111	Data_In(3) => Port3_pulse_in,
3112	Data_In(4) => Port4_pulse_in,
3113	Data_In(5) => Port5_pulse_in,
3114	Data_In(6) => Port6_pulse_in,
3115	Data_In(7) => Port7_pulse_in,
3116	Data_In(8) => Port8_pulse_in,
3117	Data_In(9) => Port9_pulse_in,
3118	Data_In(10) => Port10_pulse_in,
3119	Data_In(11) => Port11_pulse_in,
3120	Data_In(12) => Port12_pulse_in,
3121	Data_In(13) => Port13_pulse_in,
3122	Data_In(14) => Port14_pulse_in,
3123	Data_out(1) => Port1_pulse_out,
3124	Data_out(2) => Port2_pulse_out,
3125	Data_out(3) => Port3_pulse_out,
3126	Data_out(4) => Port4_pulse_out,
3127	Data_out(5) => Port5_pulse_out,
3128	Data_out(6) => Port6_pulse_out,
3129	Data_out(7) => Port7_pulse_out,
3130	Data_out(8) => Port8_pulse_out,
3131	Data_out(9) => Port9_pulse_out,
3132	Data_out(10) => Port10_pulse_out,
3133	Data_out(11) => Port11_pulse_out,
3134	Data_out(12) => Port12_pulse_out,
3135	Data_out(13) => Port13_pulse_out,
3136	Data_out(14) => Port14_pulse_out
3137
3138	);
3139	end generate crossbar14x14;
3140
3141
3142	--======================crossbar 15 ports=======================
3143
3144	crossbar15x15 : if number_of_crossbar_ports = 15 generate
3145
3146	-- crossbit du bit 0 de donnée
3147
3148	Data0_Crossbit: Crossbit
3149	GENERIC MAP(number_of_ports => 15)
3150	PORT MAP(
3151
3152	Control => Ctrl,
3153	Data_In(1) => Port1_in(0),
3154	Data_In(2) => Port2_in(0),
3155	Data_In(3) => Port3_in(0),
3156	Data_In(4) => Port4_in(0),
3157	Data_In(5) => Port5_in(0),
3158	Data_In(6) => Port6_in(0),
3159	Data_In(7) => Port7_in(0),
3160	Data_In(8) => Port8_in(0),
3161	Data_In(9) => Port9_in(0),
3162	Data_In(10) => Port10_in(0),
3163	Data_In(11) => Port11_in(0),
3164	Data_In(12) => Port12_in(0),
3165	Data_In(13) => Port13_in(0),
3166	Data_In(14) => Port14_in(0),
3167	Data_In(15) => Port15_in(0),
3168	Data_out(1)=> Port1_out(0),
3169	Data_out(2)=> Port2_out(0),
3170	Data_out(3)=> Port3_out(0),
3171	Data_out(4)=> Port4_out(0),
3172	Data_out(5)=> Port5_out(0),
3173	Data_out(6)=> Port6_out(0),
3174	Data_out(7)=> Port7_out(0),
3175	Data_out(8)=> Port8_out(0),
3176	Data_out(9)=> Port9_out(0),
3177	Data_out(10)=> Port10_out(0),
3178	Data_out(11)=> Port11_out(0),
3179	Data_out(12)=> Port12_out(0),
3180	Data_out(13)=> Port13_out(0),
3181	Data_out(14)=> Port14_out(0),
3182	Data_out(15)=> Port15_out(0)
3183
3184	);
3185	-- crossbit du bit 1 de donnée
3186
3187	Data1_Crossbit: Crossbit
3188	GENERIC MAP(number_of_ports => 15)
3189	PORT MAP(
3190
3191	Control => Ctrl,
3192	Data_In(1) => Port1_in(1),
3193	Data_In(2) => Port2_in(1),
3194	Data_In(3) => Port3_in(1),
3195	Data_In(4) => Port4_in(1),
3196	Data_In(5) => Port5_in(1),
3197	Data_In(6) => Port6_in(1),
3198	Data_In(7) => Port7_in(1),
3199	Data_In(8) => Port8_in(1),
3200	Data_In(9) => Port9_in(1),
3201	Data_In(10) => Port10_in(1),
3202	Data_In(11) => Port11_in(1),
3203	Data_In(12) => Port12_in(1),
3204	Data_In(13) => Port13_in(1),
3205	Data_In(14) => Port14_in(1),
3206	Data_In(15) => Port15_in(1),
3207	Data_out(1)=> Port1_out(1),
3208	Data_out(2)=> Port2_out(1),
3209	Data_out(3)=> Port3_out(1),
3210	Data_out(4)=> Port4_out(1),
3211	Data_out(5)=> Port5_out(1),
3212	Data_out(6)=> Port6_out(1),
3213	Data_out(7)=> Port7_out(1),
3214	Data_out(8)=> Port8_out(1),
3215	Data_out(9)=> Port9_out(1),
3216	Data_out(10)=> Port10_out(1),
3217	Data_out(11)=> Port11_out(1),
3218	Data_out(12)=> Port12_out(1),
3219	Data_out(13)=> Port13_out(1),
3220	Data_out(14)=> Port14_out(1),
3221	Data_out(15)=> Port15_out(1)
3222
3223	);
3224	-- crossbit du bit 2 de donnée
3225
3226	Data2_Crossbit: Crossbit
3227	GENERIC MAP(number_of_ports => 15)
3228	PORT MAP(
3229
3230	Control => Ctrl,
3231	Data_In(1) => Port1_in(2),
3232	Data_In(2) => Port2_in(2),
3233	Data_In(3) => Port3_in(2),
3234	Data_In(4) => Port4_in(2),
3235	Data_In(5) => Port5_in(2),
3236	Data_In(6) => Port6_in(2),
3237	Data_In(7) => Port7_in(2),
3238	Data_In(8) => Port8_in(2),
3239	Data_In(9) => Port9_in(2),
3240	Data_In(10) => Port10_in(2),
3241	Data_In(11) => Port11_in(2),
3242	Data_In(12) => Port12_in(2),
3243	Data_In(13) => Port13_in(2),
3244	Data_In(14) => Port14_in(2),
3245	Data_In(15) => Port15_in(2),
3246	Data_out(1)=> Port1_out(2),
3247	Data_out(2)=> Port2_out(2),
3248	Data_out(3)=> Port3_out(2),
3249	Data_out(4)=> Port4_out(2),
3250	Data_out(5)=> Port5_out(2),
3251	Data_out(6)=> Port6_out(2),
3252	Data_out(7)=> Port7_out(2),
3253	Data_out(8)=> Port8_out(2),
3254	Data_out(9)=> Port9_out(2),
3255	Data_out(10)=> Port10_out(2),
3256	Data_out(11)=> Port11_out(2),
3257	Data_out(12)=> Port12_out(2),
3258	Data_out(13)=> Port13_out(2),
3259	Data_out(14)=> Port14_out(2),
3260	Data_out(15)=> Port15_out(2)
3261
3262	);
3263	-- crossbit du bit 3 de donnée
3264
3265	Data3_Crossbit: Crossbit
3266	GENERIC MAP(number_of_ports => 15)
3267	PORT MAP(
3268
3269	Control => Ctrl,
3270	Data_In(1) => Port1_in(3),
3271	Data_In(2) => Port2_in(3),
3272	Data_In(3) => Port3_in(3),
3273	Data_In(4) => Port4_in(3),
3274	Data_In(5) => Port5_in(3),
3275	Data_In(6) => Port6_in(3),
3276	Data_In(7) => Port7_in(3),
3277	Data_In(8) => Port8_in(3),
3278	Data_In(9) => Port9_in(3),
3279	Data_In(10) => Port10_in(3),
3280	Data_In(11) => Port11_in(3),
3281	Data_In(12) => Port12_in(3),
3282	Data_In(13) => Port13_in(3),
3283	Data_In(14) => Port14_in(3),
3284	Data_In(15) => Port15_in(3),
3285	Data_out(1)=> Port1_out(3),
3286	Data_out(2)=> Port2_out(3),
3287	Data_out(3)=> Port3_out(3),
3288	Data_out(4)=> Port4_out(3),
3289	Data_out(5)=> Port5_out(3),
3290	Data_out(6)=> Port6_out(3),
3291	Data_out(7)=> Port7_out(3),
3292	Data_out(8)=> Port8_out(3),
3293	Data_out(9)=> Port9_out(3),
3294	Data_out(10)=> Port10_out(3),
3295	Data_out(11)=> Port11_out(3),
3296	Data_out(12)=> Port12_out(3),
3297	Data_out(13)=> Port13_out(3),
3298	Data_out(14)=> Port14_out(3),
3299	Data_out(15)=> Port15_out(3)
3300
3301	);
3302	-- crossbit du bit 4 de donnée
3303
3304	Data4_Crossbit: Crossbit
3305	GENERIC MAP(number_of_ports => 15)
3306	PORT MAP(
3307
3308	Control => Ctrl,
3309	Data_In(1) => Port1_in(4),
3310	Data_In(2) => Port2_in(4),
3311	Data_In(3) => Port3_in(4),
3312	Data_In(4) => Port4_in(4),
3313	Data_In(5) => Port5_in(4),
3314	Data_In(6) => Port6_in(4),
3315	Data_In(7) => Port7_in(4),
3316	Data_In(8) => Port8_in(4),
3317	Data_In(9) => Port9_in(4),
3318	Data_In(10) => Port10_in(4),
3319	Data_In(11) => Port11_in(4),
3320	Data_In(12) => Port12_in(4),
3321	Data_In(13) => Port13_in(4),
3322	Data_In(14) => Port14_in(4),
3323	Data_In(15) => Port15_in(4),
3324	Data_out(1)=> Port1_out(4),
3325	Data_out(2)=> Port2_out(4),
3326	Data_out(3)=> Port3_out(4),
3327	Data_out(4)=> Port4_out(4),
3328	Data_out(5)=> Port5_out(4),
3329	Data_out(6)=> Port6_out(4),
3330	Data_out(7)=> Port7_out(4),
3331	Data_out(8)=> Port8_out(4),
3332	Data_out(9)=> Port9_out(4),
3333	Data_out(10)=> Port10_out(4),
3334	Data_out(11)=> Port11_out(4),
3335	Data_out(12)=> Port12_out(4),
3336	Data_out(13)=> Port13_out(4),
3337	Data_out(14)=> Port14_out(4),
3338	Data_out(15)=> Port15_out(4)
3339
3340	);
3341	-- crossbit du bit 5 de donnée
3342
3343	Data5_Crossbit: Crossbit
3344	GENERIC MAP(number_of_ports => 15)
3345	PORT MAP(
3346
3347	Control => Ctrl,
3348	Data_In(1) => Port1_in(5),
3349	Data_In(2) => Port2_in(5),
3350	Data_In(3) => Port3_in(5),
3351	Data_In(4) => Port4_in(5),
3352	Data_In(5) => Port5_in(5),
3353	Data_In(6) => Port6_in(5),
3354	Data_In(7) => Port7_in(5),
3355	Data_In(8) => Port8_in(5),
3356	Data_In(9) => Port9_in(5),
3357	Data_In(10) => Port10_in(5),
3358	Data_In(11) => Port11_in(5),
3359	Data_In(12) => Port12_in(5),
3360	Data_In(13) => Port13_in(5),
3361	Data_In(14) => Port14_in(5),
3362	Data_In(15) => Port15_in(5),
3363	Data_out(1)=> Port1_out(5),
3364	Data_out(2)=> Port2_out(5),
3365	Data_out(3)=> Port3_out(5),
3366	Data_out(4)=> Port4_out(5),
3367	Data_out(5)=> Port5_out(5),
3368	Data_out(6)=> Port6_out(5),
3369	Data_out(7)=> Port7_out(5),
3370	Data_out(8)=> Port8_out(5),
3371	Data_out(9)=> Port9_out(5),
3372	Data_out(10)=> Port10_out(5),
3373	Data_out(11)=> Port11_out(5),
3374	Data_out(12)=> Port12_out(5),
3375	Data_out(13)=> Port13_out(5),
3376	Data_out(14)=> Port14_out(5),
3377	Data_out(15)=> Port15_out(5)
3378
3379	);
3380	-- crossbit du bit 6 de donnée
3381
3382	Data6_Crossbit: Crossbit
3383	GENERIC MAP(number_of_ports => 15)
3384	PORT MAP(
3385
3386	Control => Ctrl,
3387	Data_In(1) => Port1_in(6),
3388	Data_In(2) => Port2_in(6),
3389	Data_In(3) => Port3_in(6),
3390	Data_In(4) => Port4_in(6),
3391	Data_In(5) => Port5_in(6),
3392	Data_In(6) => Port6_in(6),
3393	Data_In(7) => Port7_in(6),
3394	Data_In(8) => Port8_in(6),
3395	Data_In(9) => Port9_in(6),
3396	Data_In(10) => Port10_in(6),
3397	Data_In(11) => Port11_in(6),
3398	Data_In(12) => Port12_in(6),
3399	Data_In(13) => Port13_in(6),
3400	Data_In(14) => Port14_in(6),
3401	Data_In(15) => Port15_in(6),
3402	Data_out(1)=> Port1_out(6),
3403	Data_out(2)=> Port2_out(6),
3404	Data_out(3)=> Port3_out(6),
3405	Data_out(4)=> Port4_out(6),
3406	Data_out(5)=> Port5_out(6),
3407	Data_out(6)=> Port6_out(6),
3408	Data_out(7)=> Port7_out(6),
3409	Data_out(8)=> Port8_out(6),
3410	Data_out(9)=> Port9_out(6),
3411	Data_out(10)=> Port10_out(6),
3412	Data_out(11)=> Port11_out(6),
3413	Data_out(12)=> Port12_out(6),
3414	Data_out(13)=> Port13_out(6),
3415	Data_out(14)=> Port14_out(6),
3416	Data_out(15)=> Port15_out(6)
3417
3418	);
3419	-- crossbit du bit 7 de donnée
3420
3421	Data7_Crossbit: Crossbit
3422	GENERIC MAP(number_of_ports => 15)
3423	PORT MAP(
3424
3425	Control => Ctrl,
3426	Data_In(1) => Port1_in(7),
3427	Data_In(2) => Port2_in(7),
3428	Data_In(3) => Port3_in(7),
3429	Data_In(4) => Port4_in(7),
3430	Data_In(5) => Port5_in(7),
3431	Data_In(6) => Port6_in(7),
3432	Data_In(7) => Port7_in(7),
3433	Data_In(8) => Port8_in(7),
3434	Data_In(9) => Port9_in(7),
3435	Data_In(10) => Port10_in(7),
3436	Data_In(11) => Port11_in(7),
3437	Data_In(12) => Port12_in(7),
3438	Data_In(13) => Port13_in(7),
3439	Data_In(14) => Port14_in(7),
3440	Data_In(15) => Port15_in(7),
3441	Data_out(1)=> Port1_out(7),
3442	Data_out(2)=> Port2_out(7),
3443	Data_out(3)=> Port3_out(7),
3444	Data_out(4)=> Port4_out(7),
3445	Data_out(5)=> Port5_out(7),
3446	Data_out(6)=> Port6_out(7),
3447	Data_out(7)=> Port7_out(7),
3448	Data_out(8)=> Port8_out(7),
3449	Data_out(9)=> Port9_out(7),
3450	Data_out(10)=> Port10_out(7),
3451	Data_out(11)=> Port11_out(7),
3452	Data_out(12)=> Port12_out(7),
3453	Data_out(13)=> Port13_out(7),
3454	Data_out(14)=> Port14_out(7),
3455	Data_out(15)=> Port15_out(7)
3456
3457	);
3458	-- crossbit du pulse_out 15 ports
3459
3460	Pulse_out_Crossbit15: Crossbit
3461	GENERIC MAP(number_of_ports => 15)
3462	PORT MAP(
3463
3464	Control => Ctrl,
3465	Data_In(1) => Port1_pulse_in,
3466	Data_In(2) => Port2_pulse_in,
3467	Data_In(3) => Port3_pulse_in,
3468	Data_In(4) => Port4_pulse_in,
3469	Data_In(5) => Port5_pulse_in,
3470	Data_In(6) => Port6_pulse_in,
3471	Data_In(7) => Port7_pulse_in,
3472	Data_In(8) => Port8_pulse_in,
3473	Data_In(9) => Port9_pulse_in,
3474	Data_In(10) => Port10_pulse_in,
3475	Data_In(11) => Port11_pulse_in,
3476	Data_In(12) => Port12_pulse_in,
3477	Data_In(13) => Port13_pulse_in,
3478	Data_In(14) => Port14_pulse_in,
3479	Data_In(15) => Port15_pulse_in,
3480	Data_out(1) => Port1_pulse_out,
3481	Data_out(2) => Port2_pulse_out,
3482	Data_out(3) => Port3_pulse_out,
3483	Data_out(4) => Port4_pulse_out,
3484	Data_out(5) => Port5_pulse_out,
3485	Data_out(6) => Port6_pulse_out,
3486	Data_out(7) => Port7_pulse_out,
3487	Data_out(8) => Port8_pulse_out,
3488	Data_out(9) => Port9_pulse_out,
3489	Data_out(10) => Port10_pulse_out,
3490	Data_out(11) => Port11_pulse_out,
3491	Data_out(12) => Port12_pulse_out,
3492	Data_out(13) => Port13_pulse_out,
3493	Data_out(14) => Port14_pulse_out,
3494	Data_out(15) => Port15_pulse_out
3495
3496	);
3497	end generate crossbar15x15;
3498
3499
3500	--======================crossbar 16 ports=======================
3501
3502	crossbar16x16 : if number_of_crossbar_ports = 16 generate
3503
3504	-- crossbit du bit 0 de donnée
3505
3506	Data0_Crossbit: Crossbit
3507	GENERIC MAP(number_of_ports => 16)
3508	PORT MAP(
3509
3510	Control => Ctrl,
3511	Data_In(1) => Port1_in(0),
3512	Data_In(2) => Port2_in(0),
3513	Data_In(3) => Port3_in(0),
3514	Data_In(4) => Port4_in(0),
3515	Data_In(5) => Port5_in(0),
3516	Data_In(6) => Port6_in(0),
3517	Data_In(7) => Port7_in(0),
3518	Data_In(8) => Port8_in(0),
3519	Data_In(9) => Port9_in(0),
3520	Data_In(10) => Port10_in(0),
3521	Data_In(11) => Port11_in(0),
3522	Data_In(12) => Port12_in(0),
3523	Data_In(13) => Port13_in(0),
3524	Data_In(14) => Port14_in(0),
3525	Data_In(15) => Port15_in(0),
3526	Data_In(16) => Port16_in(0),
3527	Data_out(1)=> Port1_out(0),
3528	Data_out(2)=> Port2_out(0),
3529	Data_out(3)=> Port3_out(0),
3530	Data_out(4)=> Port4_out(0),
3531	Data_out(5)=> Port5_out(0),
3532	Data_out(6)=> Port6_out(0),
3533	Data_out(7)=> Port7_out(0),
3534	Data_out(8)=> Port8_out(0),
3535	Data_out(9)=> Port9_out(0),
3536	Data_out(10)=> Port10_out(0),
3537	Data_out(11)=> Port11_out(0),
3538	Data_out(12)=> Port12_out(0),
3539	Data_out(13)=> Port13_out(0),
3540	Data_out(14)=> Port14_out(0),
3541	Data_out(15)=> Port15_out(0),
3542	Data_out(16)=> Port16_out(0)
3543
3544	);
3545	-- crossbit du bit 1 de donnée
3546
3547	Data1_Crossbit: Crossbit
3548	GENERIC MAP(number_of_ports => 16)
3549	PORT MAP(
3550
3551	Control => Ctrl,
3552	Data_In(1) => Port1_in(1),
3553	Data_In(2) => Port2_in(1),
3554	Data_In(3) => Port3_in(1),
3555	Data_In(4) => Port4_in(1),
3556	Data_In(5) => Port5_in(1),
3557	Data_In(6) => Port6_in(1),
3558	Data_In(7) => Port7_in(1),
3559	Data_In(8) => Port8_in(1),
3560	Data_In(9) => Port9_in(1),
3561	Data_In(10) => Port10_in(1),
3562	Data_In(11) => Port11_in(1),
3563	Data_In(12) => Port12_in(1),
3564	Data_In(13) => Port13_in(1),
3565	Data_In(14) => Port14_in(1),
3566	Data_In(15) => Port15_in(1),
3567	Data_In(16) => Port16_in(1),
3568	Data_out(1)=> Port1_out(1),
3569	Data_out(2)=> Port2_out(1),
3570	Data_out(3)=> Port3_out(1),
3571	Data_out(4)=> Port4_out(1),
3572	Data_out(5)=> Port5_out(1),
3573	Data_out(6)=> Port6_out(1),
3574	Data_out(7)=> Port7_out(1),
3575	Data_out(8)=> Port8_out(1),
3576	Data_out(9)=> Port9_out(1),
3577	Data_out(10)=> Port10_out(1),
3578	Data_out(11)=> Port11_out(1),
3579	Data_out(12)=> Port12_out(1),
3580	Data_out(13)=> Port13_out(1),
3581	Data_out(14)=> Port14_out(1),
3582	Data_out(15)=> Port15_out(1),
3583	Data_out(16)=> Port16_out(1)
3584
3585	);
3586	-- crossbit du bit 2 de donnée
3587
3588	Data2_Crossbit: Crossbit
3589	GENERIC MAP(number_of_ports => 16)
3590	PORT MAP(
3591
3592	Control => Ctrl,
3593	Data_In(1) => Port1_in(2),
3594	Data_In(2) => Port2_in(2),
3595	Data_In(3) => Port3_in(2),
3596	Data_In(4) => Port4_in(2),
3597	Data_In(5) => Port5_in(2),
3598	Data_In(6) => Port6_in(2),
3599	Data_In(7) => Port7_in(2),
3600	Data_In(8) => Port8_in(2),
3601	Data_In(9) => Port9_in(2),
3602	Data_In(10) => Port10_in(2),
3603	Data_In(11) => Port11_in(2),
3604	Data_In(12) => Port12_in(2),
3605	Data_In(13) => Port13_in(2),
3606	Data_In(14) => Port14_in(2),
3607	Data_In(15) => Port15_in(2),
3608	Data_In(16) => Port16_in(2),
3609	Data_out(1)=> Port1_out(2),
3610	Data_out(2)=> Port2_out(2),
3611	Data_out(3)=> Port3_out(2),
3612	Data_out(4)=> Port4_out(2),
3613	Data_out(5)=> Port5_out(2),
3614	Data_out(6)=> Port6_out(2),
3615	Data_out(7)=> Port7_out(2),
3616	Data_out(8)=> Port8_out(2),
3617	Data_out(9)=> Port9_out(2),
3618	Data_out(10)=> Port10_out(2),
3619	Data_out(11)=> Port11_out(2),
3620	Data_out(12)=> Port12_out(2),
3621	Data_out(13)=> Port13_out(2),
3622	Data_out(14)=> Port14_out(2),
3623	Data_out(15)=> Port15_out(2),
3624	Data_out(16)=> Port16_out(2)
3625
3626	);
3627	-- crossbit du bit 3 de donnée
3628
3629	Data3_Crossbit: Crossbit
3630	GENERIC MAP(number_of_ports => 16)
3631	PORT MAP(
3632
3633	Control => Ctrl,
3634	Data_In(1) => Port1_in(3),
3635	Data_In(2) => Port2_in(3),
3636	Data_In(3) => Port3_in(3),
3637	Data_In(4) => Port4_in(3),
3638	Data_In(5) => Port5_in(3),
3639	Data_In(6) => Port6_in(3),
3640	Data_In(7) => Port7_in(3),
3641	Data_In(8) => Port8_in(3),
3642	Data_In(9) => Port9_in(3),
3643	Data_In(10) => Port10_in(3),
3644	Data_In(11) => Port11_in(3),
3645	Data_In(12) => Port12_in(3),
3646	Data_In(13) => Port13_in(3),
3647	Data_In(14) => Port14_in(3),
3648	Data_In(15) => Port15_in(3),
3649	Data_In(16) => Port16_in(3),
3650	Data_out(1)=> Port1_out(3),
3651	Data_out(2)=> Port2_out(3),
3652	Data_out(3)=> Port3_out(3),
3653	Data_out(4)=> Port4_out(3),
3654	Data_out(5)=> Port5_out(3),
3655	Data_out(6)=> Port6_out(3),
3656	Data_out(7)=> Port7_out(3),
3657	Data_out(8)=> Port8_out(3),
3658	Data_out(9)=> Port9_out(3),
3659	Data_out(10)=> Port10_out(3),
3660	Data_out(11)=> Port11_out(3),
3661	Data_out(12)=> Port12_out(3),
3662	Data_out(13)=> Port13_out(3),
3663	Data_out(14)=> Port14_out(3),
3664	Data_out(15)=> Port15_out(3),
3665	Data_out(16)=> Port16_out(3)
3666
3667	);
3668	-- crossbit du bit 4 de donnée
3669
3670	Data4_Crossbit: Crossbit
3671	GENERIC MAP(number_of_ports => 16)
3672	PORT MAP(
3673
3674	Control => Ctrl,
3675	Data_In(1) => Port1_in(4),
3676	Data_In(2) => Port2_in(4),
3677	Data_In(3) => Port3_in(4),
3678	Data_In(4) => Port4_in(4),
3679	Data_In(5) => Port5_in(4),
3680	Data_In(6) => Port6_in(4),
3681	Data_In(7) => Port7_in(4),
3682	Data_In(8) => Port8_in(4),
3683	Data_In(9) => Port9_in(4),
3684	Data_In(10) => Port10_in(4),
3685	Data_In(11) => Port11_in(4),
3686	Data_In(12) => Port12_in(4),
3687	Data_In(13) => Port13_in(4),
3688	Data_In(14) => Port14_in(4),
3689	Data_In(15) => Port15_in(4),
3690	Data_In(16) => Port16_in(4),
3691	Data_out(1)=> Port1_out(4),
3692	Data_out(2)=> Port2_out(4),
3693	Data_out(3)=> Port3_out(4),
3694	Data_out(4)=> Port4_out(4),
3695	Data_out(5)=> Port5_out(4),
3696	Data_out(6)=> Port6_out(4),
3697	Data_out(7)=> Port7_out(4),
3698	Data_out(8)=> Port8_out(4),
3699	Data_out(9)=> Port9_out(4),
3700	Data_out(10)=> Port10_out(4),
3701	Data_out(11)=> Port11_out(4),
3702	Data_out(12)=> Port12_out(4),
3703	Data_out(13)=> Port13_out(4),
3704	Data_out(14)=> Port14_out(4),
3705	Data_out(15)=> Port15_out(4),
3706	Data_out(16)=> Port16_out(4)
3707
3708	);
3709	-- crossbit du bit 5 de donnée
3710
3711	Data5_Crossbit: Crossbit
3712	GENERIC MAP(number_of_ports => 16)
3713	PORT MAP(
3714
3715	Control => Ctrl,
3716	Data_In(1) => Port1_in(5),
3717	Data_In(2) => Port2_in(5),
3718	Data_In(3) => Port3_in(5),
3719	Data_In(4) => Port4_in(5),
3720	Data_In(5) => Port5_in(5),
3721	Data_In(6) => Port6_in(5),
3722	Data_In(7) => Port7_in(5),
3723	Data_In(8) => Port8_in(5),
3724	Data_In(9) => Port9_in(5),
3725	Data_In(10) => Port10_in(5),
3726	Data_In(11) => Port11_in(5),
3727	Data_In(12) => Port12_in(5),
3728	Data_In(13) => Port13_in(5),
3729	Data_In(14) => Port14_in(5),
3730	Data_In(15) => Port15_in(5),
3731	Data_In(16) => Port16_in(5),
3732	Data_out(1)=> Port1_out(5),
3733	Data_out(2)=> Port2_out(5),
3734	Data_out(3)=> Port3_out(5),
3735	Data_out(4)=> Port4_out(5),
3736	Data_out(5)=> Port5_out(5),
3737	Data_out(6)=> Port6_out(5),
3738	Data_out(7)=> Port7_out(5),
3739	Data_out(8)=> Port8_out(5),
3740	Data_out(9)=> Port9_out(5),
3741	Data_out(10)=> Port10_out(5),
3742	Data_out(11)=> Port11_out(5),
3743	Data_out(12)=> Port12_out(5),
3744	Data_out(13)=> Port13_out(5),
3745	Data_out(14)=> Port14_out(5),
3746	Data_out(15)=> Port15_out(5),
3747	Data_out(16)=> Port16_out(5)
3748
3749	);
3750	-- crossbit du bit 6 de donnée
3751
3752	Data6_Crossbit: Crossbit
3753	GENERIC MAP(number_of_ports => 16)
3754	PORT MAP(
3755
3756	Control => Ctrl,
3757	Data_In(1) => Port1_in(6),
3758	Data_In(2) => Port2_in(6),
3759	Data_In(3) => Port3_in(6),
3760	Data_In(4) => Port4_in(6),
3761	Data_In(5) => Port5_in(6),
3762	Data_In(6) => Port6_in(6),
3763	Data_In(7) => Port7_in(6),
3764	Data_In(8) => Port8_in(6),
3765	Data_In(9) => Port9_in(6),
3766	Data_In(10) => Port10_in(6),
3767	Data_In(11) => Port11_in(6),
3768	Data_In(12) => Port12_in(6),
3769	Data_In(13) => Port13_in(6),
3770	Data_In(14) => Port14_in(6),
3771	Data_In(15) => Port15_in(6),
3772	Data_In(16) => Port16_in(6),
3773	Data_out(1)=> Port1_out(6),
3774	Data_out(2)=> Port2_out(6),
3775	Data_out(3)=> Port3_out(6),
3776	Data_out(4)=> Port4_out(6),
3777	Data_out(5)=> Port5_out(6),
3778	Data_out(6)=> Port6_out(6),
3779	Data_out(7)=> Port7_out(6),
3780	Data_out(8)=> Port8_out(6),
3781	Data_out(9)=> Port9_out(6),
3782	Data_out(10)=> Port10_out(6),
3783	Data_out(11)=> Port11_out(6),
3784	Data_out(12)=> Port12_out(6),
3785	Data_out(13)=> Port13_out(6),
3786	Data_out(14)=> Port14_out(6),
3787	Data_out(15)=> Port15_out(6),
3788	Data_out(16)=> Port16_out(6)
3789
3790	);
3791	-- crossbit du bit 7 de donnée
3792
3793	Data7_Crossbit: Crossbit
3794	GENERIC MAP(number_of_ports => 16)
3795	PORT MAP(
3796
3797	Control => Ctrl,
3798	Data_In(1) => Port1_in(7),
3799	Data_In(2) => Port2_in(7),
3800	Data_In(3) => Port3_in(7),
3801	Data_In(4) => Port4_in(7),
3802	Data_In(5) => Port5_in(7),
3803	Data_In(6) => Port6_in(7),
3804	Data_In(7) => Port7_in(7),
3805	Data_In(8) => Port8_in(7),
3806	Data_In(9) => Port9_in(7),
3807	Data_In(10) => Port10_in(7),
3808	Data_In(11) => Port11_in(7),
3809	Data_In(12) => Port12_in(7),
3810	Data_In(13) => Port13_in(7),
3811	Data_In(14) => Port14_in(7),
3812	Data_In(15) => Port15_in(7),
3813	Data_In(16) => Port16_in(7),
3814	Data_out(1)=> Port1_out(7),
3815	Data_out(2)=> Port2_out(7),
3816	Data_out(3)=> Port3_out(7),
3817	Data_out(4)=> Port4_out(7),
3818	Data_out(5)=> Port5_out(7),
3819	Data_out(6)=> Port6_out(7),
3820	Data_out(7)=> Port7_out(7),
3821	Data_out(8)=> Port8_out(7),
3822	Data_out(9)=> Port9_out(7),
3823	Data_out(10)=> Port10_out(7),
3824	Data_out(11)=> Port11_out(7),
3825	Data_out(12)=> Port12_out(7),
3826	Data_out(13)=> Port13_out(7),
3827	Data_out(14)=> Port14_out(7),
3828	Data_out(15)=> Port15_out(7),
3829	Data_out(16)=> Port16_out(7)
3830
3831	);
3832	-- crossbit du pulse_out 16 ports
3833
3834	Pulse_out_Crossbit16: Crossbit
3835	GENERIC MAP(number_of_ports => 16)
3836	PORT MAP(
3837
3838	Control => Ctrl,
3839	Data_In(1) => Port1_pulse_in,
3840	Data_In(2) => Port2_pulse_in,
3841	Data_In(3) => Port3_pulse_in,
3842	Data_In(4) => Port4_pulse_in,
3843	Data_In(5) => Port5_pulse_in,
3844	Data_In(6) => Port6_pulse_in,
3845	Data_In(7) => Port7_pulse_in,
3846	Data_In(8) => Port8_pulse_in,
3847	Data_In(9) => Port9_pulse_in,
3848	Data_In(10) => Port10_pulse_in,
3849	Data_In(11) => Port11_pulse_in,
3850	Data_In(12) => Port12_pulse_in,
3851	Data_In(13) => Port13_pulse_in,
3852	Data_In(14) => Port14_pulse_in,
3853	Data_In(15) => Port15_pulse_in,
3854	Data_In(16) => Port16_pulse_in,
3855	Data_out(1) => Port1_pulse_out,
3856	Data_out(2) => Port2_pulse_out,
3857	Data_out(3) => Port3_pulse_out,
3858	Data_out(4) => Port4_pulse_out,
3859	Data_out(5) => Port5_pulse_out,
3860	Data_out(6) => Port6_pulse_out,
3861	Data_out(7) => Port7_pulse_out,
3862	Data_out(8) => Port8_pulse_out,
3863	Data_out(9) => Port9_pulse_out,
3864	Data_out(10) => Port10_pulse_out,
3865	Data_out(11) => Port11_pulse_out,
3866	Data_out(12) => Port12_pulse_out,
3867	Data_out(13) => Port13_pulse_out,
3868	Data_out(14) => Port14_pulse_out,
3869	Data_out(15) => Port15_pulse_out,
3870	Data_out(16) => Port16_pulse_out
3871
3872	);
3873	end generate crossbar16x16;
3874
3875	end Behavioral;
3876

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source: PROJECT_CORE_MPI/SWITCH_GEN/TRUNK/Crossbar.vhd @ 98

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