source: PROJECT_SMART_EEG/trunk/hw/projects/sync_sys/qsys.qsys @ 129

Last change on this file since 129 was 88, checked in by lambert, 11 years ago

Updating qsys file
File size: 36.6 KB
Line 
1<?xml version="1.0" encoding="UTF-8"?>
2<system name="$${FILENAME}">
3 <component
4   name="$${FILENAME}"
5   displayName="$${FILENAME}"
6   version="1.0"
7   description=""
8   tags=""
9   categories="System" />
10 <parameter name="bonusData"><![CDATA[bonusData
11{
12   element $${FILENAME}
13   {
14   }
15   element audio_codec_0
16   {
17      datum _sortIndex
18      {
19         value = "7";
20         type = "int";
21      }
22   }
23   element clk_0
24   {
25      datum _sortIndex
26      {
27         value = "0";
28         type = "int";
29      }
30   }
31   element sysid_qsys_0.control_slave
32   {
33      datum baseAddress
34      {
35         value = "142336";
36         type = "String";
37      }
38   }
39   element signal_grabber_0.ctrl
40   {
41      datum _lockedAddress
42      {
43         value = "0";
44         type = "boolean";
45      }
46      datum baseAddress
47      {
48         value = "136192";
49         type = "String";
50      }
51   }
52   element stream_merger_0.ctrl
53   {
54      datum baseAddress
55      {
56         value = "139264";
57         type = "String";
58      }
59   }
60   element video_codec_0.ctrl
61   {
62      datum baseAddress
63      {
64         value = "140288";
65         type = "String";
66      }
67   }
68   element synchro_0.ctrl
69   {
70      datum baseAddress
71      {
72         value = "135168";
73         type = "String";
74      }
75   }
76   element frame_grabber_0.ctrl
77   {
78      datum baseAddress
79      {
80         value = "141312";
81         type = "String";
82      }
83   }
84   element audio_codec_0.ctrl
85   {
86      datum baseAddress
87      {
88         value = "138240";
89         type = "String";
90      }
91   }
92   element exg_codec_0.ctrl
93   {
94      datum baseAddress
95      {
96         value = "137216";
97         type = "String";
98      }
99   }
100   element exg_codec_0
101   {
102      datum _sortIndex
103      {
104         value = "8";
105         type = "int";
106      }
107   }
108   element frame_grabber_0
109   {
110      datum _sortIndex
111      {
112         value = "4";
113         type = "int";
114      }
115   }
116   element nios2_qsys_0.jtag_debug_module
117   {
118      datum baseAddress
119      {
120         value = "133120";
121         type = "String";
122      }
123   }
124   element nios2_qsys_0
125   {
126      datum _sortIndex
127      {
128         value = "1";
129         type = "int";
130      }
131   }
132   element onchip_memory2_0
133   {
134      datum _sortIndex
135      {
136         value = "2";
137         type = "int";
138      }
139   }
140   element onchip_memory2_0.s1
141   {
142      datum _lockedAddress
143      {
144         value = "1";
145         type = "boolean";
146      }
147      datum baseAddress
148      {
149         value = "0";
150         type = "String";
151      }
152   }
153   element signal_grabber_0
154   {
155      datum _sortIndex
156      {
157         value = "9";
158         type = "int";
159      }
160   }
161   element stream_merger_0
162   {
163      datum _sortIndex
164      {
165         value = "6";
166         type = "int";
167      }
168   }
169   element synchro_0
170   {
171      datum _sortIndex
172      {
173         value = "10";
174         type = "int";
175      }
176   }
177   element sysid_qsys_0
178   {
179      datum _sortIndex
180      {
181         value = "3";
182         type = "int";
183      }
184   }
185   element video_codec_0
186   {
187      datum _sortIndex
188      {
189         value = "5";
190         type = "int";
191      }
192   }
193}
194]]></parameter>
195 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
196 <parameter name="device" value="Unknown" />
197 <parameter name="deviceFamily" value="Stratix IV" />
198 <parameter name="deviceSpeedGrade" value="Unknown" />
199 <parameter name="fabricMode" value="QSYS" />
200 <parameter name="generateLegacySim" value="false" />
201 <parameter name="generationId" value="0" />
202 <parameter name="globalResetBus" value="false" />
203 <parameter name="hdlLanguage" value="VERILOG" />
204 <parameter name="maxAdditionalLatency" value="1" />
205 <parameter name="projectName" value="" />
206 <parameter name="sopcBorderPoints" value="false" />
207 <parameter name="systemHash" value="0" />
208 <parameter name="timeStamp" value="0" />
209 <parameter name="useTestBenchNamingPattern" value="false" />
210 <instanceScript></instanceScript>
211 <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
212 <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
213 <interface
214   name="synchro_0_conduit_sync"
215   internal="synchro_0.conduit_sync"
216   type="conduit"
217   dir="end" />
218 <interface
219   name="frame_grabber_0_conduit_camera"
220   internal="frame_grabber_0.conduit_camera"
221   type="conduit"
222   dir="end" />
223 <module kind="clock_source" version="13.1" enabled="1" name="clk_0">
224  <parameter name="clockFrequency" value="50000000" />
225  <parameter name="clockFrequencyKnown" value="true" />
226  <parameter name="inputClockFrequency" value="0" />
227  <parameter name="resetSynchronousEdges" value="NONE" />
228 </module>
229 <module
230   kind="altera_nios2_qsys"
231   version="13.1"
232   enabled="1"
233   name="nios2_qsys_0">
234  <parameter name="setting_showUnpublishedSettings" value="false" />
235  <parameter name="setting_showInternalSettings" value="false" />
236  <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
237  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
238  <parameter name="setting_preciseDivisionErrorException" value="false" />
239  <parameter name="setting_performanceCounter" value="false" />
240  <parameter name="setting_illegalMemAccessDetection" value="false" />
241  <parameter name="setting_illegalInstructionsTrap" value="false" />
242  <parameter name="setting_fullWaveformSignals" value="false" />
243  <parameter name="setting_extraExceptionInfo" value="false" />
244  <parameter name="setting_exportPCB" value="false" />
245  <parameter name="setting_debugSimGen" value="false" />
246  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
247  <parameter name="setting_bit31BypassDCache" value="true" />
248  <parameter name="setting_bigEndian" value="false" />
249  <parameter name="setting_export_large_RAMs" value="false" />
250  <parameter name="setting_asic_enabled" value="false" />
251  <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
252  <parameter name="setting_oci_export_jtag_signals" value="false" />
253  <parameter name="setting_bhtIndexPcOnly" value="false" />
254  <parameter name="setting_avalonDebugPortPresent" value="false" />
255  <parameter name="setting_alwaysEncrypt" value="true" />
256  <parameter name="setting_allowFullAddressRange" value="false" />
257  <parameter name="setting_activateTrace" value="true" />
258  <parameter name="setting_activateTrace_user" value="false" />
259  <parameter name="setting_activateTestEndChecker" value="false" />
260  <parameter name="setting_ecc_sim_test_ports" value="false" />
261  <parameter name="setting_activateMonitors" value="true" />
262  <parameter name="setting_activateModelChecker" value="false" />
263  <parameter name="setting_HDLSimCachesCleared" value="true" />
264  <parameter name="setting_HBreakTest" value="false" />
265  <parameter name="setting_breakslaveoveride" value="false" />
266  <parameter name="muldiv_divider" value="false" />
267  <parameter name="mpu_useLimit" value="false" />
268  <parameter name="mpu_enabled" value="false" />
269  <parameter name="mmu_enabled" value="false" />
270  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
271  <parameter name="manuallyAssignCpuID" value="true" />
272  <parameter name="debug_triggerArming" value="true" />
273  <parameter name="debug_embeddedPLL" value="true" />
274  <parameter name="debug_debugReqSignals" value="false" />
275  <parameter name="debug_assignJtagInstanceID" value="false" />
276  <parameter name="dcache_omitDataMaster" value="false" />
277  <parameter name="cpuReset" value="false" />
278  <parameter name="is_hardcopy_compatible" value="false" />
279  <parameter name="setting_shadowRegisterSets" value="0" />
280  <parameter name="mpu_numOfInstRegion" value="8" />
281  <parameter name="mpu_numOfDataRegion" value="8" />
282  <parameter name="mmu_TLBMissExcOffset" value="0" />
283  <parameter name="debug_jtagInstanceID" value="0" />
284  <parameter name="resetOffset" value="0" />
285  <parameter name="exceptionOffset" value="32" />
286  <parameter name="cpuID" value="0" />
287  <parameter name="cpuID_stored" value="0" />
288  <parameter name="breakOffset" value="32" />
289  <parameter name="userDefinedSettings" value="" />
290  <parameter name="resetSlave" value="onchip_memory2_0.s1" />
291  <parameter name="mmu_TLBMissExcSlave" value="None" />
292  <parameter name="exceptionSlave" value="onchip_memory2_0.s1" />
293  <parameter name="breakSlave">nios2_qsys_0.jtag_debug_module</parameter>
294  <parameter name="setting_perfCounterWidth" value="32" />
295  <parameter name="setting_interruptControllerType" value="Internal" />
296  <parameter name="setting_branchPredictionType" value="Automatic" />
297  <parameter name="setting_bhtPtrSz" value="8" />
298  <parameter name="muldiv_multiplierType" value="DSPBlock" />
299  <parameter name="mpu_minInstRegionSize" value="12" />
300  <parameter name="mpu_minDataRegionSize" value="12" />
301  <parameter name="mmu_uitlbNumEntries" value="4" />
302  <parameter name="mmu_udtlbNumEntries" value="6" />
303  <parameter name="mmu_tlbPtrSz" value="7" />
304  <parameter name="mmu_tlbNumWays" value="16" />
305  <parameter name="mmu_processIDNumBits" value="8" />
306  <parameter name="impl" value="Fast" />
307  <parameter name="icache_size" value="4096" />
308  <parameter name="icache_tagramBlockType" value="Automatic" />
309  <parameter name="icache_ramBlockType" value="Automatic" />
310  <parameter name="icache_numTCIM" value="0" />
311  <parameter name="icache_burstType" value="None" />
312  <parameter name="dcache_bursts" value="false" />
313  <parameter name="dcache_victim_buf_impl" value="ram" />
314  <parameter name="debug_level" value="Level1" />
315  <parameter name="debug_OCIOnchipTrace" value="_128" />
316  <parameter name="dcache_size" value="2048" />
317  <parameter name="dcache_tagramBlockType" value="Automatic" />
318  <parameter name="dcache_ramBlockType" value="Automatic" />
319  <parameter name="dcache_numTCDM" value="0" />
320  <parameter name="dcache_lineSize" value="32" />
321  <parameter name="setting_exportvectors" value="false" />
322  <parameter name="setting_ecc_present" value="false" />
323  <parameter name="setting_ic_ecc_present" value="true" />
324  <parameter name="setting_rf_ecc_present" value="true" />
325  <parameter name="setting_mmu_ecc_present" value="true" />
326  <parameter name="setting_dc_ecc_present" value="false" />
327  <parameter name="setting_itcm_ecc_present" value="false" />
328  <parameter name="setting_dtcm_ecc_present" value="false" />
329  <parameter name="regfile_ramBlockType" value="Automatic" />
330  <parameter name="ocimem_ramBlockType" value="Automatic" />
331  <parameter name="mmu_ramBlockType" value="Automatic" />
332  <parameter name="bht_ramBlockType" value="Automatic" />
333  <parameter name="instAddrWidth" value="18" />
334  <parameter name="dataAddrWidth" value="18" />
335  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
336  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
337  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
338  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
339  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
340  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
341  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
342  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
343  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x0' end='0x1F400' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x20800' end='0x21000' /></address-map>]]></parameter>
344  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x0' end='0x1F400' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x20800' end='0x21000' /><slave name='synchro_0.ctrl' start='0x21000' end='0x21400' /><slave name='signal_grabber_0.ctrl' start='0x21400' end='0x21800' /><slave name='exg_codec_0.ctrl' start='0x21800' end='0x21C00' /><slave name='audio_codec_0.ctrl' start='0x21C00' end='0x22000' /><slave name='stream_merger_0.ctrl' start='0x22000' end='0x22400' /><slave name='video_codec_0.ctrl' start='0x22400' end='0x22800' /><slave name='frame_grabber_0.ctrl' start='0x22800' end='0x22C00' /><slave name='sysid_qsys_0.control_slave' start='0x22C00' end='0x22C08' /></address-map>]]></parameter>
345  <parameter name="clockFrequency" value="50000000" />
346  <parameter name="deviceFamilyName" value="Stratix IV" />
347  <parameter name="internalIrqMaskSystemInfo" value="0" />
348  <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
349  <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 1 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGICAL_FLOORPLANNER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 1 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 1 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 1 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
350  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
351  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
352  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
353  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
354  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
355  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
356  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
357  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
358 </module>
359 <module
360   kind="altera_avalon_onchip_memory2"
361   version="13.1"
362   enabled="1"
363   name="onchip_memory2_0">
364  <parameter name="allowInSystemMemoryContentEditor" value="false" />
365  <parameter name="blockType" value="AUTO" />
366  <parameter name="dataWidth" value="32" />
367  <parameter name="dualPort" value="false" />
368  <parameter name="initMemContent" value="true" />
369  <parameter name="initializationFileName" value="onchip_mem.hex" />
370  <parameter name="instanceID" value="NONE" />
371  <parameter name="memorySize" value="128000" />
372  <parameter name="readDuringWriteMode" value="DONT_CARE" />
373  <parameter name="simAllowMRAMContentsFile" value="false" />
374  <parameter name="simMemInitOnlyFilename" value="0" />
375  <parameter name="singleClockOperation" value="false" />
376  <parameter name="slave1Latency" value="1" />
377  <parameter name="slave2Latency" value="1" />
378  <parameter name="useNonDefaultInitFile" value="false" />
379  <parameter name="useShallowMemBlocks" value="false" />
380  <parameter name="writable" value="true" />
381  <parameter name="ecc_enabled" value="false" />
382  <parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory2_0</parameter>
383  <parameter name="deviceFamily" value="Stratix IV" />
384  <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 1 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 1 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGICAL_FLOORPLANNER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 1 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_BINNING_LIMITS_DATA 0 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 1 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 1 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
385 </module>
386 <module
387   kind="altera_avalon_sysid_qsys"
388   version="13.1"
389   enabled="1"
390   name="sysid_qsys_0">
391  <parameter name="id" value="15" />
392  <parameter name="timestamp" value="0" />
393  <parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
394  <parameter name="AUTO_DEVICE_FAMILY" value="Stratix IV" />
395 </module>
396 <module kind="stream_merger" version="1.0" enabled="1" name="stream_merger_0">
397  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
398 </module>
399 <module
400   kind="signal_grabber"
401   version="1.0"
402   enabled="1"
403   name="signal_grabber_0">
404  <parameter name="ctrl_addr_width" value="8" />
405  <parameter name="ctrl_data_width" value="32" />
406  <parameter name="audio_str_width" value="32" />
407  <parameter name="exg_str_width" value="32" />
408  <parameter name="etis_si_width" value="32" />
409  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
410 </module>
411 <module kind="audio_codec" version="1.0" enabled="1" name="audio_codec_0">
412  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
413 </module>
414 <module kind="exg_codec" version="1.0" enabled="1" name="exg_codec_0">
415  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="-1" />
416  <parameter name="AUTO_CLOCK_CLOCK_RATE_1" value="50000000" />
417 </module>
418 <module kind="video_codec" version="1.0" enabled="1" name="video_codec_0">
419  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
420 </module>
421 <module kind="synchro" version="1.0" enabled="1" name="synchro_0">
422  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
423 </module>
424 <module kind="frame_grabber" version="1.0" enabled="1" name="frame_grabber_0">
425  <parameter name="AUTO_CLOCK_CLOCK_RATE" value="50000000" />
426 </module>
427 <connection
428   kind="avalon"
429   version="13.1"
430   start="nios2_qsys_0.instruction_master"
431   end="nios2_qsys_0.jtag_debug_module">
432  <parameter name="arbitrationPriority" value="1" />
433  <parameter name="baseAddress" value="0x00020800" />
434  <parameter name="defaultConnection" value="false" />
435 </connection>
436 <connection
437   kind="avalon"
438   version="13.1"
439   start="nios2_qsys_0.data_master"
440   end="nios2_qsys_0.jtag_debug_module">
441  <parameter name="arbitrationPriority" value="1" />
442  <parameter name="baseAddress" value="0x00020800" />
443  <parameter name="defaultConnection" value="false" />
444 </connection>
445 <connection
446   kind="avalon_streaming"
447   version="13.1"
448   start="audio_codec_0.comp_audio"
449   end="stream_merger_0.comp_audio" />
450 <connection
451   kind="avalon_streaming"
452   version="13.1"
453   start="exg_codec_0.comp_exg"
454   end="stream_merger_0.comp_exg" />
455 <connection
456   kind="avalon_streaming"
457   version="13.1"
458   start="exg_codec_0.raw_exg_out"
459   end="stream_merger_0.raw_exg" />
460 <connection
461   kind="avalon_streaming"
462   version="13.1"
463   start="video_codec_0.raw_video_ds"
464   end="stream_merger_0.raw_video" />
465 <connection
466   kind="avalon_streaming"
467   version="13.1"
468   start="video_codec_0.comp_video"
469   end="stream_merger_0.comp_video" />
470 <connection
471   kind="avalon_streaming"
472   version="13.1"
473   start="synchro_0.ts"
474   end="video_codec_0.ts" />
475 <connection
476   kind="avalon_streaming"
477   version="13.1"
478   start="frame_grabber_0.raw_video"
479   end="video_codec_0.raw_video" />
480 <connection
481   kind="clock"
482   version="13.1"
483   start="clk_0.clk"
484   end="video_codec_0.clock" />
485 <connection
486   kind="clock"
487   version="13.1"
488   start="clk_0.clk"
489   end="stream_merger_0.clock" />
490 <connection
491   kind="clock"
492   version="13.1"
493   start="clk_0.clk"
494   end="audio_codec_0.clock" />
495 <connection kind="clock" version="13.1" start="clk_0.clk" end="exg_codec_0.clock" />
496 <connection
497   kind="clock"
498   version="13.1"
499   start="clk_0.clk"
500   end="signal_grabber_0.clock" />
501 <connection kind="clock" version="13.1" start="clk_0.clk" end="synchro_0.clock" />
502 <connection kind="clock" version="13.1" start="clk_0.clk" end="nios2_qsys_0.clk" />
503 <connection
504   kind="clock"
505   version="13.1"
506   start="clk_0.clk"
507   end="onchip_memory2_0.clk1" />
508 <connection kind="clock" version="13.1" start="clk_0.clk" end="sysid_qsys_0.clk" />
509 <connection
510   kind="clock"
511   version="13.1"
512   start="clk_0.clk"
513   end="frame_grabber_0.clock" />
514 <connection
515   kind="reset"
516   version="13.1"
517   start="clk_0.clk_reset"
518   end="nios2_qsys_0.reset_n" />
519 <connection
520   kind="reset"
521   version="13.1"
522   start="clk_0.clk_reset"
523   end="onchip_memory2_0.reset1" />
524 <connection
525   kind="reset"
526   version="13.1"
527   start="clk_0.clk_reset"
528   end="sysid_qsys_0.reset" />
529 <connection
530   kind="reset"
531   version="13.1"
532   start="clk_0.clk_reset"
533   end="frame_grabber_0.reset" />
534 <connection
535   kind="reset"
536   version="13.1"
537   start="clk_0.clk_reset"
538   end="video_codec_0.reset" />
539 <connection
540   kind="reset"
541   version="13.1"
542   start="clk_0.clk_reset"
543   end="stream_merger_0.reset" />
544 <connection
545   kind="reset"
546   version="13.1"
547   start="clk_0.clk_reset"
548   end="audio_codec_0.reset" />
549 <connection
550   kind="reset"
551   version="13.1"
552   start="clk_0.clk_reset"
553   end="exg_codec_0.reset" />
554 <connection
555   kind="reset"
556   version="13.1"
557   start="clk_0.clk_reset"
558   end="signal_grabber_0.reset" />
559 <connection
560   kind="reset"
561   version="13.1"
562   start="clk_0.clk_reset"
563   end="synchro_0.reset" />
564 <connection
565   kind="avalon"
566   version="13.1"
567   start="nios2_qsys_0.data_master"
568   end="onchip_memory2_0.s1">
569  <parameter name="arbitrationPriority" value="1" />
570  <parameter name="baseAddress" value="0x0000" />
571  <parameter name="defaultConnection" value="false" />
572 </connection>
573 <connection
574   kind="avalon"
575   version="13.1"
576   start="nios2_qsys_0.instruction_master"
577   end="onchip_memory2_0.s1">
578  <parameter name="arbitrationPriority" value="1" />
579  <parameter name="baseAddress" value="0x0000" />
580  <parameter name="defaultConnection" value="false" />
581 </connection>
582 <connection
583   kind="avalon"
584   version="13.1"
585   start="nios2_qsys_0.data_master"
586   end="sysid_qsys_0.control_slave">
587  <parameter name="arbitrationPriority" value="1" />
588  <parameter name="baseAddress" value="0x00022c00" />
589  <parameter name="defaultConnection" value="false" />
590 </connection>
591 <connection
592   kind="avalon"
593   version="13.1"
594   start="nios2_qsys_0.data_master"
595   end="frame_grabber_0.ctrl">
596  <parameter name="arbitrationPriority" value="1" />
597  <parameter name="baseAddress" value="0x00022800" />
598  <parameter name="defaultConnection" value="false" />
599 </connection>
600 <connection
601   kind="avalon"
602   version="13.1"
603   start="nios2_qsys_0.data_master"
604   end="video_codec_0.ctrl">
605  <parameter name="arbitrationPriority" value="1" />
606  <parameter name="baseAddress" value="0x00022400" />
607  <parameter name="defaultConnection" value="false" />
608 </connection>
609 <connection
610   kind="avalon"
611   version="13.1"
612   start="nios2_qsys_0.data_master"
613   end="stream_merger_0.ctrl">
614  <parameter name="arbitrationPriority" value="1" />
615  <parameter name="baseAddress" value="0x00022000" />
616  <parameter name="defaultConnection" value="false" />
617 </connection>
618 <connection
619   kind="avalon"
620   version="13.1"
621   start="nios2_qsys_0.data_master"
622   end="audio_codec_0.ctrl">
623  <parameter name="arbitrationPriority" value="1" />
624  <parameter name="baseAddress" value="0x00021c00" />
625  <parameter name="defaultConnection" value="false" />
626 </connection>
627 <connection
628   kind="avalon"
629   version="13.1"
630   start="nios2_qsys_0.data_master"
631   end="exg_codec_0.ctrl">
632  <parameter name="arbitrationPriority" value="1" />
633  <parameter name="baseAddress" value="0x00021800" />
634  <parameter name="defaultConnection" value="false" />
635 </connection>
636 <connection
637   kind="avalon"
638   version="13.1"
639   start="nios2_qsys_0.data_master"
640   end="signal_grabber_0.ctrl">
641  <parameter name="arbitrationPriority" value="1" />
642  <parameter name="baseAddress" value="0x00021400" />
643  <parameter name="defaultConnection" value="false" />
644 </connection>
645 <connection
646   kind="avalon"
647   version="13.1"
648   start="nios2_qsys_0.data_master"
649   end="synchro_0.ctrl">
650  <parameter name="arbitrationPriority" value="1" />
651  <parameter name="baseAddress" value="0x00021000" />
652  <parameter name="defaultConnection" value="false" />
653 </connection>
654 <connection
655   kind="avalon_streaming"
656   version="13.1"
657   start="signal_grabber_0.raw_audio"
658   end="audio_codec_0.raw_audio" />
659 <connection
660   kind="avalon_streaming"
661   version="13.1"
662   start="signal_grabber_0.raw_exg"
663   end="exg_codec_0.raw_exg" />
664 <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
665 <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
666 <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
667</system>
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