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source: PROJECT_SMART_EEG/trunk/hw/sync_sys/frame_grabber/frame_grabber_hw.tcl @ 84

Last change on this file since 84 was 84, checked in by lambert, 10 years ago
Adding hierarchical subdirectory for every component
File size: 5.4 KB

Line
1	# TCL File Generated by Component Editor 13.1
2	# Fri Feb 28 17:27:39 CET 2014
3	# DO NOT MODIFY
4
5
6	#
7	# frame_grabber "frame_grabber" v1.0
8	# 2014.02.28.17:27:39
9	#
10	#
11
12	#
13	# request TCL package from ACDS 13.1
14	#
15	package require -exact qsys 13.1
16
17
18	#
19	# module frame_grabber
20	#
21	set_module_property DESCRIPTION ""
22	set_module_property NAME frame_grabber
23	set_module_property VERSION 1.0
24	set_module_property INTERNAL false
25	set_module_property OPAQUE_ADDRESS_MAP true
26	set_module_property GROUP smartEEG
27	set_module_property AUTHOR ""
28	set_module_property DISPLAY_NAME frame_grabber
29	set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
30	set_module_property EDITABLE true
31	set_module_property ANALYZE_HDL AUTO
32	set_module_property REPORT_TO_TALKBACK false
33	set_module_property ALLOW_GREYBOX_GENERATION false
34
35
36	#
37	# file sets
38	#
39	add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
40	set_fileset_property QUARTUS_SYNTH TOP_LEVEL frame_grabber
41	set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
42	add_fileset_file frame_grabber.v VERILOG PATH frame_grabber.v TOP_LEVEL_FILE
43
44
45	#
46	# parameters
47	#
48
49
50	#
51	# display items
52	#
53
54
55	#
56	# connection point clock
57	#
58	add_interface clock clock end
59	set_interface_property clock clockRate 0
60	set_interface_property clock ENABLED true
61	set_interface_property clock EXPORT_OF ""
62	set_interface_property clock PORT_NAME_MAP ""
63	set_interface_property clock CMSIS_SVD_VARIABLES ""
64	set_interface_property clock SVD_ADDRESS_GROUP ""
65
66	add_interface_port clock clk clk Input 1
67
68
69	#
70	# connection point reset
71	#
72	add_interface reset reset end
73	set_interface_property reset associatedClock clock
74	set_interface_property reset synchronousEdges DEASSERT
75	set_interface_property reset ENABLED true
76	set_interface_property reset EXPORT_OF ""
77	set_interface_property reset PORT_NAME_MAP ""
78	set_interface_property reset CMSIS_SVD_VARIABLES ""
79	set_interface_property reset SVD_ADDRESS_GROUP ""
80
81	add_interface_port reset reset reset Input 1
82
83
84	#
85	# connection point ctrl
86	#
87	add_interface ctrl avalon end
88	set_interface_property ctrl addressUnits WORDS
89	set_interface_property ctrl associatedClock clock
90	set_interface_property ctrl associatedReset reset
91	set_interface_property ctrl bitsPerSymbol 8
92	set_interface_property ctrl burstOnBurstBoundariesOnly false
93	set_interface_property ctrl burstcountUnits WORDS
94	set_interface_property ctrl explicitAddressSpan 0
95	set_interface_property ctrl holdTime 0
96	set_interface_property ctrl linewrapBursts false
97	set_interface_property ctrl maximumPendingReadTransactions 0
98	set_interface_property ctrl readLatency 0
99	set_interface_property ctrl readWaitTime 1
100	set_interface_property ctrl setupTime 0
101	set_interface_property ctrl timingUnits Cycles
102	set_interface_property ctrl writeWaitTime 0
103	set_interface_property ctrl ENABLED true
104	set_interface_property ctrl EXPORT_OF ""
105	set_interface_property ctrl PORT_NAME_MAP ""
106	set_interface_property ctrl CMSIS_SVD_VARIABLES ""
107	set_interface_property ctrl SVD_ADDRESS_GROUP ""
108
109	add_interface_port ctrl avs_s0_address address Input 8
110	add_interface_port ctrl avs_s0_read read Input 1
111	add_interface_port ctrl avs_s0_readdata readdata Output 32
112	add_interface_port ctrl avs_s0_write write Input 1
113	add_interface_port ctrl avs_s0_writedata writedata Input 32
114	add_interface_port ctrl avs_s0_waitrequest waitrequest Output 1
115	set_interface_assignment ctrl embeddedsw.configuration.isFlash 0
116	set_interface_assignment ctrl embeddedsw.configuration.isMemoryDevice 0
117	set_interface_assignment ctrl embeddedsw.configuration.isNonVolatileStorage 0
118	set_interface_assignment ctrl embeddedsw.configuration.isPrintableDevice 0
119
120
121	#
122	# connection point raw_video
123	#
124	add_interface raw_video avalon_streaming start
125	set_interface_property raw_video associatedClock clock
126	set_interface_property raw_video associatedReset reset
127	set_interface_property raw_video dataBitsPerSymbol 8
128	set_interface_property raw_video errorDescriptor ""
129	set_interface_property raw_video firstSymbolInHighOrderBits true
130	set_interface_property raw_video maxChannel 0
131	set_interface_property raw_video readyLatency 0
132	set_interface_property raw_video ENABLED true
133	set_interface_property raw_video EXPORT_OF ""
134	set_interface_property raw_video PORT_NAME_MAP ""
135	set_interface_property raw_video CMSIS_SVD_VARIABLES ""
136	set_interface_property raw_video SVD_ADDRESS_GROUP ""
137
138	add_interface_port raw_video aso_out0_data data Output 32
139	add_interface_port raw_video aso_out0_ready ready Input 1
140	add_interface_port raw_video aso_out0_valid valid Output 1
141
142
143	#
144	# connection point conduit_camera
145	#
146	add_interface conduit_camera conduit end
147	set_interface_property conduit_camera associatedClock clock
148	set_interface_property conduit_camera associatedReset ""
149	set_interface_property conduit_camera ENABLED true
150	set_interface_property conduit_camera EXPORT_OF ""
151	set_interface_property conduit_camera PORT_NAME_MAP ""
152	set_interface_property conduit_camera CMSIS_SVD_VARIABLES ""
153	set_interface_property conduit_camera SVD_ADDRESS_GROUP ""
154
155	add_interface_port conduit_camera D5M_D export Input 12
156	add_interface_port conduit_camera D5M_RESETn export Output 1
157	add_interface_port conduit_camera D5M_FVAL export Input 1
158	add_interface_port conduit_camera D5M_LVAL export Input 1
159	add_interface_port conduit_camera D5M_PIXLCLK export Input 1
160	add_interface_port conduit_camera D5M_SCLK export Output 1
161	add_interface_port conduit_camera D5M_SDATA export Bidir 1
162	add_interface_port conduit_camera D5M_STROBE export Input 1
163	add_interface_port conduit_camera D5M_TRIGGER export Output 1
164	add_interface_port conduit_camera D5M_XCLKIN export Output 1
165

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