source: PROJECT_SMART_EEG/trunk/hw/sync_sys/video_codec @ 87

Name Size Rev Age Author Last Change
../
video_codec_hw.tcl 7.2 KB ​ 87   10 years lambert Adding generation simulation support for verilog
video_codec.v 2.0 KB ​ 84   10 years lambert Adding hierarchical subdirectory for every component
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