Index: /PROJECT_CORE_MPI/MPI_HCL/TRUNK/Test_Timer/wave.do
===================================================================
--- /PROJECT_CORE_MPI/MPI_HCL/TRUNK/Test_Timer/wave.do	(revision 112)
+++ /PROJECT_CORE_MPI/MPI_HCL/TRUNK/Test_Timer/wave.do	(revision 112)
@@ -0,0 +1,146 @@
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate /mpi_test/clk
+add wave -noupdate /mpi_test/reset
+add wave -noupdate /mpi_test/result
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/setbit1/Ram_data_in
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/setbit1/Ram_data_out
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/sb_ram_rd
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/sb_ram_wr
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/ram_address
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/Ram_data_in
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/Ram_data_out
+add wave -noupdate /mpi_test/clk
+add wave -noupdate /mpi_test/reset
+add wave -noupdate /mpi_test/result
+add wave -noupdate /mpi_test/clk
+add wave -noupdate /mpi_test/reset
+add wave -noupdate /mpi_test/result
+add wave -noupdate /mpi_test/clk
+add wave -noupdate /mpi_test/reset
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/src_address
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/switch_port_in_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/switch_port_in_wr_en
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/dma_rd_grant
+add wave -noupdate /mpi_test/result
+add wave -noupdate /mpi_test/clk
+add wave -noupdate /mpi_test/reset
+add wave -noupdate /mpi_test/result
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/sb_ram_rd
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/sb_ram_wr
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/sb_whole
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/sb_done
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/sb_BitMask
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/sb_BitVal
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/ram_address
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/Ram_data_in
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/Ram_data_out
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/ram_rd
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/ram_wr
+add wave -noupdate /mpi_test/uut/PE_s(1)/S/HT_task/RunState
+add wave -noupdate /mpi_test/uut/PE_s(1)/S/HT_task/ct_state
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/ex1_state
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/switch_port_in_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/fifo_src
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/ex2_state
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/switch_port_out_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/Snd_Start
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/Snd_Start
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/stInit2
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/etcmd
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/etrec
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/port_out_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/port_out_data_available
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX4_FSM/snd_start_i
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/switch_port_in_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/n
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/switch_port_in_wr_en
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/fifo_data_out
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/p_len
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/fifo_rd_en
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/fifo_empty
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/ex2_state
+add wave -noupdate -radix unsigned /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/P_len
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/switch_port_out_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/switch_data_available
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX1_FSM/dest_address
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/P_len
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/n
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/ex2_state
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/setbit1/State
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/setbit1/Ram_data_in
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/setbit1/Ram_data_out
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/n
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/n_i
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/P_len
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/P_len_i
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/dma_wr_request
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/dma_wr_grant
+add wave -noupdate /mpi_test/result
+add wave -noupdate -expand -subitemconfig {/mpi_test/uut/PE_s(1)/S/HT_task/sram.O {-height 18 -childformat {{/mpi_test/uut/PE_s(1)/S/HT_task/sram.O.addr_wr -radix hexadecimal} {/mpi_test/uut/PE_s(1)/S/HT_task/sram.O.addr_rd -radix hexadecimal} {/mpi_test/uut/PE_s(1)/S/HT_task/sram.O.data_in -radix hexadecimal}} -expand} /mpi_test/uut/PE_s(1)/S/HT_task/sram.O.addr_wr {-height 18 -radix hexadecimal} /mpi_test/uut/PE_s(1)/S/HT_task/sram.O.addr_rd {-height 18 -radix hexadecimal} /mpi_test/uut/PE_s(1)/S/HT_task/sram.O.data_in {-height 18 -radix hexadecimal} /mpi_test/uut/PE_s(1)/S/HT_task/sram.I -expand} /mpi_test/uut/PE_s(1)/S/HT_task/sram
+add wave -noupdate /mpi_test/uut/PE_s(1)/S/HT_task/Libr
+add wave -noupdate /mpi_test/uut/PE_s(1)/S/HT_task/RunState
+add wave -noupdate /mpi_test/uut/PE_s(1)/S/HT_task/ct_state
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/HT_task/RunState
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/HT_task/ct_state
+add wave -noupdate -radix hexadecimal /mpi_test/uut/PE_s(2)/S/HT_task/sram.O.addr_rd
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/HT_task/sram.I.data_out
+add wave -noupdate -radix hexadecimal /mpi_test/uut/PE_s(2)/S/Ram8k8/addra
+add wave -noupdate -radix hexadecimal /mpi_test/uut/PE_s(2)/S/Ram8k8/addrb
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/Ram8k8/doutb
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/Ram8k8/dina
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/Ram8k8/wea(0)
+add wave -noupdate /mpi_test/uut/dyn_HT/PE_D(3)/D/HT_task/RunState
+add wave -noupdate /mpi_test/uut/dyn_HT/PE_D(4)/D/HT_task/RunState
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/ex2_state
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/GPost
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/Rec_WPost
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/Received_get
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/GPost_Set
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/Waited_Get(0)
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/GComp
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/ex2_state
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/switch_port_out_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/n
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/ex1_state
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/fifo_data_out
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX1_FSM/n
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/ram_address
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/dma_rd_grant
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/dma_wr_grant
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/dest_address
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/WBUSY
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/Rec_WPost
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/Received_get
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/Set_Wbusy
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/Waited_Get(0)
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/GPost
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/GComp
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(2)/hardmpi/MPI_CORE_EX2_FSM/GPost_Set
+add wave -noupdate -radix hexadecimal /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/switch_port_out_data
+add wave -noupdate /mpi_test/uut/Xbar/HCL_c(1)/hardmpi/MPI_CORE_EX2_FSM/switch_data_available
+add wave -noupdate /mpi_test/clk
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/Ram8k8/enb
+add wave -noupdate /mpi_test/uut/PE_s(2)/S/Ram8k8/wea(0)
+add wave -noupdate -radix binary /mpi_test/uut/PE_s(2)/S/Ram8k8/doutb
+add wave -noupdate -radix binary /mpi_test/uut/PE_s(2)/S/Ram8k8/dina
+add wave -noupdate -radix hexadecimal /mpi_test/uut/PE_s(2)/S/Ram8k8/addrb
+add wave -noupdate -radix hexadecimal /mpi_test/uut/PE_s(2)/S/Ram8k8/addra
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {13042 ps} 0} {{Cursor 2} {31415000 ps} 0} {{Cursor 3} {100265000 ps} 0}
+quietly wave cursor active 1
+configure wave -namecolwidth 165
+configure wave -valuecolwidth 135
+configure wave -justifyvalue left
+configure wave -signalnamewidth 1
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+configure wave -timelineunits ns
+update
+WaveRestoreZoom {0 ps} {74096 ps}
