Index: /PROJECT_CORE_MPI/MPI_HCL/BRANCHES/v2.1/Timer_Par/IP_Timer.vhd
===================================================================
--- /PROJECT_CORE_MPI/MPI_HCL/BRANCHES/v2.1/Timer_Par/IP_Timer.vhd	(revision 155)
+++ /PROJECT_CORE_MPI/MPI_HCL/BRANCHES/v2.1/Timer_Par/IP_Timer.vhd	(revision 155)
@@ -0,0 +1,73 @@
+---------------------------------------------------------------------------------
+-- Company: 
+-- Engineer: 
+-- 
+-- Create Date:    15:11:13 01/16/2014 
+-- Design Name: 
+-- Module Name:    IP_Timer - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+----------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity IP_Timer is
+
+port (clk,reset,upDn,load,start:in std_logic;
+loadval :in std_logic_vector(31 downto 0);
+outval : out std_logic_vector(31 downto 0);
+zero : out std_logic);
+
+end IP_Timer;
+
+architecture Behavioral of IP_Timer is
+signal count: std_logic_vector(31 downto 0);
+signal z:std_logic:='1';
+begin
+process (clk) 
+begin
+   if clk='1' and clk'event then
+      if reset='1' then 
+         count <= (others => '0');
+			z<='1';
+      elsif start='1' then
+         if load='1' then
+            count <= loadval;
+         else 
+            if UpDn='1' then   
+               count <= count + 1;
+            else
+               count <= count - 1;
+            end if;
+         end if;
+			if count=0 then
+				z<='1';
+			else
+				z<='0';
+			end if;
+      end if;
+   end if;
+end process; 
+OutVal<=count;
+zero<=z;
+end Behavioral;
+