GENERIC_16_16 Project Status
Project File: | GENERIC_16_16.ise | Implementation State: | New
Module Name: | Scheduler | Errors: |
Target Device: | xc3s1200e-4fg320 | Warnings: |
Product Version: | ISE 11.1 | Routing Results: |
Design Goal: | Balanced | Timing Constraints: |
Design Strategy: | Xilinx Default (unlocked) | Final Timing Score: |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report |  |  |  |  |
Translation Report |  |  |  |  |
Map Report |  |  |  |  |
Place and Route Report |  |  |  |  |
Power Report |  |  |  |  |
Post-PAR Static Timing Report |  |  |  |  |
Bitgen Report |  |  |  |  |

Secondary Reports | [-]
Report Name | Status | Generated

Date Generated: 06/19/2011 - 14:29:40