MPI_CORE_COMPONENTS Project Status
Project File: MPI_CORE_COMPONENTS.ise Implementation State: Synthesized
Module Name: CORE_MPI
  • Errors:
No Errors
Target Device: xc3s1200e-4fg320
  • Warnings:
151 Warnings
Product Version:ISE 11.1
  • Routing Results:
 
Design Goal: Balanced
  • Timing Constraints:
 
Design Strategy: Xilinx Default (unlocked)
  • Final Timing Score:
  
 
Device Utilization Summary (estimated values) [-]
Logic UtilizationUsedAvailableUtilization
Number of Slices 213 8672 2%
Number of Slice Flip Flops 137 17344 0%
Number of 4 input LUTs 470 17344 2%
Number of bonded IOBs 63 250 25%
Number of GCLKs 1 24 4%
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentmar. 21. juin 10:30:03 20110151 Warnings37 Infos
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 06/22/2011 - 07:17:00