Running: d:\Xilinx\12.3\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib secureip -o C:/Core MPI/CORE_MPI/MultiMPITest_isim_beh.exe -prj C:/Core MPI/CORE_MPI/MultiMPITest_beh.prj work.MultiMPITest 
ISim M.70d (signature 0x16fbe694)
Number of CPUs detected in this system: 8
Turning on mult-threading, number of parallel sub-compilation jobs: 16 
Determining compilation order of HDL files
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/CoreTypes.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/RAM_256.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/Arbiter.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER8_8.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER7_7.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER6_6.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER5_5.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER4_4.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER3_3.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER2_2.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER16_16.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER15_15.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER14_14.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER13_13.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SCHEDULER12_12.VHD" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/FIFO_256_FWFT.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/Crossbit.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/round_robbin_machine.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/Packet_type.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/MUX8.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/MUX1.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/DEMUX1.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/Scheduler.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/OUTPUT_PORT_MODULE.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/INPUT_PORT_MODULE.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/Crossbar.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/MPI_CORE_SCHEDULER.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/load_instr.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/FIFO_64_FWFT.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/EX4_FSM.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/EX3_FSM.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/EX2_FSM.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/EX1_FSM.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/Ex0_Fsm.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/DMA_ARBITER.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/../SWITCH_GENERIC_16_16/SWITCH_GEN.vhd" into library NocLib
Parsing VHDL file "C:/Core MPI/CORE_MPI/RAM_32_32.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/MPI_RMA.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/CORE_MPI.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/PE.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/MPI_NOC.vhd" into library work
Parsing VHDL file "C:/Core MPI/CORE_MPI/MultiMPITest.vhd" into library work
Starting static elaboration
WARNING:HDLCompiler:1242 - "N:/M.70d/rtf/vhdl/src/ieee/numeric_std.vhd" Line 3181: Warning: "NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0"
Completed static elaboration
Using precompiled package standard from library std
Using precompiled package std_logic_1164 from library ieee
Using precompiled package numeric_std from library ieee
Using precompiled package std_logic_arith from library ieee
Using precompiled package std_logic_unsigned from library ieee
Compiling package coretypes
Compiling package packet_type
Compiling package mpi_rma
Compiling architecture behavioral of entity ram_256 [ram_256_default]
Compiling architecture behavioral of entity fifo_256_fwft [fifo_256_fwft_default]
Compiling architecture behavioral of entity input_port_module [\INPUT_PORT_MODULE(4,1)\]
Compiling architecture behavioral of entity input_port_module [\INPUT_PORT_MODULE(4,2)\]
Compiling architecture behavioral of entity input_port_module [\INPUT_PORT_MODULE(4,3)\]
Compiling architecture behavioral of entity input_port_module [\INPUT_PORT_MODULE(4,4)\]
Compiling architecture behavioral_description of entity output_port_module [output_port_module_default]
Compiling architecture behavioral of entity crossbit [\Crossbit(4)\]
Compiling architecture behavioral of entity crossbar [\Crossbar(4)\]
Compiling architecture behavioral of entity arbiter [arbiter_default]
Compiling architecture behavioral of entity scheduler4_4 [scheduler4_4_default]
Compiling architecture behavioral of entity scheduler [\Scheduler(4)\]
Compiling architecture behavioral of entity switch_gen [\SWITCH_GEN(4)\]
Compiling architecture behavioral of entity fifo_64_fwft [fifo_64_fwft_default]
Compiling architecture behavioral of entity load_instr [load_instr_default]
Compiling architecture behavioral of entity ex0_fsm [\Ex0_Fsm(7,0,31,0,31,0)\]
Compiling architecture behavioral of entity ex1_fsm [ex1_fsm_default]
Compiling architecture behavioral of entity ex2_fsm [\EX2_FSM(('0','0','0','1'),('0',...]
Compiling architecture behavioral of entity ex3_fsm [\EX3_FSM(('0','0','0','0','0','0...]
Compiling architecture behavioral of entity ex4_fsm [ex4_fsm_default]
Compiling architecture behavioral of entity dma_arbiter [dma_arbiter_default]
Compiling architecture behavioral of entity round_robbin_machine [round_robbin_machine_default]
Compiling architecture behavioral of entity mux1 [mux1_default]
Compiling architecture behavioral of entity demux1 [demux1_default]
Compiling architecture behavioral of entity mux8 [mux8_default]
Compiling architecture behavioral of entity mpi_core_scheduler [mpi_core_scheduler_default]
Compiling architecture structural of entity core_mpi [core_mpi_default]
Compiling architecture structural of entity mpi_noc [\MPI_NOC(4)\]
Compiling architecture behavioral of entity ram_v [\RAM_v(8,16)\]
Compiling architecture behavioral of entity pe [\PE(1)\]
Compiling architecture behavioral of entity pe [\PE(0)\]
Compiling architecture behavior of entity multimpitest
Time Resolution for simulation is 1ps.
Waiting for 20 sub-compilation(s) to finish...
Compiled 71 VHDL Units
Built simulation executable C:/Core MPI/CORE_MPI/MultiMPITest_isim_beh.exe
Fuse Memory Usage: 42976 KB
Fuse CPU Usage: 1512 ms