-------------------------------------------------------------------------------- Release 12.3 Trace (nt64) Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. d:\Xilinx\12.3\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 5 -n 3 -fastpaths -xml MPI_NOC_preroute.twx MPI_NOC_map.ncd -o MPI_NOC_preroute.twr MPI_NOC.pcf -ucf MPI_NOC.ucf Design file: MPI_NOC_map.ncd Physical constraint file: MPI_NOC.pcf Device,package,speed: xc3s1200e,ft256,-5 (PRODUCTION 1.27 2010-09-15) Report level: verbose report Environment Variable Effect -------------------- ------ NONE No environment variables were set -------------------------------------------------------------------------------- INFO:Timing:2698 - No timing constraints found, doing default enumeration. INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report. INFO:Timing:3284 - This timing report was generated using estimated delay information. For accurate numbers, please refer to the post Place and Route timing report. INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet. INFO:Timing:3390 - This architecture does not support a default System Jitter value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock Uncertainty calculation. INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and 'Phase Error' calculations, these terms will be zero in the Clock Uncertainty calculation. Please make appropriate modification to SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase Error. Data Sheet report: ----------------- All values displayed in nanoseconds (ns) Setup/Hold to clock MPI_Node_in<1>_clk ------------------------------+------------+------------+------------------------+--------+ |Max Setup to|Max Hold to | | Clock | Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase | ------------------------------+------------+------------+------------------------+--------+ MPI_Node_in<1>_hold_ack | 1.337(R)| 1.112(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_instruction_en | 0.903(R)| 1.122(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<0>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<1>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<2>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<3>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<4>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<5>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<6>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_ram_data_out<7>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<1>_reset | 0.466(R)| 1.712(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_hold_ack | 1.337(R)| 1.112(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_instruction_en | 0.903(R)| 1.122(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<0>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<1>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<2>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<3>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<4>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<5>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<6>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_in<2>_ram_data_out<7>| 1.323(R)| 1.335(R)|MPI_Node_in_1__clk_BUFGP| 0.000| ------------------------------+------------+------------+------------------------+--------+ Clock MPI_Node_in<1>_clk to Pad -------------------------------------+------------+------------------------+--------+ | clk (edge) | | Clock | Destination | to PAD |Internal Clock(s) | Phase | -------------------------------------+------------+------------------------+--------+ MPI_Node_Out<1>_PushOut<0> | 6.286(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_hold_req | 6.998(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_instruction_fifo_full| 7.713(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<0> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<1> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<2> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<3> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<4> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<5> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<6> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<7> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<8> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<9> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<10> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<11> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<12> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<13> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<14> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_rd<15> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<0> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<1> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<2> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<3> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<4> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<5> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<6> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<7> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<8> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<9> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<10> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<11> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<12> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<13> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<14> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_address_wr<15> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_en | 9.415(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<1>_ram_we | 8.425(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_PushOut<0> | 6.286(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_hold_req | 6.998(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_instruction_fifo_full| 7.713(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<0> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<1> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<2> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<3> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<4> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<5> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<6> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<7> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<8> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<9> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<10> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<11> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<12> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<13> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<14> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_rd<15> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<0> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<1> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<2> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<3> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<4> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<5> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<6> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<7> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<8> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<9> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<10> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<11> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<12> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<13> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<14> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_address_wr<15> | 7.991(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_en | 9.415(R)|MPI_Node_in_1__clk_BUFGP| 0.000| MPI_Node_Out<2>_ram_we | 8.425(R)|MPI_Node_in_1__clk_BUFGP| 0.000| -------------------------------------+------------+------------------------+--------+ Clock to Setup on destination clock MPI_Node_in<1>_clk ------------------+---------+---------+---------+---------+ | Src:Rise| Src:Fall| Src:Rise| Src:Fall| Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall| ------------------+---------+---------+---------+---------+ MPI_Node_in<1>_clk| 8.699| | | | ------------------+---------+---------+---------+---------+ Analysis completed Fri Aug 03 10:19:46 2012 -------------------------------------------------------------------------------- Trace Settings: ------------------------- Trace Settings Peak Memory Usage: 238 MB