Last change
on this file since 1 was
1,
checked in by buchmann, 17 years ago
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Initial import from CVS repository
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File size:
2.2 KB
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Rev | Line | |
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[1] | 1 | #include <systemc.h> |
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| 2 | |
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| 3 | #define ASSERT(x) \ |
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| 4 | { \ |
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| 5 | if (!(x)) \ |
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| 6 | { \ |
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| 7 | cerr << "ASSERT : " #x "\n"; \ |
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| 8 | exit (1); \ |
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| 9 | } \ |
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| 10 | } |
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| 11 | |
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| 12 | using namespace std; |
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| 13 | |
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| 14 | struct inner1 : sc_module { |
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| 15 | sc_in_clk clk; |
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| 16 | sc_in <int> i1; |
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| 17 | sc_out<int> o1; |
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| 18 | |
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| 19 | void mealy () |
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| 20 | { |
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| 21 | cerr << "executing 'mealy' function at cycle #" << sc_simulation_time () |
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| 22 | << endl; |
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| 23 | o1 = i1.read() + 3; |
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| 24 | } |
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| 25 | |
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| 26 | SC_HAS_PROCESS(inner1); |
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| 27 | inner1 (sc_module_name) |
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| 28 | { |
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| 29 | SC_METHOD(mealy); |
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| 30 | sensitive << clk.neg() << i1; |
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| 31 | } |
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| 32 | }; |
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| 33 | |
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| 34 | struct inner2 : sc_module { |
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| 35 | sc_in_clk clk; |
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| 36 | sc_in <bool> resetn; |
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| 37 | sc_in <int> i1; |
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| 38 | sc_out<int> o1; |
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| 39 | sc_signal<int> reg1; |
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| 40 | |
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| 41 | void transition () |
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| 42 | { |
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| 43 | //reg1 = 0; |
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| 44 | if (resetn.read()) |
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| 45 | reg1 = i1.read(); |
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| 46 | else |
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| 47 | reg1 = 0; |
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| 48 | } |
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| 49 | void generation () |
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| 50 | { |
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| 51 | o1 = reg1.read(); |
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| 52 | } |
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| 53 | |
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| 54 | SC_HAS_PROCESS(inner2); |
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| 55 | inner2 (sc_module_name) |
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| 56 | { |
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| 57 | SC_METHOD(transition); |
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| 58 | sensitive << clk.pos(); |
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| 59 | SC_METHOD(generation); |
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| 60 | sensitive << clk.neg(); |
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| 61 | } |
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| 62 | }; |
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| 63 | |
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| 64 | struct test : sc_module { |
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| 65 | sc_in_clk clk; |
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| 66 | sc_in<bool> resetn; |
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| 67 | |
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| 68 | sc_signal<int> sig; |
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| 69 | |
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| 70 | inner1 comp1; |
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| 71 | inner2 comp2; |
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| 72 | |
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| 73 | sc_in <int> i1; |
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| 74 | sc_out<int> o1; |
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| 75 | |
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| 76 | SC_HAS_PROCESS(test); |
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| 77 | test (sc_module_name n) : sc_module (n), |
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| 78 | comp1("comp1"), |
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| 79 | comp2("comp2"), |
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| 80 | clk("clk") |
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| 81 | { |
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| 82 | comp1.clk (clk); |
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| 83 | comp1.i1 (i1); |
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| 84 | comp1.o1 (sig); |
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| 85 | comp2.clk (clk); |
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| 86 | comp2.resetn(resetn); |
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| 87 | comp2.i1 (sig); |
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| 88 | comp2.o1 (o1); |
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| 89 | }; |
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| 90 | }; |
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| 91 | |
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| 92 | int sc_main (int argc, char *argv[]) |
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| 93 | { |
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| 94 | sc_clock signal_clk("my_clock",1, 0.5); |
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| 95 | sc_signal<bool> resetn("resetn"); |
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| 96 | sc_signal<int > s01("s01"); |
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| 97 | sc_signal<int > s02("s02"); |
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| 98 | |
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| 99 | test test1("test1"); |
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| 100 | test1.clk (signal_clk); |
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| 101 | test1.resetn (resetn); |
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| 102 | test1.i1 (s01); |
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| 103 | test1.o1 (s02); |
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| 104 | |
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| 105 | // Init & run |
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| 106 | sc_start (0); |
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| 107 | |
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| 108 | s01 = 1; |
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| 109 | resetn = false; |
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| 110 | sc_start (4); |
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| 111 | resetn = true; |
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| 112 | sc_start (1); |
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| 113 | ASSERT(s02.read() == 4); |
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| 114 | sc_start (2); |
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| 115 | ASSERT(s02.read() == 4); |
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| 116 | s01 = 10; |
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| 117 | sc_start (20); |
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| 118 | ASSERT(s02.read() == 13); |
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| 119 | |
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| 120 | return EXIT_SUCCESS; |
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| 121 | } |
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| 122 | |
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| 123 | #undef sc_inout |
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