[1] | 1 | /*------------------------------------------------------------\ |
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| 2 | | | |
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| 3 | | Tool : systemcass | |
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| 4 | | | |
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| 5 | | File : sc_port.cc | |
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| 6 | | | |
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| 7 | | Author : Buchmann Richard | |
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| 8 | | Taktak Sami | |
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| 9 | | | |
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| 10 | | Date : 09_07_2004 | |
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| 11 | | | |
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| 12 | \------------------------------------------------------------*/ |
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| 13 | |
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| 14 | /* |
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| 15 | * This file is part of the Disydent Project |
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| 16 | * Copyright (C) Laboratoire LIP6 - Département ASIM |
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| 17 | * Universite Pierre et Marie Curie |
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| 18 | * |
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| 19 | * Home page : http://www-asim.lip6.fr/disydent |
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| 20 | * E-mail : mailto:richard.buchmann@lip6.fr |
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| 21 | * |
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| 22 | * This library is free software; you can redistribute it and/or modify it |
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| 23 | * under the terms of the GNU Library General Public License as published |
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| 24 | * by the Free Software Foundation; either version 2 of the License, or (at |
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| 25 | * your option) any later version. |
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| 26 | * |
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| 27 | * Disydent is distributed in the hope that it will be |
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| 28 | * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General |
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| 30 | * Public License for more details. |
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| 31 | * |
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| 32 | * You should have received a copy of the GNU General Public License along |
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| 33 | * with the GNU C Library; see the file COPYING. If not, write to the Free |
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| 34 | * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 35 | */ |
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| 36 | |
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| 37 | |
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[27] | 38 | #include <iomanip> |
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| 39 | #include <map> |
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| 40 | #include <cassert> |
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[1] | 41 | |
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[27] | 42 | #include "sc_port.h" |
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| 43 | #include "sc_signal.h" |
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| 44 | #include "sc_module.h" |
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| 45 | #include "entity.h" |
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| 46 | #include "global_functions.h" |
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[1] | 47 | |
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[27] | 48 | #ifdef HAVE_CONFIG_H |
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| 49 | #include "config.h" |
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| 50 | #endif |
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| 51 | |
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[1] | 52 | extern "C" { |
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[52] | 53 | extern char unstable; |
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| 54 | char unstable = 0; // not in sc_core namespace because dynamic link support C linkage only |
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[60] | 55 | int32 * pending_write_vector_nb = 0; |
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| 56 | unsigned long long int total_assig = 0; |
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| 57 | #pragma omp threadprivate (pending_write_vector_nb, total_assig) |
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[1] | 58 | } |
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| 59 | |
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| 60 | using namespace std; |
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| 61 | |
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| 62 | namespace sc_core { |
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| 63 | |
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[52] | 64 | const char * const sc_port_base::kind_string = "sc_port"; |
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| 65 | const char * const sc_signal_base::kind_string = "sc_signal"; |
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[1] | 66 | |
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| 67 | unsigned int pending_write_vector_capacity = 512; |
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| 68 | pending_write_vector_t pending_write_vector = NULL; |
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[60] | 69 | #pragma omp threadprivate (pending_write_vector) |
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[1] | 70 | extern equi_list_t equi_list; |
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| 71 | |
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[59] | 72 | const char * get_module_name(const tab_t * pointer) { |
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| 73 | const equi_t & eq = get_equi(pointer); |
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| 74 | return get_module_name(eq); |
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[1] | 75 | } |
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| 76 | |
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| 77 | port2module_t port2module; |
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| 78 | |
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| 79 | // KIND STRING |
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| 80 | const char * const sc_inout_string = "sc_inout"; |
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| 81 | const char * const sc_in_string = "sc_in"; |
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| 82 | const char * const sc_out_string = "sc_out"; |
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| 83 | |
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[52] | 84 | |
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[1] | 85 | // ---------------------------------------------------------------------------- |
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| 86 | // CLASS : sc_port_base |
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| 87 | // |
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| 88 | // |
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| 89 | // ---------------------------------------------------------------------------- |
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| 90 | |
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[52] | 91 | sc_port_base::sc_port_base() { |
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[59] | 92 | init (); |
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[1] | 93 | } |
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| 94 | |
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[52] | 95 | |
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| 96 | sc_port_base::sc_port_base(const char * name_) : sc_object(name_) { |
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| 97 | init (); |
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[1] | 98 | } |
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| 99 | |
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[52] | 100 | |
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| 101 | sc_port_base::sc_port_base(const sc_port_base & parent_) : sc_object (parent_.name ()) { |
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| 102 | init (); |
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[1] | 103 | } |
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| 104 | |
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[52] | 105 | |
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| 106 | void sc_port_base::init() { |
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[27] | 107 | #ifdef CONFIG_DEBUG |
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[52] | 108 | if (modules_stack.empty()) { |
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| 109 | cerr << "Internal error : modules stack empty\n"; |
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| 110 | exit (9); |
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| 111 | } |
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[1] | 112 | #endif |
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[52] | 113 | const sc_module * last_module = sc_core::modules_stack.top(); |
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| 114 | port2module[this] = last_module; |
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| 115 | set_kind(kind_string); |
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[1] | 116 | } |
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| 117 | |
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[52] | 118 | |
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| 119 | const sc_module & sc_port_base::get_module() const { |
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| 120 | port2module_t::iterator i = port2module.find ((sc_port_base *) this); |
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| 121 | if (i == port2module.end()) { |
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| 122 | cerr << "Internal error : Modules contain ports. " |
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[1] | 123 | "SystemCASS needs to identify the module that contains the following port : '" |
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[52] | 124 | << name() |
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| 125 | << "'\n"; |
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| 126 | exit (17); |
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| 127 | } |
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| 128 | const sc_module * m = i->second; |
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| 129 | return *m; |
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[1] | 130 | } |
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| 131 | |
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[52] | 132 | |
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[35] | 133 | static bool check_multiwriting2port_error_message = true; |
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[52] | 134 | |
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| 135 | void sc_port_base::check_multiwriting2port() const { |
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| 136 | static std::map<sc_port_base *, double> s; |
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| 137 | double t = sc_simulation_time(); |
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| 138 | if (t == 0) { |
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| 139 | return; |
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| 140 | } |
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| 141 | sc_port_base * port = (sc_port_base *) this; |
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| 142 | if ((s[port] == t) && (check_multiwriting2port_error_message)) { |
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| 143 | check_multiwriting2port_error_message = 0; |
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| 144 | if (use_port_dependency) { |
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| 145 | std::cerr << "Error at cycle #" << t << " : " |
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| 146 | "SystemCASS allows only 1 writing for each ports/signals.\n" |
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[1] | 147 | << "Functions write several times into '" << name () << "'.\n"; |
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[52] | 148 | } |
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| 149 | else { |
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| 150 | std::cerr << "Error : " |
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| 151 | "Multiwriting to port assertion works only " |
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| 152 | "when SystemCASS uses port dependency information " |
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| 153 | "(--p parameter).\n"; |
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| 154 | } |
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| 155 | sc_core::sc_stop(); |
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| 156 | exit (31072006); // 6 |
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[1] | 157 | } |
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[52] | 158 | else { |
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| 159 | s[port] = t; |
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| 160 | } |
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[1] | 161 | } |
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| 162 | |
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[52] | 163 | |
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| 164 | std::ostream & operator << (std::ostream & o, const sc_port_base & p) { |
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| 165 | return o << p.name(); |
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[1] | 166 | } |
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[52] | 167 | |
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| 168 | |
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[1] | 169 | // ---------------------------------------------------------------------------- |
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| 170 | // CLASS : sc_signal_base |
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| 171 | // |
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| 172 | // The sc_signal<T> primitive channel class. |
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| 173 | // ---------------------------------------------------------------------------- |
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[52] | 174 | void sc_signal_base::init() { |
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| 175 | set_kind(kind_string); |
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| 176 | bind(*this); |
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[1] | 177 | } |
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| 178 | |
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[52] | 179 | |
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[1] | 180 | sc_signal_base::sc_signal_base() { |
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[52] | 181 | init(); |
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[1] | 182 | } |
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| 183 | |
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| 184 | |
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[52] | 185 | sc_signal_base::sc_signal_base(const char * name_) : sc_object(name_) { |
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| 186 | init (); |
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[1] | 187 | } |
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| 188 | |
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[52] | 189 | |
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| 190 | sc_signal_base::sc_signal_base(const char * name_, void *) : sc_object(name_) { |
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| 191 | // this overload is only used for SC_BIND_PROXY_NIL constant. |
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| 192 | // this signal should not be added to the signal list. |
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[1] | 193 | } |
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| 194 | |
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[52] | 195 | |
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| 196 | sc_signal_base::~sc_signal_base() {} |
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| 197 | |
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| 198 | |
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[1] | 199 | /* |
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| 200 | * Signals copy |
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| 201 | */ |
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| 202 | |
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| 203 | #ifdef DUMP_SIGNAL_STATS |
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[52] | 204 | typedef map<tab_t *, long long int> counter_t; |
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| 205 | static counter_t counter; |
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[1] | 206 | long long int unnecessary = 0; |
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| 207 | long long int total_assig = 0; |
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| 208 | #endif |
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| 209 | |
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| 210 | } // end of sc_core namespace |
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| 211 | |
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[52] | 212 | |
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[1] | 213 | extern "C" { |
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[52] | 214 | |
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| 215 | void update() { |
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[1] | 216 | #if defined(DUMP_STAGE) |
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[52] | 217 | cerr << "Updating... "; |
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[1] | 218 | #endif |
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[52] | 219 | // stl vectors are too slow |
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| 220 | // memcopy is not better |
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[59] | 221 | // signal table sorting doesn't give any better performance |
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[1] | 222 | #if defined(DUMP_STAGE) |
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[60] | 223 | cerr << "(" << *pending_write_vector_nb |
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[52] | 224 | << " internal pending writings) "; |
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[1] | 225 | #endif |
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[52] | 226 | unsigned int i; |
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[60] | 227 | for (i = 0; i < *pending_write_vector_nb; ++i) { |
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[1] | 228 | #define iter (sc_core::pending_write_vector[i]) |
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[27] | 229 | #ifdef CONFIG_DEBUG |
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[52] | 230 | if (iter.pointer == NULL) { |
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| 231 | cerr << "Internal error : trying to apply a posted write from an unassigned signal/port\n"; |
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| 232 | exit (8); |
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| 233 | } |
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[59] | 234 | #endif |
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[1] | 235 | #ifdef DUMP_SIGNAL_STATS |
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[52] | 236 | if (*(iter.pointer) == iter.value) { |
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| 237 | unnecessary++; |
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| 238 | } |
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| 239 | counter[iter.pointer]++; |
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[1] | 240 | #endif |
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[59] | 241 | *(iter.pointer) = iter.value; |
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[1] | 242 | #undef iter |
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[52] | 243 | } |
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[1] | 244 | #ifdef DUMP_SIGNAL_STATS |
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[60] | 245 | total_assig += *pending_write_vector_nb; |
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[1] | 246 | #endif |
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[60] | 247 | total_assig += *pending_write_vector_nb; |
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| 248 | *pending_write_vector_nb = 0; |
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[1] | 249 | |
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| 250 | #if defined(DUMP_STAGE) |
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[52] | 251 | cerr << "done.\n"; |
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[1] | 252 | #endif |
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[52] | 253 | } |
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[1] | 254 | |
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| 255 | } // end of extern "C" |
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| 256 | |
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| 257 | namespace sc_core { |
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| 258 | |
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[52] | 259 | void print_registers_writing_stats (ostream & o) { |
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[1] | 260 | #ifdef DUMP_SIGNAL_STATS |
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[52] | 261 | o << "signal index / name / usage (>1%)\n"; |
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| 262 | o << setprecision(2); |
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| 263 | double t = sc_simulation_time(); |
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| 264 | if (t == 0) { |
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| 265 | o << "Warning : simulation too short.\n"; |
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| 266 | t = 0.01; |
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| 267 | } |
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| 268 | if (total_assig == 0) { |
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| 269 | return; |
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| 270 | } |
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| 271 | counter_t::iterator k; |
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| 272 | for (k = counter.begin(); k != counter.end(); ++k) { |
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| 273 | double usage = k->second / t * 100; |
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| 274 | if (usage <= 1) { |
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| 275 | continue; |
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| 276 | } |
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| 277 | o << k->first << " " << get_name (k->first) << " " << usage << "%\n"; |
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| 278 | } |
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| 279 | typedef map<string, int> counter_module_t; |
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| 280 | counter_module_t counter_by_module; |
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| 281 | for (k = counter.begin(); k != counter.end(); ++k) { |
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| 282 | string module_name = get_module_name (k->first); |
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[59] | 283 | counter_by_module[module_name] += k->second; |
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[52] | 284 | } |
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| 285 | o << "module name / usage\n"; |
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| 286 | counter_module_t::iterator i; |
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| 287 | for (i = counter_by_module.begin(); i != counter_by_module.end(); ++i) { |
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| 288 | o << i->first << " " << (i->second * 100 / total_assig) << "%\n"; |
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| 289 | } |
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| 290 | cerr << "average of assignment number per cycle " << (total_assig / t) << "\n"; |
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| 291 | cerr << (unnecessary * 100 / total_assig) << "% of assignment are unecessary\n"; |
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[1] | 292 | #else |
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[52] | 293 | cerr << "Register usage not available.\n"; |
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[1] | 294 | #endif |
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| 295 | } |
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| 296 | |
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[59] | 297 | |
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[52] | 298 | static bool is_bound(/*const*/ sc_port_base & port) { |
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| 299 | const tab_t * pointer = port.get_pointer(); |
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| 300 | //assert(pointer != NULL); |
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| 301 | if (pointer == NULL) { |
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| 302 | return false; // case : sc_in not bound |
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| 303 | } |
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[59] | 304 | return has_equi(port); |
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[1] | 305 | } |
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| 306 | |
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[59] | 307 | |
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[52] | 308 | static void check_port(/*const*/ sc_port_base & port) { |
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[59] | 309 | if (!is_bound(port)) { |
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[52] | 310 | cerr << "Error : '" << port.name() << "' port" |
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[1] | 311 | " (" << port.kind() << ")" |
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| 312 | " is not bound.\n"; |
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[52] | 313 | exit (29); |
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| 314 | } |
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[1] | 315 | } |
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| 316 | |
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[52] | 317 | |
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| 318 | void check_all_ports() { |
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| 319 | if (dump_stage) { |
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| 320 | cerr << "checking ports..."; |
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| 321 | } |
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| 322 | port2module_t::/*const_*/iterator i; |
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| 323 | for (i = port2module.begin(); i != port2module.end(); ++i) { |
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[59] | 324 | /*const*/ sc_port_base * port = i->first; |
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[52] | 325 | assert(port != NULL); |
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| 326 | check_port(*port); |
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| 327 | } |
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| 328 | if (dump_stage) { |
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| 329 | cerr << " done."; |
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| 330 | } |
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[1] | 331 | } |
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| 332 | |
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[52] | 333 | |
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[1] | 334 | } // end of sc_core namespace |
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| 335 | |
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| 336 | |
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[52] | 337 | /* |
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| 338 | # Local Variables: |
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| 339 | # tab-width: 4; |
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| 340 | # c-basic-offset: 4; |
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| 341 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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| 342 | # indent-tabs-mode: nil; |
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| 343 | # End: |
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| 344 | # |
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| 345 | # vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 346 | */ |
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| 347 | |
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