1 | /* -*- c++ -*- |
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2 | * |
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3 | * SOCLIB_LGPL_HEADER_BEGIN |
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4 | * |
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5 | * This file is part of SoCLib, GNU LGPLv2.1. |
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6 | * |
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7 | * SoCLib is free software; you can redistribute it and/or modify it |
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8 | * under the terms of the GNU Lesser General Public License as published |
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9 | * by the Free Software Foundation; version 2.1 of the License. |
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10 | * |
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11 | * SoCLib is distributed in the hope that it will be useful, but |
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12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 | * Lesser General Public License for more details. |
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15 | * |
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16 | * You should have received a copy of the GNU Lesser General Public |
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17 | * License along with SoCLib; if not, write to the Free Software |
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18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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19 | * 02110-1301 USA |
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20 | * |
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21 | * SOCLIB_LGPL_HEADER_END |
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22 | * |
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23 | * Copyright (c) UPMC, Lip6, Asim |
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24 | * Alain Greiner <alain.greiner@lip6.fr>, 2008 |
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25 | * |
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26 | * Maintainers: alain |
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27 | */ |
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28 | |
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29 | //////////////////////////////////////////////////////////////////////////// |
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30 | // This component is a multi-segments ROM controller. |
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31 | // The VCI DATA can must be 32 bits or 64 bits. |
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32 | // The VCI ADDRESS and the PLEN fields should be multiple of 4 bytes. |
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33 | // It does not accept WRITE, LL, SC or CAS commands. |
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34 | // A READ burst command packet (such a cache line request) |
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35 | // contains one single flit. The number of flits in the response packet |
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36 | // depends on the PLEN field: |
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37 | // - If VCI DATA width = 32 bits, each flit contains 4 bytes, and the |
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38 | // number of flits is PLEN/4. |
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39 | // - If VCI DATA width = 64 bits, and PLEN define an even number of words, |
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40 | // each flit contains 8 bytes, and the number of flits is PLEN/8. |
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41 | // - If VCI DATA width = 64 bits, and PLEN define an odd number of words, |
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42 | // the last flit contains only 4 bytes right justified, |
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43 | // and the number of flits is PLEN/8 + 1. |
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44 | //////////////////////////////////////////////////////////////////////////// |
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45 | // Implementation note: |
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46 | // The ROM segments are implemented as a set of uint32_t arrays |
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47 | // (one array per segment). |
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48 | // This component is controlled by a single FSM. |
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49 | // The VCI command is analysed and checked in the IDLE state. |
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50 | // The response is sent in the READ (or ERROR) state. |
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51 | ///////////////////////////////////////////////////////////////////////// |
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52 | |
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53 | #ifndef SOCLIB_CABA_VCI_SIMPLE_ROM_H |
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54 | #define SOCLIB_CABA_VCI_SIMPLE_ROM_H |
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55 | |
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56 | #include <systemc> |
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57 | #include <vector> |
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58 | #include <list> |
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59 | #include <cassert> |
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60 | #include "caba_base_module.h" |
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61 | #include "vci_target.h" |
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62 | #include "mapping_table.h" |
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63 | #include "int_tab.h" |
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64 | #include "loader.h" |
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65 | #include "soclib_endian.h" |
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66 | |
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67 | namespace soclib { |
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68 | namespace caba { |
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69 | |
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70 | using namespace sc_core; |
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71 | |
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72 | template<typename vci_param> |
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73 | class VciSimpleRom |
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74 | : public soclib::caba::BaseModule |
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75 | { |
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76 | public: |
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77 | |
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78 | typedef typename vci_param::fast_data_t vci_data_t; |
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79 | typedef typename vci_param::srcid_t vci_srcid_t; |
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80 | typedef typename vci_param::trdid_t vci_trdid_t; |
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81 | typedef typename vci_param::pktid_t vci_pktid_t; |
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82 | |
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83 | enum fsm_state_e |
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84 | { |
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85 | FSM_IDLE, |
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86 | FSM_RSP_READ, |
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87 | FSM_RSP_ERROR, |
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88 | }; |
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89 | |
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90 | private: |
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91 | |
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92 | const soclib::common::Loader &m_loader; |
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93 | std::list<soclib::common::Segment> m_seglist; |
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94 | int m_drop_msb; |
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95 | |
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96 | sc_signal<int> r_fsm_state; |
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97 | sc_signal<size_t> r_flit_count; |
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98 | sc_signal<bool> r_odd_words; |
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99 | sc_signal<size_t> r_seg_index; |
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100 | sc_signal<size_t> r_rom_index; |
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101 | sc_signal<vci_srcid_t> r_srcid; |
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102 | sc_signal<vci_trdid_t> r_trdid; |
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103 | sc_signal<vci_pktid_t> r_pktid; |
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104 | |
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105 | size_t m_nbseg; |
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106 | uint32_t **m_rom; |
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107 | soclib::common::Segment **m_seg; |
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108 | |
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109 | protected: |
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110 | |
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111 | SC_HAS_PROCESS(VciSimpleRom); |
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112 | |
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113 | public: |
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114 | |
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115 | // Ports |
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116 | sc_in<bool> p_resetn; |
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117 | sc_in<bool> p_clk; |
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118 | soclib::caba::VciTarget<vci_param> p_vci; |
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119 | |
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120 | VciSimpleRom(sc_module_name name, |
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121 | const soclib::common::IntTab index, |
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122 | const soclib::common::MappingTable &mt, |
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123 | const soclib::common::Loader &loader, |
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124 | const int nb_msb_drop = 0); |
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125 | |
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126 | ~VciSimpleRom(); |
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127 | |
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128 | void print_trace(); |
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129 | |
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130 | private: |
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131 | |
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132 | void transition(); |
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133 | void genMoore(); |
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134 | void reload(); |
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135 | void reset(); |
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136 | }; |
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137 | |
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138 | }} |
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139 | |
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140 | #endif |
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141 | |
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142 | // Local Variables: |
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143 | // tab-width: 4 |
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144 | // c-basic-offset: 4 |
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145 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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146 | // indent-tabs-mode: nil |
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147 | // End: |
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148 | |
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149 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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150 | |
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