[450] | 1 | ////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File: tsar_iob_cluster.h |
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[648] | 3 | // Author: Alain Greiner |
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[450] | 4 | // Copyright: UPMC/LIP6 |
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| 5 | // Date : april 2013 |
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| 6 | // This program is released under the GNU public license |
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| 7 | ////////////////////////////////////////////////////////////////////////////// |
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| 8 | |
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| 9 | #ifndef SOCLIB_CABA_TSAR_IOB_CLUSTER_H |
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| 10 | #define SOCLIB_CABA_TSAR_IOB_CLUSTER_H |
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| 11 | |
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| 12 | #include <systemc> |
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| 13 | #include <sys/time.h> |
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| 14 | #include <iostream> |
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| 15 | #include <sstream> |
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| 16 | #include <cstdlib> |
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| 17 | #include <cstdarg> |
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| 18 | |
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| 19 | #include "gdbserver.h" |
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| 20 | #include "mapping_table.h" |
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| 21 | #include "mips32.h" |
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| 22 | #include "vci_simple_ram.h" |
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[658] | 23 | #include "vci_simple_rom.h" |
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[450] | 24 | #include "vci_xicu.h" |
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| 25 | #include "dspin_local_crossbar.h" |
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| 26 | #include "vci_dspin_initiator_wrapper.h" |
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| 27 | #include "vci_dspin_target_wrapper.h" |
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[550] | 28 | #include "dspin_router_tsar.h" |
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[450] | 29 | #include "virtual_dspin_router.h" |
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| 30 | #include "vci_multi_dma.h" |
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| 31 | #include "vci_mem_cache.h" |
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| 32 | #include "vci_cc_vcache_wrapper.h" |
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| 33 | #include "vci_io_bridge.h" |
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| 34 | |
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[648] | 35 | namespace soclib { namespace caba { |
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[450] | 36 | |
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| 37 | /////////////////////////////////////////////////////////////////////////// |
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[648] | 38 | template<typename vci_param_int, |
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[450] | 39 | typename vci_param_ext, |
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[648] | 40 | size_t dspin_int_cmd_width, |
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[450] | 41 | size_t dspin_int_rsp_width, |
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| 42 | size_t dspin_ram_cmd_width, |
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| 43 | size_t dspin_ram_rsp_width> |
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[648] | 44 | class TsarIobCluster |
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[450] | 45 | /////////////////////////////////////////////////////////////////////////// |
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| 46 | : public soclib::caba::BaseModule |
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| 47 | { |
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| 48 | |
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[648] | 49 | public: |
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[450] | 50 | |
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[648] | 51 | // Ports |
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| 52 | sc_in<bool> p_clk; |
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| 53 | sc_in<bool> p_resetn; |
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[450] | 54 | |
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[648] | 55 | // Thes two ports are used to connect IOB to IOX nework in top cell |
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| 56 | soclib::caba::VciInitiator<vci_param_ext>* p_vci_iob_iox_ini; |
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| 57 | soclib::caba::VciTarget<vci_param_ext>* p_vci_iob_iox_tgt; |
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[450] | 58 | |
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[648] | 59 | // These ports are used to connect IOB to RAM network in top cell |
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| 60 | soclib::caba::DspinOutput<dspin_ram_cmd_width>* p_dspin_iob_cmd_out; |
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| 61 | soclib::caba::DspinInput<dspin_ram_rsp_width>* p_dspin_iob_rsp_in; |
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[450] | 62 | |
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[648] | 63 | // These ports are used to connect hard IRQ from external peripherals to |
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| 64 | // IOB0 |
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| 65 | sc_in<bool>* p_irq[32]; |
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[550] | 66 | |
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[648] | 67 | // These arrays of ports are used to connect the INT & RAM networks in |
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| 68 | // top cell |
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| 69 | soclib::caba::DspinOutput<dspin_int_cmd_width>** p_dspin_int_cmd_out; |
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| 70 | soclib::caba::DspinInput<dspin_int_cmd_width>** p_dspin_int_cmd_in; |
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| 71 | soclib::caba::DspinOutput<dspin_int_rsp_width>** p_dspin_int_rsp_out; |
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| 72 | soclib::caba::DspinInput<dspin_int_rsp_width>** p_dspin_int_rsp_in; |
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[450] | 73 | |
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[648] | 74 | soclib::caba::DspinOutput<dspin_ram_cmd_width>* p_dspin_ram_cmd_out; |
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| 75 | soclib::caba::DspinInput<dspin_ram_cmd_width>* p_dspin_ram_cmd_in; |
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| 76 | soclib::caba::DspinOutput<dspin_ram_rsp_width>* p_dspin_ram_rsp_out; |
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| 77 | soclib::caba::DspinInput<dspin_ram_rsp_width>* p_dspin_ram_rsp_in; |
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[450] | 78 | |
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[648] | 79 | // interrupt signals |
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| 80 | sc_signal<bool> signal_false; |
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| 81 | sc_signal<bool> signal_proc_it[8]; |
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| 82 | sc_signal<bool> signal_irq_mdma[8]; |
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| 83 | sc_signal<bool> signal_irq_memc; |
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[450] | 84 | |
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[648] | 85 | // INT network DSPIN signals between DSPIN routers and DSPIN |
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| 86 | // local_crossbars |
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| 87 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_l2g_d; |
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| 88 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_g2l_d; |
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| 89 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_m2p_l2g_c; |
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| 90 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_m2p_g2l_c; |
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| 91 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_clack_l2g_c; |
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| 92 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_clack_g2l_c; |
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| 93 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_l2g_d; |
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| 94 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_g2l_d; |
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| 95 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_p2m_l2g_c; |
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| 96 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_p2m_g2l_c; |
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[450] | 97 | |
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[648] | 98 | // INT network VCI signals between VCI components and VCI/DSPIN wrappers |
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| 99 | VciSignals<vci_param_int> signal_int_vci_ini_proc[8]; |
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| 100 | VciSignals<vci_param_int> signal_int_vci_ini_mdma; |
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| 101 | VciSignals<vci_param_int> signal_int_vci_ini_iobx; |
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[450] | 102 | |
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[648] | 103 | VciSignals<vci_param_int> signal_int_vci_tgt_memc; |
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| 104 | VciSignals<vci_param_int> signal_int_vci_tgt_xicu; |
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[658] | 105 | VciSignals<vci_param_int> signal_int_vci_tgt_brom; |
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[648] | 106 | VciSignals<vci_param_int> signal_int_vci_tgt_mdma; |
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| 107 | VciSignals<vci_param_int> signal_int_vci_tgt_iobx; |
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[450] | 108 | |
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[648] | 109 | // INT network DSPIN signals between DSPIN local crossbars and VCI/DSPIN |
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| 110 | // wrappers |
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| 111 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_proc_i[8]; |
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| 112 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_proc_i[8]; |
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| 113 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_mdma_i; |
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| 114 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_mdma_i; |
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| 115 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_iobx_i; |
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| 116 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_iobx_i; |
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[450] | 117 | |
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[648] | 118 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_memc_t; |
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| 119 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_memc_t; |
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| 120 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_xicu_t; |
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| 121 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_xicu_t; |
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[658] | 122 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_brom_t; |
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| 123 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_brom_t; |
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[648] | 124 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_mdma_t; |
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| 125 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_mdma_t; |
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| 126 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_cmd_iobx_t; |
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| 127 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_rsp_iobx_t; |
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[450] | 128 | |
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[648] | 129 | // Coherence DSPIN signals between DSPIN local crossbars and CC |
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| 130 | // components |
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| 131 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_m2p_memc; |
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| 132 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_clack_memc; |
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| 133 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_p2m_memc; |
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| 134 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_m2p_proc[8]; |
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| 135 | DspinSignals<dspin_int_cmd_width> signal_int_dspin_clack_proc[8]; |
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| 136 | DspinSignals<dspin_int_rsp_width> signal_int_dspin_p2m_proc[8]; |
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[450] | 137 | |
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[648] | 138 | // RAM network VCI signals between VCI components and VCI/DSPIN wrappers |
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| 139 | VciSignals<vci_param_ext> signal_ram_vci_ini_memc; |
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| 140 | VciSignals<vci_param_ext> signal_ram_vci_ini_iobx; |
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| 141 | VciSignals<vci_param_ext> signal_ram_vci_tgt_xram; |
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[450] | 142 | |
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[648] | 143 | // RAM network DSPIN signals between VCI/DSPIN wrappers and routers |
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| 144 | DspinSignals<dspin_ram_cmd_width> signal_ram_dspin_cmd_xram_t; |
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| 145 | DspinSignals<dspin_ram_rsp_width> signal_ram_dspin_rsp_xram_t; |
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| 146 | DspinSignals<dspin_ram_cmd_width> signal_ram_dspin_cmd_memc_i; |
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| 147 | DspinSignals<dspin_ram_rsp_width> signal_ram_dspin_rsp_memc_i; |
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[450] | 148 | |
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[648] | 149 | ////////////////////////////////////// |
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| 150 | // Hardwate Components (pointers) |
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| 151 | ////////////////////////////////////// |
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| 152 | typedef VciCcVCacheWrapper<vci_param_int, dspin_int_cmd_width, |
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| 153 | dspin_int_rsp_width, GdbServer<Mips32ElIss> > |
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| 154 | VciCcVCacheWrapperType; |
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[450] | 155 | |
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[648] | 156 | typedef VciMemCache<vci_param_int, vci_param_ext, dspin_int_rsp_width, |
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| 157 | dspin_int_cmd_width> VciMemCacheType; |
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[450] | 158 | |
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[648] | 159 | typedef VciDspinInitiatorWrapper<vci_param_int, dspin_int_cmd_width, |
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| 160 | dspin_int_rsp_width> VciIntDspinInitiatorWrapperType; |
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[450] | 161 | |
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[648] | 162 | typedef VciDspinTargetWrapper<vci_param_int, dspin_int_cmd_width, |
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| 163 | dspin_int_rsp_width> VciIntDspinTargetWrapperType; |
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[450] | 164 | |
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[648] | 165 | typedef VciDspinInitiatorWrapper<vci_param_ext, dspin_ram_cmd_width, |
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| 166 | dspin_ram_rsp_width> VciExtDspinInitiatorWrapperType; |
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[450] | 167 | |
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[648] | 168 | typedef VciDspinTargetWrapper<vci_param_ext, dspin_ram_cmd_width, |
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| 169 | dspin_ram_rsp_width> VciExtDspinTargetWrapperType; |
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[450] | 170 | |
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[648] | 171 | VciCcVCacheWrapperType* proc[8]; |
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| 172 | VciIntDspinInitiatorWrapperType* proc_wi[8]; |
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[450] | 173 | |
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[648] | 174 | VciMemCacheType* memc; |
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| 175 | VciIntDspinTargetWrapperType* memc_int_wt; |
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| 176 | VciExtDspinInitiatorWrapperType* memc_ram_wi; |
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[450] | 177 | |
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[648] | 178 | VciXicu<vci_param_int>* xicu; |
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| 179 | VciIntDspinTargetWrapperType* xicu_int_wt; |
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[450] | 180 | |
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[648] | 181 | VciMultiDma<vci_param_int>* mdma; |
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| 182 | VciIntDspinInitiatorWrapperType* mdma_int_wi; |
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| 183 | VciIntDspinTargetWrapperType* mdma_int_wt; |
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[450] | 184 | |
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[658] | 185 | VciSimpleRom<vci_param_int>* brom; |
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| 186 | VciIntDspinTargetWrapperType* brom_int_wt; |
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| 187 | |
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[648] | 188 | DspinLocalCrossbar<dspin_int_cmd_width>* int_xbar_cmd_d; |
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| 189 | DspinLocalCrossbar<dspin_int_rsp_width>* int_xbar_rsp_d; |
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| 190 | DspinLocalCrossbar<dspin_int_cmd_width>* int_xbar_m2p_c; |
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| 191 | DspinLocalCrossbar<dspin_int_rsp_width>* int_xbar_p2m_c; |
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| 192 | DspinLocalCrossbar<dspin_int_cmd_width>* int_xbar_clack_c; |
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[450] | 193 | |
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[648] | 194 | VirtualDspinRouter<dspin_int_cmd_width>* int_router_cmd; |
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| 195 | VirtualDspinRouter<dspin_int_rsp_width>* int_router_rsp; |
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[450] | 196 | |
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[648] | 197 | VciSimpleRam<vci_param_ext>* xram; |
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| 198 | VciExtDspinTargetWrapperType* xram_ram_wt; |
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[450] | 199 | |
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[648] | 200 | DspinRouterTsar<dspin_ram_cmd_width>* ram_router_cmd; |
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| 201 | DspinRouterTsar<dspin_ram_rsp_width>* ram_router_rsp; |
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[450] | 202 | |
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[648] | 203 | // IO Network Components (not instanciated in all clusters) |
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[450] | 204 | |
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[648] | 205 | VciIoBridge<vci_param_int, vci_param_ext>* iob; |
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| 206 | VciIntDspinInitiatorWrapperType* iob_int_wi; |
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| 207 | VciIntDspinTargetWrapperType* iob_int_wt; |
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| 208 | VciExtDspinInitiatorWrapperType* iob_ram_wi; |
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[450] | 209 | |
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[648] | 210 | size_t m_procs; |
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[450] | 211 | |
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[648] | 212 | struct ClusterParams { |
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| 213 | sc_module_name insname; |
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[450] | 214 | |
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[648] | 215 | size_t nb_procs; |
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| 216 | size_t nb_dmas; |
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| 217 | size_t x_id; |
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| 218 | size_t y_id; |
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| 219 | size_t x_size; |
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| 220 | size_t y_size; |
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[450] | 221 | |
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[648] | 222 | const soclib::common::MappingTable &mt_int; |
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| 223 | const soclib::common::MappingTable &mt_ext; |
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| 224 | const soclib::common::MappingTable &mt_iox; |
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[450] | 225 | |
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[648] | 226 | size_t x_width; |
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| 227 | size_t y_width; |
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| 228 | size_t l_width; |
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[450] | 229 | |
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[648] | 230 | size_t int_memc_tgtid; |
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| 231 | size_t int_xicu_tgtid; |
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| 232 | size_t int_mdma_tgtid; |
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| 233 | size_t int_iobx_tgtid; |
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[658] | 234 | size_t int_brom_tgtid; |
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[648] | 235 | size_t int_proc_srcid; |
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| 236 | size_t int_mdma_srcid; |
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| 237 | size_t int_iobx_srcid; |
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| 238 | size_t ext_xram_tgtid; |
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| 239 | size_t ext_memc_srcid; |
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| 240 | size_t ext_iobx_srcid; |
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[450] | 241 | |
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[648] | 242 | size_t memc_ways; |
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| 243 | size_t memc_sets; |
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| 244 | size_t l1_i_ways; |
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| 245 | size_t l1_i_sets; |
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| 246 | size_t l1_d_ways; |
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| 247 | size_t l1_d_sets; |
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| 248 | size_t xram_latency; |
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[450] | 249 | |
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[648] | 250 | const Loader& loader; |
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[450] | 251 | |
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[648] | 252 | uint32_t frozen_cycles; |
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| 253 | uint32_t debug_start_cycle; |
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| 254 | bool memc_debug_ok; |
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| 255 | bool proc_debug_ok; |
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| 256 | bool iob_debug_ok; |
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| 257 | }; |
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[450] | 258 | |
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[648] | 259 | // cluster constructor |
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| 260 | TsarIobCluster(struct ClusterParams& params); |
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| 261 | ~TsarIobCluster(); |
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[450] | 262 | }; |
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| 263 | |
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| 264 | }} |
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| 265 | |
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| 266 | #endif |
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[648] | 267 | |
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| 268 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
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