[854] | 1 | /* -*- c++ -*- |
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| 2 | * |
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| 3 | * File : dspin_router.cpp |
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| 4 | * Copyright (c) UPMC, Lip6 |
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| 5 | * Authors : Alain Greiner, Abbas Sheibanyrad, Ivan Miro, Zhen Zhang |
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| 6 | * |
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| 7 | * SOCLIB_LGPL_HEADER_BEGIN |
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| 8 | * |
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| 9 | * This file is part of SoCLib, GNU LGPLv2.1. |
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| 10 | * |
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| 11 | * SoCLib is free software; you can redistribute it and/or modify it |
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| 12 | * under the terms of the GNU Lesser General Public License as published |
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| 13 | * by the Free Software Foundation; version 2.1 of the License. |
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| 14 | * |
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| 15 | * SoCLib is distributed in the hope that it will be useful, but |
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| 16 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 18 | * Lesser General Public License for more details. |
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| 19 | * |
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| 20 | * You should have received a copy of the GNU Lesser General Public |
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| 21 | * License along with SoCLib; if not, write to the Free Software |
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| 22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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| 23 | * 02110-1301 USA |
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| 24 | * |
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| 25 | * SOCLIB_LGPL_HEADER_END |
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| 26 | * |
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| 27 | */ |
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| 28 | |
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| 29 | /////////////////////////////////////////////////////////////////////////// |
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| 30 | // Implementation Note : |
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| 31 | // The xfirst_route(), broadcast_route() and is_broadcast() functions |
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| 32 | // defined below are used to decode the DSPIN first flit format: |
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| 33 | // - In case of a non-broadcast packet : |
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| 34 | // | X | Y |---------------------------------------|BC | |
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| 35 | // | x_width | y_width | flit_width - (x_width + y_width + 2) | 0 | |
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| 36 | // |
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| 37 | // - In case of a broacast |
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| 38 | // | XMIN | XMAX | YMIN | YMAX |-------------------|BC | |
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| 39 | // | 5 | 5 | 5 | 5 | flit_width - 22 | 1 | |
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| 40 | /////////////////////////////////////////////////////////////////////////// |
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| 41 | |
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| 42 | #include "../include/dspin_router.h" |
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| 43 | |
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| 44 | namespace soclib { namespace caba { |
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| 45 | |
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| 46 | using namespace soclib::common; |
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| 47 | using namespace soclib::caba; |
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| 48 | |
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| 49 | #define tmpl(x) template<int flit_width> x DspinRouter<flit_width> |
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| 50 | |
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| 51 | //////////////////////////////////////////////// |
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| 52 | // constructor |
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| 53 | //////////////////////////////////////////////// |
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| 54 | tmpl(/**/)::DspinRouter( sc_module_name name, |
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| 55 | const size_t x, |
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| 56 | const size_t y, |
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| 57 | const size_t x_width, |
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| 58 | const size_t y_width, |
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| 59 | const size_t in_fifo_depth, |
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| 60 | const size_t out_fifo_depth, |
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| 61 | const bool broadcast_supported ) |
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| 62 | : soclib::caba::BaseModule(name), |
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| 63 | |
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| 64 | p_clk( "p_clk" ), |
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| 65 | p_resetn( "p_resetn" ), |
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| 66 | p_in( alloc_elems<DspinInput<flit_width> >("p_in", 5) ), |
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| 67 | p_out( alloc_elems<DspinOutput<flit_width> >("p_out", 5) ), |
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| 68 | |
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| 69 | r_alloc_out( alloc_elems<sc_signal<bool> >("r_alloc_out", 5)), |
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| 70 | r_index_out( soclib::common::alloc_elems<sc_signal<size_t> >("r_index_out", 5)), |
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| 71 | r_fsm_in( alloc_elems<sc_signal<int> >("r_fsm_in", 5)), |
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| 72 | r_index_in( alloc_elems<sc_signal<size_t> >("r_index_in", 5)), |
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| 73 | |
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| 74 | m_local_x( x ), |
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| 75 | m_local_y( y ), |
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| 76 | m_x_width( x_width ), |
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| 77 | m_x_shift( flit_width - x_width ), |
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| 78 | m_x_mask( (0x1 << x_width) - 1 ), |
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| 79 | m_y_width( y_width ), |
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| 80 | m_y_shift( flit_width - x_width - y_width ), |
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| 81 | m_y_mask( (0x1 << y_width) - 1 ), |
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| 82 | m_broadcast_supported( broadcast_supported ), |
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| 83 | m_disable_mask( 0 ) |
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| 84 | { |
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| 85 | std::cout << " - Building DspinRouter : " << name << std::endl; |
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| 86 | |
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| 87 | SC_METHOD (transition); |
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| 88 | dont_initialize(); |
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| 89 | sensitive << p_clk.pos(); |
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| 90 | |
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| 91 | SC_METHOD (genMoore); |
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| 92 | dont_initialize(); |
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| 93 | sensitive << p_clk.neg(); |
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| 94 | |
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| 95 | r_fifo_in = (GenericFifo<internal_flit_t>*) |
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| 96 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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| 97 | |
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| 98 | r_fifo_out = (GenericFifo<internal_flit_t>*) |
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| 99 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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| 100 | |
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| 101 | r_buf_in = (internal_flit_t*) |
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| 102 | malloc(sizeof(internal_flit_t) * 5); |
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| 103 | |
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| 104 | for( size_t i = 0 ; i < 5 ; i++ ) |
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| 105 | { |
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| 106 | std::ostringstream stri; |
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| 107 | stri << "r_in_fifo_" << i; |
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| 108 | new(&r_fifo_in[i]) |
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| 109 | GenericFifo<internal_flit_t >(stri.str(), in_fifo_depth); |
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| 110 | |
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| 111 | std::ostringstream stro; |
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| 112 | stro << "r_out_fifo_" << i; |
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| 113 | new(&r_fifo_out[i]) |
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| 114 | GenericFifo<internal_flit_t >(stro.str(), out_fifo_depth); |
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| 115 | } |
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| 116 | } // end constructor |
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| 117 | |
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| 118 | /////////////////////////////////////////////////// |
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| 119 | tmpl(int)::xfirst_route( sc_uint<flit_width> data ) |
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| 120 | { |
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| 121 | size_t xdest = (size_t)(data >> m_x_shift) & m_x_mask; |
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| 122 | size_t ydest = (size_t)(data >> m_y_shift) & m_y_mask; |
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| 123 | return (xdest < m_local_x ? REQ_WEST : |
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| 124 | (xdest > m_local_x ? REQ_EAST : |
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| 125 | (ydest < m_local_y ? REQ_SOUTH : |
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| 126 | (ydest > m_local_y ? REQ_NORTH : REQ_LOCAL)))); |
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| 127 | } |
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| 128 | |
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| 129 | ////////////////////////////////////////////////////////////////////////// |
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| 130 | tmpl(int)::broadcast_route(int step, int source, sc_uint<flit_width> data) |
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| 131 | { |
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| 132 | int sel = REQ_NOP; |
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| 133 | size_t xmin = (data >> (flit_width - 5 )) & 0x1F; |
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| 134 | size_t xmax = (data >> (flit_width - 10)) & 0x1F; |
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| 135 | size_t ymin = (data >> (flit_width - 15)) & 0x1F; |
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| 136 | size_t ymax = (data >> (flit_width - 20)) & 0x1F; |
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| 137 | |
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| 138 | switch(source) { |
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| 139 | case REQ_LOCAL : |
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| 140 | if ( step == 1 ) sel = REQ_NORTH; |
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| 141 | else if ( step == 2 ) sel = REQ_SOUTH; |
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| 142 | else if ( step == 3 ) sel = REQ_EAST; |
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| 143 | else if ( step == 4 ) sel = REQ_WEST; |
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| 144 | break; |
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| 145 | case REQ_NORTH : |
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| 146 | if ( step == 1 ) sel = REQ_SOUTH; |
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| 147 | else if ( step == 2 ) sel = REQ_LOCAL; |
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| 148 | else if ( step == 3 ) sel = REQ_NOP; |
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| 149 | else if ( step == 4 ) sel = REQ_NOP; |
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| 150 | break; |
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| 151 | case REQ_SOUTH : |
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| 152 | if ( step == 1 ) sel = REQ_NORTH; |
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| 153 | else if ( step == 2 ) sel = REQ_LOCAL; |
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| 154 | else if ( step == 3 ) sel = REQ_NOP; |
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| 155 | else if ( step == 4 ) sel = REQ_NOP; |
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| 156 | break; |
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| 157 | case REQ_EAST : |
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| 158 | if ( step == 1 ) sel = REQ_WEST; |
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| 159 | else if ( step == 2 ) sel = REQ_NORTH; |
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| 160 | else if ( step == 3 ) sel = REQ_SOUTH; |
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| 161 | else if ( step == 4 ) sel = REQ_LOCAL; |
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| 162 | break; |
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| 163 | case REQ_WEST : |
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| 164 | if ( step == 1 ) sel = REQ_EAST; |
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| 165 | else if ( step == 2 ) sel = REQ_NORTH; |
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| 166 | else if ( step == 3 ) sel = REQ_SOUTH; |
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| 167 | else if ( step == 4 ) sel = REQ_LOCAL; |
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| 168 | break; |
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| 169 | } |
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| 170 | if ( (sel == REQ_NORTH) && !(m_local_y < ymax) ) sel = REQ_NOP; |
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| 171 | else if ( (sel == REQ_SOUTH) && !(m_local_y > ymin) ) sel = REQ_NOP; |
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| 172 | else if ( (sel == REQ_EAST ) && !(m_local_x < xmax) ) sel = REQ_NOP; |
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| 173 | else if ( (sel == REQ_WEST ) && !(m_local_x > xmin) ) sel = REQ_NOP; |
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| 174 | |
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| 175 | return sel; |
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| 176 | } |
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| 177 | |
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| 178 | ///////////////////////////////////////////////////////// |
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| 179 | tmpl(inline bool)::is_broadcast(sc_uint<flit_width> data) |
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| 180 | { |
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| 181 | return ( (data & 0x1) != 0); |
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| 182 | } |
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| 183 | |
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| 184 | ///////////////////////////////////////////////////////// |
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| 185 | tmpl(void)::set_disable_mask( int mask ) |
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| 186 | { |
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| 187 | m_disable_mask = mask; |
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| 188 | } |
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| 189 | |
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| 190 | ///////////////////////// |
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| 191 | tmpl(void)::print_trace() |
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| 192 | { |
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| 193 | const char* port_name[] = |
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| 194 | { |
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| 195 | "N", |
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| 196 | "S", |
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| 197 | "E", |
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| 198 | "W", |
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| 199 | "L" |
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| 200 | }; |
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| 201 | |
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| 202 | const char* infsm_str[] = |
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| 203 | { |
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| 204 | "IDLE", |
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| 205 | "REQ", |
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| 206 | "ALLOC", |
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| 207 | "REQ_FIRST", |
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| 208 | "ALLOC_FIRST", |
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| 209 | "REQ_SECOND", |
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| 210 | "ALLOC_SECOND", |
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| 211 | "REQ_THIRD", |
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| 212 | "ALLOC_THIRD", |
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| 213 | "REQ_FOURTH", |
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| 214 | "ALLOC_FOURTH" |
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| 215 | }; |
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| 216 | |
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| 217 | std::cout << "DSPIN_ROUTER " << name(); |
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| 218 | |
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| 219 | for( size_t i = 0 ; i < 5 ; i++) // loop on input ports |
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| 220 | { |
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| 221 | std::cout << " / infsm[" << port_name[i] << "] " |
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| 222 | << infsm_str[r_fsm_in[i].read()]; |
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| 223 | } |
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| 224 | |
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| 225 | for ( size_t out=0 ; out<5 ; out++) // loop on output ports |
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| 226 | { |
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| 227 | if ( r_alloc_out[out].read() ) |
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| 228 | { |
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| 229 | int in = r_index_out[out]; |
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| 230 | std::cout << " / " << port_name[in] << " -> " << port_name[out] ; |
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| 231 | } |
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| 232 | } |
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| 233 | std::cout << std::endl; |
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| 234 | } |
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| 235 | |
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| 236 | //////////////////////// |
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| 237 | tmpl(void)::transition() |
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| 238 | { |
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| 239 | // Long wires connecting input and output ports |
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| 240 | size_t req_in[5]; // input ports -> output ports |
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| 241 | size_t get_out[5]; // output ports -> input ports |
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| 242 | bool put_in[5]; // input ports -> output ports |
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| 243 | internal_flit_t data_in[5]; // input ports -> output ports |
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| 244 | |
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| 245 | // control signals for the input fifos |
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| 246 | bool fifo_in_write[5]; |
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| 247 | bool fifo_in_read[5]; |
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| 248 | internal_flit_t fifo_in_wdata[5]; |
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| 249 | |
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| 250 | // control signals for the output fifos |
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| 251 | bool fifo_out_write[5]; |
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| 252 | bool fifo_out_read[5]; |
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| 253 | internal_flit_t fifo_out_wdata[5]; |
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| 254 | |
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| 255 | // Reset |
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| 256 | if ( p_resetn == false ) |
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| 257 | { |
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| 258 | for(size_t i = 0 ; i < 5 ; i++) |
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| 259 | { |
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| 260 | r_alloc_out[i] = false; |
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| 261 | r_index_out[i] = 0; |
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| 262 | r_index_in[i] = 0; |
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| 263 | r_fsm_in[i] = INFSM_IDLE; |
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| 264 | r_fifo_in[i].init(); |
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| 265 | r_fifo_out[i].init(); |
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| 266 | } |
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| 267 | return; |
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| 268 | } |
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| 269 | |
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| 270 | // fifos signals default values |
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| 271 | for(size_t i = 0 ; i < 5 ; i++) |
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| 272 | { |
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| 273 | fifo_in_read[i] = false; |
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| 274 | |
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| 275 | // do not write into the FIFO of disabled interfaces |
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| 276 | fifo_in_write[i] = p_in[i].write.read() && |
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| 277 | ((m_disable_mask & (1 << i)) == 0); |
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| 278 | |
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| 279 | fifo_in_wdata[i].data = p_in[i].data.read(); |
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| 280 | fifo_in_wdata[i].eop = p_in[i].eop.read(); |
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| 281 | |
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| 282 | fifo_out_read[i] = p_out[i].read.read(); |
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| 283 | fifo_out_write[i] = false; |
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| 284 | } |
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| 285 | |
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| 286 | // loop on the output ports: |
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| 287 | // compute get_out[j] depending on the output port state |
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| 288 | // and combining fifo_out[j].wok and r_alloc_out[j] |
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| 289 | for ( size_t j = 0 ; j < 5 ; j++ ) |
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| 290 | { |
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| 291 | if( r_alloc_out[j].read() and (r_fifo_out[j].wok()) ) |
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| 292 | { |
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| 293 | get_out[j] = r_index_out[j].read(); |
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| 294 | } |
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| 295 | else |
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| 296 | { |
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| 297 | get_out[j] = 0xFFFFFFFF; |
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| 298 | } |
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| 299 | } |
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| 300 | |
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| 301 | // loop on the input ports : |
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| 302 | // The port state is defined by r_fsm_in[i], r_index_in[i] & r_buf_in[i] |
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| 303 | // The req_in[i] computation implements the X-FIRST algorithm. |
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| 304 | // data_in[i], put_in[i] and req_in[i] depend on the input port state. |
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| 305 | // The fifo_in_read[i] is computed further... |
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| 306 | |
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| 307 | for ( size_t i = 0 ; i < 5 ; i++ ) |
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| 308 | { |
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| 309 | switch ( r_fsm_in[i].read() ) |
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| 310 | { |
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| 311 | case INFSM_IDLE: // no output port allocated |
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| 312 | { |
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| 313 | put_in[i] = false; |
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| 314 | |
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| 315 | if ( r_fifo_in[i].rok() ) // packet available in input fifo |
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| 316 | { |
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| 317 | if ( is_broadcast( r_fifo_in[i].read().data ) and |
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| 318 | m_broadcast_supported ) // broadcast |
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| 319 | { |
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| 320 | fifo_in_read[i] = true; |
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| 321 | req_in[i] = broadcast_route(1, i, r_fifo_in[i].read().data); |
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| 322 | r_buf_in[i] = r_fifo_in[i].read(); |
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| 323 | r_index_in[i] = req_in[i]; |
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| 324 | if( req_in[i] == REQ_NOP ) r_fsm_in[i] = INFSM_REQ_SECOND; |
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| 325 | else r_fsm_in[i] = INFSM_REQ_FIRST; |
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| 326 | } |
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| 327 | else // unicast |
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| 328 | { |
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| 329 | req_in[i] = xfirst_route(r_fifo_in[i].read().data); |
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| 330 | r_index_in[i] = req_in[i]; |
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| 331 | r_fsm_in[i] = INFSM_REQ; |
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| 332 | } |
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| 333 | } |
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| 334 | else |
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| 335 | { |
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| 336 | req_in[i] = REQ_NOP; |
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| 337 | } |
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| 338 | break; |
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| 339 | } |
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| 340 | case INFSM_REQ: // not a broadcast / waiting output port allocation |
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| 341 | { |
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| 342 | data_in[i] = r_fifo_in[i].read(); |
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| 343 | put_in[i] = r_fifo_in[i].rok(); |
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| 344 | req_in[i] = r_index_in[i]; |
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| 345 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
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| 346 | if ( get_out[r_index_in[i].read()] == i ) // first flit transfered |
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| 347 | { |
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| 348 | if ( r_fifo_in[i].read().eop ) r_fsm_in[i] = INFSM_IDLE; |
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| 349 | else r_fsm_in[i] = INFSM_ALLOC; |
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| 350 | } |
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| 351 | break; |
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| 352 | } |
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| 353 | case INFSM_ALLOC: // not a broadcast / output port allocated |
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| 354 | { |
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| 355 | data_in[i] = r_fifo_in[i].read(); |
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| 356 | put_in[i] = r_fifo_in[i].rok(); |
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| 357 | req_in[i] = REQ_NOP; // no request |
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| 358 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
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| 359 | if ( r_fifo_in[i].read().eop and |
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| 360 | r_fifo_in[i].rok() and |
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| 361 | (get_out[r_index_in[i].read()] == i) ) // last flit transfered |
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| 362 | { |
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| 363 | r_fsm_in[i] = INFSM_IDLE; |
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| 364 | } |
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| 365 | break; |
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| 366 | } |
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| 367 | case INFSM_REQ_FIRST: // broacast / waiting first output port allocation |
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| 368 | { |
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| 369 | data_in[i] = r_buf_in[i]; |
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| 370 | put_in[i] = true; |
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| 371 | req_in[i] = broadcast_route(1, i, r_buf_in[i].data); |
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| 372 | r_index_in[i] = req_in[i]; |
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| 373 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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| 374 | { |
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| 375 | r_fsm_in[i] = INFSM_REQ_SECOND; |
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| 376 | } |
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| 377 | else |
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| 378 | { |
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| 379 | if( get_out[req_in[i]] == i ) // header flit transfered |
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| 380 | { |
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| 381 | r_fsm_in[i] = INFSM_ALLOC_FIRST; |
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| 382 | } |
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| 383 | } |
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| 384 | break; |
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| 385 | } |
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| 386 | case INFSM_ALLOC_FIRST: // broadcast / first output port allocated |
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| 387 | { |
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| 388 | data_in[i] = r_fifo_in[i].read(); |
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| 389 | put_in[i] = r_fifo_in[i].rok(); |
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| 390 | req_in[i] = REQ_NOP; |
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| 391 | if( (get_out[r_index_in[i].read()] == i) |
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| 392 | and r_fifo_in[i].rok() ) // data flit transfered |
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| 393 | { |
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| 394 | if ( not r_fifo_in[i].read().eop ) |
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| 395 | { |
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| 396 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
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| 397 | << " : broadcast packet must be 2 flits" << std::endl; |
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| 398 | } |
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| 399 | r_fsm_in[i] = INFSM_REQ_SECOND; |
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| 400 | } |
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| 401 | break; |
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| 402 | } |
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| 403 | case INFSM_REQ_SECOND: // broacast / waiting second output port allocation |
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| 404 | { |
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| 405 | data_in[i] = r_buf_in[i]; |
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| 406 | put_in[i] = true; |
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| 407 | req_in[i] = broadcast_route(2, i, r_buf_in[i].data); |
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| 408 | r_index_in[i] = req_in[i]; |
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| 409 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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| 410 | { |
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| 411 | r_fsm_in[i] = INFSM_REQ_THIRD; |
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| 412 | } |
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| 413 | else |
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| 414 | { |
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| 415 | if( get_out[req_in[i]] == i ) // header flit transfered |
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| 416 | { |
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| 417 | r_fsm_in[i] = INFSM_ALLOC_SECOND; |
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| 418 | } |
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| 419 | } |
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| 420 | break; |
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| 421 | } |
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| 422 | case INFSM_ALLOC_SECOND: // broadcast / second output port allocated |
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| 423 | { |
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| 424 | data_in[i] = r_fifo_in[i].read(); |
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| 425 | put_in[i] = r_fifo_in[i].rok(); |
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| 426 | req_in[i] = REQ_NOP; |
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| 427 | if( (get_out[r_index_in[i].read()] == i ) |
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| 428 | and r_fifo_in[i].rok() ) // data flit transfered |
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| 429 | { |
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| 430 | if ( not r_fifo_in[i].read().eop ) |
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| 431 | { |
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| 432 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
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| 433 | << " : broadcast packet must be 2 flits" << std::endl; |
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| 434 | } |
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| 435 | r_fsm_in[i] = INFSM_REQ_THIRD; |
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| 436 | } |
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| 437 | break; |
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| 438 | } |
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| 439 | case INFSM_REQ_THIRD: // broacast / waiting third output port allocation |
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| 440 | { |
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| 441 | data_in[i] = r_buf_in[i]; |
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| 442 | put_in[i] = true; |
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| 443 | req_in[i] = broadcast_route(3, i, r_buf_in[i].data); |
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| 444 | r_index_in[i] = req_in[i]; |
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| 445 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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| 446 | { |
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| 447 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
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| 448 | } |
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| 449 | else |
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| 450 | { |
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| 451 | if( get_out[req_in[i]] == i ) // header flit transfered |
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| 452 | { |
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| 453 | r_fsm_in[i] = INFSM_ALLOC_THIRD; |
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| 454 | } |
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| 455 | } |
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| 456 | break; |
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| 457 | } |
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| 458 | case INFSM_ALLOC_THIRD: // broadcast / third output port allocated |
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| 459 | { |
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| 460 | data_in[i] = r_fifo_in[i].read(); |
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| 461 | put_in[i] = r_fifo_in[i].rok(); |
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| 462 | req_in[i] = REQ_NOP; |
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| 463 | if( (get_out[r_index_in[i].read()] == i ) |
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| 464 | and r_fifo_in[i].rok() ) // data flit transfered |
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| 465 | { |
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| 466 | if ( not r_fifo_in[i].read().eop ) |
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| 467 | { |
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| 468 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
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| 469 | << " : broadcast packet must be 2 flits" << std::endl; |
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| 470 | } |
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| 471 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
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| 472 | } |
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| 473 | break; |
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| 474 | } |
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| 475 | case INFSM_REQ_FOURTH: // broacast / waiting fourth output port allocation |
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| 476 | { |
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| 477 | data_in[i] = r_buf_in[i]; |
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| 478 | put_in[i] = true; |
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| 479 | req_in[i] = broadcast_route(4, i, r_buf_in[i].data); |
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| 480 | r_index_in[i] = req_in[i]; |
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| 481 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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| 482 | { |
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| 483 | fifo_in_read[i] = true; |
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| 484 | r_fsm_in[i] = INFSM_IDLE; |
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| 485 | } |
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| 486 | else |
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| 487 | { |
---|
| 488 | if( get_out[req_in[i]] == i ) // header flit transfered |
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| 489 | { |
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| 490 | r_fsm_in[i] = INFSM_ALLOC_FOURTH; |
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| 491 | } |
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| 492 | } |
---|
| 493 | break; |
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| 494 | } |
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| 495 | case INFSM_ALLOC_FOURTH: // broadcast / fourth output port allocated |
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| 496 | { |
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| 497 | data_in[i] = r_fifo_in[i].read(); |
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| 498 | put_in[i] = r_fifo_in[i].rok(); |
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| 499 | req_in[i] = REQ_NOP; |
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| 500 | if( (get_out[r_index_in[i].read()] == i ) |
---|
| 501 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
| 502 | { |
---|
| 503 | if ( not r_fifo_in[i].read().eop ) |
---|
| 504 | { |
---|
| 505 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
| 506 | << " : broadcast packet must be 2 flits" << std::endl; |
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| 507 | } |
---|
| 508 | fifo_in_read[i] = true; |
---|
| 509 | r_fsm_in[i] = INFSM_IDLE; |
---|
| 510 | } |
---|
| 511 | break; |
---|
| 512 | } |
---|
| 513 | } // end switch |
---|
| 514 | } // end for input ports |
---|
| 515 | |
---|
| 516 | // loop on the output ports : |
---|
| 517 | // The r_alloc_out[j] and r_index_out[j] computation |
---|
| 518 | // implements the round-robin allocation policy. |
---|
| 519 | // These two registers implement a 10 states FSM. |
---|
| 520 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
| 521 | { |
---|
| 522 | if( not r_alloc_out[j].read() ) // not allocated: possible new allocation |
---|
| 523 | { |
---|
| 524 | for( size_t k = r_index_out[j].read() + 1 ; |
---|
| 525 | k < (r_index_out[j] + 6) ; k++) |
---|
| 526 | { |
---|
| 527 | size_t i = k % 5; |
---|
| 528 | |
---|
| 529 | if( req_in[i] == j ) |
---|
| 530 | { |
---|
| 531 | r_alloc_out[j] = true; |
---|
| 532 | r_index_out[j] = i; |
---|
| 533 | break; |
---|
| 534 | } |
---|
| 535 | } // end loop on input ports |
---|
| 536 | } |
---|
| 537 | else // allocated: possible desallocation |
---|
| 538 | { |
---|
| 539 | if ( data_in[r_index_out[j]].eop and |
---|
| 540 | r_fifo_out[j].wok() and |
---|
| 541 | put_in[r_index_out[j]] ) |
---|
| 542 | { |
---|
| 543 | r_alloc_out[j] = false; |
---|
| 544 | } |
---|
| 545 | } |
---|
| 546 | } // end loop on output ports |
---|
| 547 | |
---|
| 548 | // loop on the output ports : |
---|
| 549 | // The fifo_out_write[j] and fifo_out_wdata[j] computation |
---|
| 550 | // implements the output port mux. |
---|
| 551 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
| 552 | { |
---|
| 553 | if( r_alloc_out[j] ) // output port allocated |
---|
| 554 | { |
---|
| 555 | fifo_out_write[j] = put_in[r_index_out[j]] && |
---|
| 556 | ((m_disable_mask & (1 << j)) == 0); |
---|
| 557 | fifo_out_wdata[j] = data_in[r_index_out[j]]; |
---|
| 558 | } |
---|
| 559 | } // end loop on the output ports |
---|
| 560 | |
---|
| 561 | // FIFOS update |
---|
| 562 | for(size_t i = 0 ; i < 5 ; i++) |
---|
| 563 | { |
---|
| 564 | r_fifo_in[i].update(fifo_in_read[i], |
---|
| 565 | fifo_in_write[i], |
---|
| 566 | fifo_in_wdata[i]); |
---|
| 567 | r_fifo_out[i].update(fifo_out_read[i], |
---|
| 568 | fifo_out_write[i], |
---|
| 569 | fifo_out_wdata[i]); |
---|
| 570 | } |
---|
| 571 | } // end transition |
---|
| 572 | |
---|
| 573 | //////////////////////////////// |
---|
| 574 | // genMoore |
---|
| 575 | //////////////////////////////// |
---|
| 576 | tmpl(void)::genMoore() |
---|
| 577 | { |
---|
| 578 | for(size_t i = 0 ; i < 5 ; i++) |
---|
| 579 | { |
---|
| 580 | // input ports : READ signals |
---|
| 581 | p_in[i].read = r_fifo_in[i].wok(); |
---|
| 582 | |
---|
| 583 | // output ports : DATA & WRITE signals |
---|
| 584 | p_out[i].data = r_fifo_out[i].read().data; |
---|
| 585 | p_out[i].eop = r_fifo_out[i].read().eop; |
---|
| 586 | p_out[i].write = r_fifo_out[i].rok(); |
---|
| 587 | } |
---|
| 588 | } // end genMoore |
---|
| 589 | |
---|
| 590 | }} // end namespace |
---|
| 591 | |
---|
| 592 | // Local Variables: |
---|
| 593 | // tab-width: 4 |
---|
| 594 | // c-basic-offset: 4 |
---|
| 595 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 596 | // indent-tabs-mode: nil |
---|
| 597 | // End: |
---|
| 598 | |
---|
| 599 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|