[854] | 1 | /* -*- c++ -*- |
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| 2 | * |
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| 3 | * File : dspin_router.cpp |
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| 4 | * Copyright (c) UPMC, Lip6 |
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| 5 | * Authors : Alain Greiner, Abbas Sheibanyrad, Ivan Miro, Zhen Zhang |
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| 6 | * |
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| 7 | * SOCLIB_LGPL_HEADER_BEGIN |
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| 8 | * |
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| 9 | * This file is part of SoCLib, GNU LGPLv2.1. |
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| 10 | * |
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| 11 | * SoCLib is free software; you can redistribute it and/or modify it |
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| 12 | * under the terms of the GNU Lesser General Public License as published |
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| 13 | * by the Free Software Foundation; version 2.1 of the License. |
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| 14 | * |
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| 15 | * SoCLib is distributed in the hope that it will be useful, but |
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| 16 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 18 | * Lesser General Public License for more details. |
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| 19 | * |
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| 20 | * You should have received a copy of the GNU Lesser General Public |
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| 21 | * License along with SoCLib; if not, write to the Free Software |
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| 22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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| 23 | * 02110-1301 USA |
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| 24 | * |
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| 25 | * SOCLIB_LGPL_HEADER_END |
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| 26 | * |
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| 27 | */ |
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| 28 | |
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| 29 | /////////////////////////////////////////////////////////////////////////// |
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| 30 | // Implementation Note : |
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| 31 | // The xfirst_route(), broadcast_route() and is_broadcast() functions |
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| 32 | // defined below are used to decode the DSPIN first flit format: |
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| 33 | // - In case of a non-broadcast packet : |
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| 34 | // | X | Y |---------------------------------------|BC | |
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| 35 | // | x_width | y_width | flit_width - (x_width + y_width + 2) | 0 | |
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| 36 | // |
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| 37 | // - In case of a broacast |
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| 38 | // | XMIN | XMAX | YMIN | YMAX |-------------------|BC | |
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| 39 | // | 5 | 5 | 5 | 5 | flit_width - 22 | 1 | |
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| 40 | /////////////////////////////////////////////////////////////////////////// |
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| 41 | |
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| 42 | #include "../include/dspin_router.h" |
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[886] | 43 | #include "dspin_router_config.h" |
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[854] | 44 | |
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| 45 | namespace soclib { namespace caba { |
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| 46 | |
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| 47 | using namespace soclib::common; |
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| 48 | using namespace soclib::caba; |
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| 49 | |
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| 50 | #define tmpl(x) template<int flit_width> x DspinRouter<flit_width> |
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| 51 | |
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| 52 | //////////////////////////////////////////////// |
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| 53 | // constructor |
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| 54 | //////////////////////////////////////////////// |
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| 55 | tmpl(/**/)::DspinRouter( sc_module_name name, |
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| 56 | const size_t x, |
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| 57 | const size_t y, |
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| 58 | const size_t x_width, |
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| 59 | const size_t y_width, |
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| 60 | const size_t in_fifo_depth, |
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| 61 | const size_t out_fifo_depth, |
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[877] | 62 | const bool broadcast_supported, |
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| 63 | const bool reconfigurable ) |
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[854] | 64 | : soclib::caba::BaseModule(name), |
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| 65 | |
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| 66 | p_clk( "p_clk" ), |
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| 67 | p_resetn( "p_resetn" ), |
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| 68 | p_in( alloc_elems<DspinInput<flit_width> >("p_in", 5) ), |
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| 69 | p_out( alloc_elems<DspinOutput<flit_width> >("p_out", 5) ), |
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| 70 | |
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| 71 | r_alloc_out( alloc_elems<sc_signal<bool> >("r_alloc_out", 5)), |
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| 72 | r_index_out( soclib::common::alloc_elems<sc_signal<size_t> >("r_index_out", 5)), |
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| 73 | r_fsm_in( alloc_elems<sc_signal<int> >("r_fsm_in", 5)), |
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| 74 | r_index_in( alloc_elems<sc_signal<size_t> >("r_index_in", 5)), |
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| 75 | |
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| 76 | m_local_x( x ), |
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| 77 | m_local_y( y ), |
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| 78 | m_x_width( x_width ), |
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| 79 | m_x_shift( flit_width - x_width ), |
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| 80 | m_x_mask( (0x1 << x_width) - 1 ), |
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| 81 | m_y_width( y_width ), |
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| 82 | m_y_shift( flit_width - x_width - y_width ), |
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| 83 | m_y_mask( (0x1 << y_width) - 1 ), |
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| 84 | m_broadcast_supported( broadcast_supported ), |
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| 85 | m_disable_mask( 0 ) |
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| 86 | { |
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| 87 | std::cout << " - Building DspinRouter : " << name << std::endl; |
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| 88 | |
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| 89 | SC_METHOD (transition); |
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| 90 | dont_initialize(); |
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| 91 | sensitive << p_clk.pos(); |
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| 92 | |
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| 93 | SC_METHOD (genMoore); |
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| 94 | dont_initialize(); |
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| 95 | sensitive << p_clk.neg(); |
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| 96 | |
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| 97 | r_fifo_in = (GenericFifo<internal_flit_t>*) |
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| 98 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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| 99 | |
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| 100 | r_fifo_out = (GenericFifo<internal_flit_t>*) |
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| 101 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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| 102 | |
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| 103 | r_buf_in = (internal_flit_t*) |
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| 104 | malloc(sizeof(internal_flit_t) * 5); |
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| 105 | |
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| 106 | for( size_t i = 0 ; i < 5 ; i++ ) |
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| 107 | { |
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| 108 | std::ostringstream stri; |
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| 109 | stri << "r_in_fifo_" << i; |
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| 110 | new(&r_fifo_in[i]) |
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| 111 | GenericFifo<internal_flit_t >(stri.str(), in_fifo_depth); |
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| 112 | |
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| 113 | std::ostringstream stro; |
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| 114 | stro << "r_out_fifo_" << i; |
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| 115 | new(&r_fifo_out[i]) |
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| 116 | GenericFifo<internal_flit_t >(stro.str(), out_fifo_depth); |
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| 117 | } |
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[877] | 118 | |
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[883] | 119 | if ( reconfigurable ) p_blackhole_pos = new sc_core::sc_in<uint32_t>; |
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[877] | 120 | else p_blackhole_pos = NULL; |
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[854] | 121 | } // end constructor |
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| 122 | |
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| 123 | /////////////////////////////////////////////////// |
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[877] | 124 | tmpl(/**/)::~DspinRouter() |
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| 125 | { |
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| 126 | if ( p_blackhole_pos != NULL ) delete p_blackhole_pos; |
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| 127 | } |
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| 128 | |
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| 129 | /////////////////////////////////////////////////// |
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[873] | 130 | tmpl(int)::xfirst_route( size_t xdest, size_t ydest ) |
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[854] | 131 | { |
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| 132 | return (xdest < m_local_x ? REQ_WEST : |
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| 133 | (xdest > m_local_x ? REQ_EAST : |
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| 134 | (ydest < m_local_y ? REQ_SOUTH : |
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| 135 | (ydest > m_local_y ? REQ_NORTH : REQ_LOCAL)))); |
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| 136 | } |
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| 137 | |
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[873] | 138 | /////////////////////////////////////////////////// |
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| 139 | tmpl(int)::recovery_route( size_t xdest, size_t ydest ) |
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| 140 | { |
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[877] | 141 | int bhpos = p_blackhole_pos->read(); |
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[873] | 142 | if ( xdest > m_local_x ) { |
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| 143 | if ( (bhpos == BH_NE) || (bhpos == BH_E) || (bhpos == BH_SE) || |
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| 144 | (bhpos == BH_S) ) { |
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| 145 | return REQ_EAST; |
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| 146 | } |
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| 147 | else if ( bhpos == BH_N ) { |
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| 148 | if ( (m_local_y == 1) || (m_local_x == 0) || (ydest >= m_local_y) || |
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| 149 | (xdest > (m_local_x + 1)) ) { |
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| 150 | return REQ_EAST; |
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| 151 | } |
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| 152 | else { |
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| 153 | return REQ_WEST; |
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| 154 | } |
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| 155 | } |
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| 156 | else if ( bhpos == BH_NW ) { |
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| 157 | if ( (m_local_y == 1) || (ydest >= m_local_y) || |
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| 158 | (xdest > (m_local_x + 2)) ) { |
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| 159 | return REQ_EAST; |
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| 160 | } |
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| 161 | else { |
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| 162 | return REQ_SOUTH; |
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| 163 | } |
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| 164 | } |
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| 165 | else if ( bhpos == BH_W ) { |
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| 166 | if ( (m_local_y == 0) || (ydest > m_local_y)) { |
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| 167 | return REQ_NORTH; |
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| 168 | } |
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| 169 | else { |
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| 170 | return REQ_SOUTH; |
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| 171 | } |
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| 172 | } |
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| 173 | else if ( bhpos == BH_SW ) { |
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| 174 | if ( (ydest <= m_local_y) || (xdest > (m_local_x + 1)) ) { |
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| 175 | return REQ_EAST; |
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| 176 | } |
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| 177 | else { |
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| 178 | return REQ_NORTH; |
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| 179 | } |
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| 180 | } |
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| 181 | std::cout << "error: unexpected condition in function " |
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| 182 | << __FILE__ << ":" << __func__ << " +" << __LINE__ |
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| 183 | << std::endl; |
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| 184 | exit(1); |
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| 185 | } // end if (xdest > m_local_x) |
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| 186 | else if ( xdest < m_local_x ) { |
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| 187 | if ( (bhpos == BH_N) || (bhpos == BH_NW) || (bhpos == BH_W) || |
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| 188 | (bhpos == BH_SW) || (bhpos == BH_S) ) { |
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| 189 | return REQ_WEST; |
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| 190 | } |
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| 191 | else if ( bhpos == BH_NE ) { |
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| 192 | if ( (xdest < (m_local_x - 1)) || (ydest >= m_local_y) ) { |
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| 193 | return REQ_WEST; |
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| 194 | } |
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| 195 | else { |
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| 196 | return REQ_SOUTH; |
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| 197 | } |
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| 198 | } |
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| 199 | else if ( bhpos == BH_SE ) { |
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| 200 | if ( (m_local_x == 1) && (ydest > (m_local_y + 1)) ) { |
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| 201 | return REQ_NORTH; |
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| 202 | } |
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| 203 | else { |
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| 204 | return REQ_WEST; |
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| 205 | } |
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| 206 | } |
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| 207 | else if ( bhpos == BH_E ) { |
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| 208 | if ( (m_local_y == 0) || |
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| 209 | ((m_local_x == 1) && (ydest > m_local_y)) ) { |
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| 210 | return REQ_NORTH; |
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| 211 | } |
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| 212 | else { |
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| 213 | return REQ_SOUTH; |
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| 214 | } |
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| 215 | } |
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| 216 | std::cout << "error: unexpected condition in function " |
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| 217 | << __FILE__ << ":" << __func__ << " +" << __LINE__ |
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| 218 | << std::endl; |
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| 219 | exit(1); |
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| 220 | } // end if (xdest < m_local_x) |
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| 221 | else if ( ydest > m_local_y ) { |
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| 222 | if ( bhpos != BH_S ) { |
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| 223 | return REQ_NORTH; |
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| 224 | } |
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| 225 | else if ( m_local_x != 0 ) { |
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| 226 | return REQ_WEST; |
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| 227 | } |
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| 228 | else { |
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| 229 | return REQ_EAST; |
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| 230 | } |
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| 231 | } // end if (ydest > m_local_y) |
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| 232 | else if ( ydest < m_local_y ) { |
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| 233 | if ( bhpos != BH_N ) { |
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| 234 | return REQ_SOUTH; |
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| 235 | } |
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| 236 | else if ( m_local_x != 0) { |
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| 237 | return REQ_WEST; |
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| 238 | } |
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| 239 | else { |
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| 240 | return REQ_EAST; |
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| 241 | } |
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| 242 | } // end if (ydest < m_local_y) |
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| 243 | return REQ_LOCAL; |
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| 244 | } |
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| 245 | |
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| 246 | /////////////////////////////////////////////////// |
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| 247 | tmpl(int)::route( sc_uint<flit_width> data ) |
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| 248 | { |
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| 249 | size_t xdest = (size_t)(data >> m_x_shift) & m_x_mask; |
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| 250 | size_t ydest = (size_t)(data >> m_y_shift) & m_y_mask; |
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[877] | 251 | if ( p_blackhole_pos != NULL ) |
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| 252 | { |
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[886] | 253 | if ( p_blackhole_pos->read() != BH_NONE ) |
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[877] | 254 | { |
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| 255 | return recovery_route(xdest, ydest); |
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| 256 | } |
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[873] | 257 | } |
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[877] | 258 | return xfirst_route(xdest, ydest); |
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[873] | 259 | } |
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| 260 | |
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[854] | 261 | ////////////////////////////////////////////////////////////////////////// |
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| 262 | tmpl(int)::broadcast_route(int step, int source, sc_uint<flit_width> data) |
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| 263 | { |
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| 264 | int sel = REQ_NOP; |
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| 265 | size_t xmin = (data >> (flit_width - 5 )) & 0x1F; |
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| 266 | size_t xmax = (data >> (flit_width - 10)) & 0x1F; |
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| 267 | size_t ymin = (data >> (flit_width - 15)) & 0x1F; |
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| 268 | size_t ymax = (data >> (flit_width - 20)) & 0x1F; |
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| 269 | |
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| 270 | switch(source) { |
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| 271 | case REQ_LOCAL : |
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| 272 | if ( step == 1 ) sel = REQ_NORTH; |
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| 273 | else if ( step == 2 ) sel = REQ_SOUTH; |
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| 274 | else if ( step == 3 ) sel = REQ_EAST; |
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| 275 | else if ( step == 4 ) sel = REQ_WEST; |
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| 276 | break; |
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| 277 | case REQ_NORTH : |
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| 278 | if ( step == 1 ) sel = REQ_SOUTH; |
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| 279 | else if ( step == 2 ) sel = REQ_LOCAL; |
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| 280 | else if ( step == 3 ) sel = REQ_NOP; |
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| 281 | else if ( step == 4 ) sel = REQ_NOP; |
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| 282 | break; |
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| 283 | case REQ_SOUTH : |
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| 284 | if ( step == 1 ) sel = REQ_NORTH; |
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| 285 | else if ( step == 2 ) sel = REQ_LOCAL; |
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| 286 | else if ( step == 3 ) sel = REQ_NOP; |
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| 287 | else if ( step == 4 ) sel = REQ_NOP; |
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| 288 | break; |
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| 289 | case REQ_EAST : |
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| 290 | if ( step == 1 ) sel = REQ_WEST; |
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| 291 | else if ( step == 2 ) sel = REQ_NORTH; |
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| 292 | else if ( step == 3 ) sel = REQ_SOUTH; |
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| 293 | else if ( step == 4 ) sel = REQ_LOCAL; |
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| 294 | break; |
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| 295 | case REQ_WEST : |
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| 296 | if ( step == 1 ) sel = REQ_EAST; |
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| 297 | else if ( step == 2 ) sel = REQ_NORTH; |
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| 298 | else if ( step == 3 ) sel = REQ_SOUTH; |
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| 299 | else if ( step == 4 ) sel = REQ_LOCAL; |
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| 300 | break; |
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| 301 | } |
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| 302 | if ( (sel == REQ_NORTH) && !(m_local_y < ymax) ) sel = REQ_NOP; |
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| 303 | else if ( (sel == REQ_SOUTH) && !(m_local_y > ymin) ) sel = REQ_NOP; |
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| 304 | else if ( (sel == REQ_EAST ) && !(m_local_x < xmax) ) sel = REQ_NOP; |
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| 305 | else if ( (sel == REQ_WEST ) && !(m_local_x > xmin) ) sel = REQ_NOP; |
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| 306 | |
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| 307 | return sel; |
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| 308 | } |
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| 309 | |
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| 310 | ///////////////////////////////////////////////////////// |
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| 311 | tmpl(inline bool)::is_broadcast(sc_uint<flit_width> data) |
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| 312 | { |
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| 313 | return ( (data & 0x1) != 0); |
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| 314 | } |
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| 315 | |
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| 316 | ///////////////////////// |
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| 317 | tmpl(void)::print_trace() |
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| 318 | { |
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| 319 | const char* port_name[] = |
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| 320 | { |
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| 321 | "N", |
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| 322 | "S", |
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| 323 | "E", |
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| 324 | "W", |
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| 325 | "L" |
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| 326 | }; |
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| 327 | |
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| 328 | const char* infsm_str[] = |
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| 329 | { |
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| 330 | "IDLE", |
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| 331 | "REQ", |
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| 332 | "ALLOC", |
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| 333 | "REQ_FIRST", |
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| 334 | "ALLOC_FIRST", |
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| 335 | "REQ_SECOND", |
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| 336 | "ALLOC_SECOND", |
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| 337 | "REQ_THIRD", |
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| 338 | "ALLOC_THIRD", |
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| 339 | "REQ_FOURTH", |
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| 340 | "ALLOC_FOURTH" |
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| 341 | }; |
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| 342 | |
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| 343 | std::cout << "DSPIN_ROUTER " << name(); |
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| 344 | |
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| 345 | for( size_t i = 0 ; i < 5 ; i++) // loop on input ports |
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| 346 | { |
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| 347 | std::cout << " / infsm[" << port_name[i] << "] " |
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| 348 | << infsm_str[r_fsm_in[i].read()]; |
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| 349 | } |
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| 350 | |
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| 351 | for ( size_t out=0 ; out<5 ; out++) // loop on output ports |
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| 352 | { |
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| 353 | if ( r_alloc_out[out].read() ) |
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| 354 | { |
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| 355 | int in = r_index_out[out]; |
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| 356 | std::cout << " / " << port_name[in] << " -> " << port_name[out] ; |
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| 357 | } |
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| 358 | } |
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| 359 | std::cout << std::endl; |
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| 360 | } |
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| 361 | |
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| 362 | //////////////////////// |
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| 363 | tmpl(void)::transition() |
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| 364 | { |
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| 365 | // Long wires connecting input and output ports |
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| 366 | size_t req_in[5]; // input ports -> output ports |
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| 367 | size_t get_out[5]; // output ports -> input ports |
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| 368 | bool put_in[5]; // input ports -> output ports |
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| 369 | internal_flit_t data_in[5]; // input ports -> output ports |
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| 370 | |
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| 371 | // control signals for the input fifos |
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| 372 | bool fifo_in_write[5]; |
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| 373 | bool fifo_in_read[5]; |
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| 374 | internal_flit_t fifo_in_wdata[5]; |
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| 375 | |
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| 376 | // control signals for the output fifos |
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| 377 | bool fifo_out_write[5]; |
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| 378 | bool fifo_out_read[5]; |
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| 379 | internal_flit_t fifo_out_wdata[5]; |
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| 380 | |
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| 381 | // Reset |
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| 382 | if ( p_resetn == false ) |
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| 383 | { |
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| 384 | for(size_t i = 0 ; i < 5 ; i++) |
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| 385 | { |
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| 386 | r_alloc_out[i] = false; |
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| 387 | r_index_out[i] = 0; |
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| 388 | r_index_in[i] = 0; |
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| 389 | r_fsm_in[i] = INFSM_IDLE; |
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| 390 | r_fifo_in[i].init(); |
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| 391 | r_fifo_out[i].init(); |
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| 392 | } |
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| 393 | return; |
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| 394 | } |
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| 395 | |
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| 396 | // fifos signals default values |
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| 397 | for(size_t i = 0 ; i < 5 ; i++) |
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| 398 | { |
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| 399 | fifo_in_read[i] = false; |
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| 400 | |
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| 401 | // do not write into the FIFO of disabled interfaces |
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| 402 | fifo_in_write[i] = p_in[i].write.read() && |
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| 403 | ((m_disable_mask & (1 << i)) == 0); |
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| 404 | |
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| 405 | fifo_in_wdata[i].data = p_in[i].data.read(); |
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| 406 | fifo_in_wdata[i].eop = p_in[i].eop.read(); |
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| 407 | |
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| 408 | fifo_out_read[i] = p_out[i].read.read(); |
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| 409 | fifo_out_write[i] = false; |
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| 410 | } |
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| 411 | |
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| 412 | // loop on the output ports: |
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| 413 | // compute get_out[j] depending on the output port state |
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| 414 | // and combining fifo_out[j].wok and r_alloc_out[j] |
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| 415 | for ( size_t j = 0 ; j < 5 ; j++ ) |
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| 416 | { |
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| 417 | if( r_alloc_out[j].read() and (r_fifo_out[j].wok()) ) |
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| 418 | { |
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| 419 | get_out[j] = r_index_out[j].read(); |
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| 420 | } |
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| 421 | else |
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| 422 | { |
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| 423 | get_out[j] = 0xFFFFFFFF; |
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| 424 | } |
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| 425 | } |
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| 426 | |
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| 427 | // loop on the input ports : |
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| 428 | // The port state is defined by r_fsm_in[i], r_index_in[i] & r_buf_in[i] |
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| 429 | // The req_in[i] computation implements the X-FIRST algorithm. |
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| 430 | // data_in[i], put_in[i] and req_in[i] depend on the input port state. |
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| 431 | // The fifo_in_read[i] is computed further... |
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| 432 | |
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| 433 | for ( size_t i = 0 ; i < 5 ; i++ ) |
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| 434 | { |
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| 435 | switch ( r_fsm_in[i].read() ) |
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| 436 | { |
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| 437 | case INFSM_IDLE: // no output port allocated |
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| 438 | { |
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| 439 | put_in[i] = false; |
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| 440 | |
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| 441 | if ( r_fifo_in[i].rok() ) // packet available in input fifo |
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| 442 | { |
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| 443 | if ( is_broadcast( r_fifo_in[i].read().data ) and |
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| 444 | m_broadcast_supported ) // broadcast |
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| 445 | { |
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| 446 | fifo_in_read[i] = true; |
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| 447 | req_in[i] = broadcast_route(1, i, r_fifo_in[i].read().data); |
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| 448 | r_buf_in[i] = r_fifo_in[i].read(); |
---|
| 449 | r_index_in[i] = req_in[i]; |
---|
| 450 | if( req_in[i] == REQ_NOP ) r_fsm_in[i] = INFSM_REQ_SECOND; |
---|
| 451 | else r_fsm_in[i] = INFSM_REQ_FIRST; |
---|
| 452 | } |
---|
| 453 | else // unicast |
---|
| 454 | { |
---|
[873] | 455 | req_in[i] = route(r_fifo_in[i].read().data); |
---|
[854] | 456 | r_index_in[i] = req_in[i]; |
---|
| 457 | r_fsm_in[i] = INFSM_REQ; |
---|
| 458 | } |
---|
| 459 | } |
---|
| 460 | else |
---|
| 461 | { |
---|
| 462 | req_in[i] = REQ_NOP; |
---|
| 463 | } |
---|
| 464 | break; |
---|
| 465 | } |
---|
| 466 | case INFSM_REQ: // not a broadcast / waiting output port allocation |
---|
| 467 | { |
---|
| 468 | data_in[i] = r_fifo_in[i].read(); |
---|
| 469 | put_in[i] = r_fifo_in[i].rok(); |
---|
| 470 | req_in[i] = r_index_in[i]; |
---|
| 471 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
---|
| 472 | if ( get_out[r_index_in[i].read()] == i ) // first flit transfered |
---|
| 473 | { |
---|
| 474 | if ( r_fifo_in[i].read().eop ) r_fsm_in[i] = INFSM_IDLE; |
---|
| 475 | else r_fsm_in[i] = INFSM_ALLOC; |
---|
| 476 | } |
---|
| 477 | break; |
---|
| 478 | } |
---|
| 479 | case INFSM_ALLOC: // not a broadcast / output port allocated |
---|
| 480 | { |
---|
| 481 | data_in[i] = r_fifo_in[i].read(); |
---|
| 482 | put_in[i] = r_fifo_in[i].rok(); |
---|
| 483 | req_in[i] = REQ_NOP; // no request |
---|
| 484 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
---|
| 485 | if ( r_fifo_in[i].read().eop and |
---|
| 486 | r_fifo_in[i].rok() and |
---|
| 487 | (get_out[r_index_in[i].read()] == i) ) // last flit transfered |
---|
| 488 | { |
---|
| 489 | r_fsm_in[i] = INFSM_IDLE; |
---|
| 490 | } |
---|
| 491 | break; |
---|
| 492 | } |
---|
| 493 | case INFSM_REQ_FIRST: // broacast / waiting first output port allocation |
---|
| 494 | { |
---|
| 495 | data_in[i] = r_buf_in[i]; |
---|
| 496 | put_in[i] = true; |
---|
| 497 | req_in[i] = broadcast_route(1, i, r_buf_in[i].data); |
---|
| 498 | r_index_in[i] = req_in[i]; |
---|
| 499 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
| 500 | { |
---|
| 501 | r_fsm_in[i] = INFSM_REQ_SECOND; |
---|
| 502 | } |
---|
| 503 | else |
---|
| 504 | { |
---|
| 505 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
| 506 | { |
---|
| 507 | r_fsm_in[i] = INFSM_ALLOC_FIRST; |
---|
| 508 | } |
---|
| 509 | } |
---|
| 510 | break; |
---|
| 511 | } |
---|
| 512 | case INFSM_ALLOC_FIRST: // broadcast / first output port allocated |
---|
| 513 | { |
---|
| 514 | data_in[i] = r_fifo_in[i].read(); |
---|
| 515 | put_in[i] = r_fifo_in[i].rok(); |
---|
| 516 | req_in[i] = REQ_NOP; |
---|
| 517 | if( (get_out[r_index_in[i].read()] == i) |
---|
| 518 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
| 519 | { |
---|
| 520 | if ( not r_fifo_in[i].read().eop ) |
---|
| 521 | { |
---|
| 522 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
| 523 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
| 524 | } |
---|
| 525 | r_fsm_in[i] = INFSM_REQ_SECOND; |
---|
| 526 | } |
---|
| 527 | break; |
---|
| 528 | } |
---|
| 529 | case INFSM_REQ_SECOND: // broacast / waiting second output port allocation |
---|
| 530 | { |
---|
| 531 | data_in[i] = r_buf_in[i]; |
---|
| 532 | put_in[i] = true; |
---|
| 533 | req_in[i] = broadcast_route(2, i, r_buf_in[i].data); |
---|
| 534 | r_index_in[i] = req_in[i]; |
---|
| 535 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
| 536 | { |
---|
| 537 | r_fsm_in[i] = INFSM_REQ_THIRD; |
---|
| 538 | } |
---|
| 539 | else |
---|
| 540 | { |
---|
| 541 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
| 542 | { |
---|
| 543 | r_fsm_in[i] = INFSM_ALLOC_SECOND; |
---|
| 544 | } |
---|
| 545 | } |
---|
| 546 | break; |
---|
| 547 | } |
---|
| 548 | case INFSM_ALLOC_SECOND: // broadcast / second output port allocated |
---|
| 549 | { |
---|
| 550 | data_in[i] = r_fifo_in[i].read(); |
---|
| 551 | put_in[i] = r_fifo_in[i].rok(); |
---|
| 552 | req_in[i] = REQ_NOP; |
---|
| 553 | if( (get_out[r_index_in[i].read()] == i ) |
---|
| 554 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
| 555 | { |
---|
| 556 | if ( not r_fifo_in[i].read().eop ) |
---|
| 557 | { |
---|
| 558 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
| 559 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
| 560 | } |
---|
| 561 | r_fsm_in[i] = INFSM_REQ_THIRD; |
---|
| 562 | } |
---|
| 563 | break; |
---|
| 564 | } |
---|
| 565 | case INFSM_REQ_THIRD: // broacast / waiting third output port allocation |
---|
| 566 | { |
---|
| 567 | data_in[i] = r_buf_in[i]; |
---|
| 568 | put_in[i] = true; |
---|
| 569 | req_in[i] = broadcast_route(3, i, r_buf_in[i].data); |
---|
| 570 | r_index_in[i] = req_in[i]; |
---|
| 571 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
| 572 | { |
---|
| 573 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
---|
| 574 | } |
---|
| 575 | else |
---|
| 576 | { |
---|
| 577 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
| 578 | { |
---|
| 579 | r_fsm_in[i] = INFSM_ALLOC_THIRD; |
---|
| 580 | } |
---|
| 581 | } |
---|
| 582 | break; |
---|
| 583 | } |
---|
| 584 | case INFSM_ALLOC_THIRD: // broadcast / third output port allocated |
---|
| 585 | { |
---|
| 586 | data_in[i] = r_fifo_in[i].read(); |
---|
| 587 | put_in[i] = r_fifo_in[i].rok(); |
---|
| 588 | req_in[i] = REQ_NOP; |
---|
| 589 | if( (get_out[r_index_in[i].read()] == i ) |
---|
| 590 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
| 591 | { |
---|
| 592 | if ( not r_fifo_in[i].read().eop ) |
---|
| 593 | { |
---|
| 594 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
| 595 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
| 596 | } |
---|
| 597 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
---|
| 598 | } |
---|
| 599 | break; |
---|
| 600 | } |
---|
| 601 | case INFSM_REQ_FOURTH: // broacast / waiting fourth output port allocation |
---|
| 602 | { |
---|
| 603 | data_in[i] = r_buf_in[i]; |
---|
| 604 | put_in[i] = true; |
---|
| 605 | req_in[i] = broadcast_route(4, i, r_buf_in[i].data); |
---|
| 606 | r_index_in[i] = req_in[i]; |
---|
| 607 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
| 608 | { |
---|
| 609 | fifo_in_read[i] = true; |
---|
| 610 | r_fsm_in[i] = INFSM_IDLE; |
---|
| 611 | } |
---|
| 612 | else |
---|
| 613 | { |
---|
| 614 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
| 615 | { |
---|
| 616 | r_fsm_in[i] = INFSM_ALLOC_FOURTH; |
---|
| 617 | } |
---|
| 618 | } |
---|
| 619 | break; |
---|
| 620 | } |
---|
| 621 | case INFSM_ALLOC_FOURTH: // broadcast / fourth output port allocated |
---|
| 622 | { |
---|
| 623 | data_in[i] = r_fifo_in[i].read(); |
---|
| 624 | put_in[i] = r_fifo_in[i].rok(); |
---|
| 625 | req_in[i] = REQ_NOP; |
---|
| 626 | if( (get_out[r_index_in[i].read()] == i ) |
---|
| 627 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
| 628 | { |
---|
| 629 | if ( not r_fifo_in[i].read().eop ) |
---|
| 630 | { |
---|
| 631 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
| 632 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
| 633 | } |
---|
| 634 | fifo_in_read[i] = true; |
---|
| 635 | r_fsm_in[i] = INFSM_IDLE; |
---|
| 636 | } |
---|
| 637 | break; |
---|
| 638 | } |
---|
| 639 | } // end switch |
---|
| 640 | } // end for input ports |
---|
| 641 | |
---|
| 642 | // loop on the output ports : |
---|
| 643 | // The r_alloc_out[j] and r_index_out[j] computation |
---|
| 644 | // implements the round-robin allocation policy. |
---|
| 645 | // These two registers implement a 10 states FSM. |
---|
| 646 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
| 647 | { |
---|
| 648 | if( not r_alloc_out[j].read() ) // not allocated: possible new allocation |
---|
| 649 | { |
---|
| 650 | for( size_t k = r_index_out[j].read() + 1 ; |
---|
| 651 | k < (r_index_out[j] + 6) ; k++) |
---|
| 652 | { |
---|
| 653 | size_t i = k % 5; |
---|
| 654 | |
---|
| 655 | if( req_in[i] == j ) |
---|
| 656 | { |
---|
| 657 | r_alloc_out[j] = true; |
---|
| 658 | r_index_out[j] = i; |
---|
| 659 | break; |
---|
| 660 | } |
---|
| 661 | } // end loop on input ports |
---|
| 662 | } |
---|
| 663 | else // allocated: possible desallocation |
---|
| 664 | { |
---|
| 665 | if ( data_in[r_index_out[j]].eop and |
---|
| 666 | r_fifo_out[j].wok() and |
---|
| 667 | put_in[r_index_out[j]] ) |
---|
| 668 | { |
---|
| 669 | r_alloc_out[j] = false; |
---|
| 670 | } |
---|
| 671 | } |
---|
| 672 | } // end loop on output ports |
---|
| 673 | |
---|
| 674 | // loop on the output ports : |
---|
| 675 | // The fifo_out_write[j] and fifo_out_wdata[j] computation |
---|
| 676 | // implements the output port mux. |
---|
| 677 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
| 678 | { |
---|
| 679 | if( r_alloc_out[j] ) // output port allocated |
---|
| 680 | { |
---|
| 681 | fifo_out_write[j] = put_in[r_index_out[j]] && |
---|
| 682 | ((m_disable_mask & (1 << j)) == 0); |
---|
| 683 | fifo_out_wdata[j] = data_in[r_index_out[j]]; |
---|
| 684 | } |
---|
| 685 | } // end loop on the output ports |
---|
| 686 | |
---|
| 687 | // FIFOS update |
---|
| 688 | for(size_t i = 0 ; i < 5 ; i++) |
---|
| 689 | { |
---|
| 690 | r_fifo_in[i].update(fifo_in_read[i], |
---|
| 691 | fifo_in_write[i], |
---|
| 692 | fifo_in_wdata[i]); |
---|
| 693 | r_fifo_out[i].update(fifo_out_read[i], |
---|
| 694 | fifo_out_write[i], |
---|
| 695 | fifo_out_wdata[i]); |
---|
| 696 | } |
---|
| 697 | } // end transition |
---|
| 698 | |
---|
| 699 | //////////////////////////////// |
---|
| 700 | // genMoore |
---|
| 701 | //////////////////////////////// |
---|
| 702 | tmpl(void)::genMoore() |
---|
| 703 | { |
---|
| 704 | for(size_t i = 0 ; i < 5 ; i++) |
---|
| 705 | { |
---|
| 706 | // input ports : READ signals |
---|
| 707 | p_in[i].read = r_fifo_in[i].wok(); |
---|
| 708 | |
---|
| 709 | // output ports : DATA & WRITE signals |
---|
| 710 | p_out[i].data = r_fifo_out[i].read().data; |
---|
| 711 | p_out[i].eop = r_fifo_out[i].read().eop; |
---|
| 712 | p_out[i].write = r_fifo_out[i].rok(); |
---|
| 713 | } |
---|
| 714 | } // end genMoore |
---|
| 715 | |
---|
| 716 | }} // end namespace |
---|
| 717 | |
---|
| 718 | // Local Variables: |
---|
| 719 | // tab-width: 4 |
---|
| 720 | // c-basic-offset: 4 |
---|
| 721 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
| 722 | // indent-tabs-mode: nil |
---|
| 723 | // End: |
---|
| 724 | |
---|
| 725 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|