1 | /* -*- c++ -*- |
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2 | * |
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3 | * File : dspin_router.cpp |
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4 | * Copyright (c) UPMC, Lip6 |
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5 | * Authors : Alain Greiner, Abbas Sheibanyrad, Ivan Miro, Zhen Zhang |
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6 | * |
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7 | * SOCLIB_LGPL_HEADER_BEGIN |
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8 | * |
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9 | * This file is part of SoCLib, GNU LGPLv2.1. |
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10 | * |
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11 | * SoCLib is free software; you can redistribute it and/or modify it |
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12 | * under the terms of the GNU Lesser General Public License as published |
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13 | * by the Free Software Foundation; version 2.1 of the License. |
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14 | * |
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15 | * SoCLib is distributed in the hope that it will be useful, but |
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16 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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18 | * Lesser General Public License for more details. |
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19 | * |
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20 | * You should have received a copy of the GNU Lesser General Public |
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21 | * License along with SoCLib; if not, write to the Free Software |
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22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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23 | * 02110-1301 USA |
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24 | * |
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25 | * SOCLIB_LGPL_HEADER_END |
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26 | * |
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27 | */ |
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28 | |
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29 | /////////////////////////////////////////////////////////////////////////// |
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30 | // Implementation Note : |
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31 | // The xfirst_route(), broadcast_route() and is_broadcast() functions |
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32 | // defined below are used to decode the DSPIN first flit format: |
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33 | // - In case of a non-broadcast packet : |
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34 | // | X | Y |---------------------------------------|BC | |
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35 | // | x_width | y_width | flit_width - (x_width + y_width + 2) | 0 | |
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36 | // |
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37 | // - In case of a broacast |
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38 | // | XMIN | XMAX | YMIN | YMAX |-------------------|BC | |
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39 | // | 5 | 5 | 5 | 5 | flit_width - 22 | 1 | |
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40 | /////////////////////////////////////////////////////////////////////////// |
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41 | |
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42 | #include "../include/dspin_router.h" |
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43 | #include "dspin_router_config.h" |
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44 | |
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45 | namespace soclib { namespace caba { |
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46 | |
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47 | using namespace soclib::common; |
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48 | using namespace soclib::caba; |
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49 | |
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50 | #define tmpl(x) template<int flit_width> x DspinRouter<flit_width> |
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51 | |
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52 | //////////////////////////////////////////////// |
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53 | // constructor |
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54 | //////////////////////////////////////////////// |
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55 | tmpl(/**/)::DspinRouter( sc_module_name name, |
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56 | const size_t x, |
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57 | const size_t y, |
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58 | const size_t x_width, |
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59 | const size_t y_width, |
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60 | const size_t in_fifo_depth, |
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61 | const size_t out_fifo_depth, |
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62 | const bool broadcast_supported, |
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63 | const bool configuration_supported) |
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64 | : soclib::caba::BaseModule(name), |
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65 | |
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66 | p_clk( "p_clk" ), |
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67 | p_resetn( "p_resetn" ), |
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68 | p_in( alloc_elems<DspinInput<flit_width> >("p_in", 5) ), |
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69 | p_out( alloc_elems<DspinOutput<flit_width> >("p_out", 5) ), |
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70 | p_recovery_cfg(NULL), |
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71 | |
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72 | r_alloc_out( alloc_elems<sc_signal<bool> >("r_alloc_out", 5)), |
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73 | r_index_out( soclib::common::alloc_elems<sc_signal<size_t> >("r_index_out", 5)), |
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74 | r_fsm_in( alloc_elems<sc_signal<int> >("r_fsm_in", 5)), |
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75 | r_index_in( alloc_elems<sc_signal<size_t> >("r_index_in", 5)), |
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76 | |
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77 | m_local_x( x ), |
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78 | m_local_y( y ), |
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79 | m_x_width( x_width ), |
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80 | m_x_shift( flit_width - x_width ), |
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81 | m_x_mask( (0x1 << x_width) - 1 ), |
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82 | m_y_width( y_width ), |
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83 | m_y_shift( flit_width - x_width - y_width ), |
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84 | m_y_mask( (0x1 << y_width) - 1 ), |
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85 | m_broadcast_supported( broadcast_supported ), |
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86 | m_disable_mask( 0 ) |
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87 | { |
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88 | std::cout << " - Building DspinRouter : " << name << std::endl; |
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89 | |
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90 | SC_METHOD (transition); |
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91 | dont_initialize(); |
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92 | sensitive << p_clk.pos(); |
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93 | |
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94 | SC_METHOD (genMoore); |
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95 | dont_initialize(); |
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96 | sensitive << p_clk.neg(); |
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97 | |
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98 | r_fifo_in = (GenericFifo<internal_flit_t>*) |
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99 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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100 | |
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101 | r_fifo_out = (GenericFifo<internal_flit_t>*) |
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102 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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103 | |
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104 | r_buf_in = (internal_flit_t*) |
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105 | malloc(sizeof(internal_flit_t) * 5); |
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106 | |
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107 | for( size_t i = 0 ; i < 5 ; i++ ) |
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108 | { |
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109 | std::ostringstream stri; |
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110 | stri << "r_in_fifo_" << i; |
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111 | new(&r_fifo_in[i]) |
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112 | GenericFifo<internal_flit_t >(stri.str(), in_fifo_depth); |
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113 | |
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114 | std::ostringstream stro; |
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115 | stro << "r_out_fifo_" << i; |
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116 | new(&r_fifo_out[i]) |
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117 | GenericFifo<internal_flit_t >(stro.str(), out_fifo_depth); |
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118 | } |
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119 | |
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120 | if (configuration_supported) { |
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121 | p_recovery_cfg = new sc_core::sc_in<uint32_t> ("p_recovery_cfg"); |
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122 | } |
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123 | } // end constructor |
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124 | |
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125 | /////////////////////////////////////////////////// |
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126 | tmpl(/**/)::~DspinRouter() |
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127 | { |
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128 | if ( is_reconfigurable() ) delete p_recovery_cfg; |
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129 | } |
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130 | |
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131 | /////////////////////////////////////////////////// |
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132 | tmpl(int)::blackhole_position() |
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133 | { |
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134 | if ( is_reconfigurable() ) { |
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135 | return p_recovery_cfg->read() & 0xF; |
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136 | } |
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137 | return BH_NONE; |
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138 | } |
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139 | |
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140 | /////////////////////////////////////////////////// |
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141 | tmpl(void)::bind_recovery_port(sc_signal<uint32_t> &s) |
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142 | { |
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143 | if (!is_reconfigurable()) { |
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144 | std::cerr << "Error in " << name() |
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145 | << ": router configuration not supported." << std::endl |
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146 | << "Enable it during router instantiation." << std::endl; |
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147 | exit(1); |
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148 | } |
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149 | (*p_recovery_cfg)(s); |
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150 | } |
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151 | |
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152 | /////////////////////////////////////////////////// |
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153 | tmpl(int)::xfirst_route( size_t xdest, size_t ydest ) |
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154 | { |
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155 | return (xdest < m_local_x ? REQ_WEST : |
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156 | (xdest > m_local_x ? REQ_EAST : |
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157 | (ydest < m_local_y ? REQ_SOUTH : |
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158 | (ydest > m_local_y ? REQ_NORTH : REQ_LOCAL)))); |
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159 | } |
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160 | |
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161 | /////////////////////////////////////////////////// |
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162 | tmpl(bool)::is_destination_blackhole( size_t xdest, size_t ydest, int bhpos ) |
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163 | { |
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164 | size_t xhole, yhole; |
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165 | switch (bhpos) { |
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166 | case BH_N: |
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167 | xhole = m_local_x; |
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168 | yhole = m_local_y - 1; |
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169 | break; |
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170 | case BH_NW: |
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171 | xhole = m_local_x + 1; |
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172 | yhole = m_local_y - 1; |
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173 | break; |
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174 | case BH_W: |
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175 | xhole = m_local_x + 1; |
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176 | yhole = m_local_y; |
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177 | break; |
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178 | case BH_SW: |
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179 | xhole = m_local_x + 1; |
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180 | yhole = m_local_y + 1; |
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181 | break; |
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182 | case BH_S: |
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183 | xhole = m_local_x; |
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184 | yhole = m_local_y + 1; |
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185 | break; |
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186 | case BH_SE: |
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187 | xhole = m_local_x - 1; |
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188 | yhole = m_local_y + 1; |
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189 | break; |
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190 | case BH_E: |
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191 | xhole = m_local_x - 1; |
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192 | yhole = m_local_y; |
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193 | break; |
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194 | case BH_NE: |
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195 | xhole = m_local_x - 1; |
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196 | yhole = m_local_y - 1; |
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197 | break; |
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198 | default: |
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199 | return false; |
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200 | } |
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201 | |
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202 | return ((xdest == xhole) && (ydest == yhole)); |
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203 | } |
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204 | |
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205 | /////////////////////////////////////////////////// |
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206 | tmpl(int)::recovery_route( size_t xdest, size_t ydest ) |
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207 | { |
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208 | int bhpos = blackhole_position(); |
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209 | |
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210 | if ( xdest > m_local_x ) { |
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211 | if ( (bhpos == BH_NE) || (bhpos == BH_E) || (bhpos == BH_SE) || |
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212 | (bhpos == BH_S) ) { |
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213 | return REQ_EAST; |
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214 | } |
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215 | else if ( bhpos == BH_N ) { |
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216 | if ( (m_local_y == 1) || (m_local_x == 0) || (ydest >= m_local_y) || |
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217 | (xdest > (m_local_x + 1)) ) { |
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218 | return REQ_EAST; |
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219 | } |
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220 | else { |
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221 | return REQ_WEST; |
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222 | } |
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223 | } |
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224 | else if ( bhpos == BH_NW ) { |
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225 | if ( (m_local_y == 1) || (ydest >= m_local_y) || |
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226 | (xdest > (m_local_x + 2)) ) { |
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227 | return REQ_EAST; |
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228 | } |
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229 | else { |
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230 | return REQ_SOUTH; |
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231 | } |
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232 | } |
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233 | else if ( bhpos == BH_W ) { |
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234 | if ( (m_local_y == 0) || (ydest > m_local_y)) { |
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235 | return REQ_NORTH; |
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236 | } |
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237 | else { |
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238 | return REQ_SOUTH; |
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239 | } |
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240 | } |
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241 | else if ( bhpos == BH_SW ) { |
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242 | if ( (ydest <= m_local_y) || (xdest > (m_local_x + 1)) ) { |
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243 | return REQ_EAST; |
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244 | } |
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245 | else { |
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246 | return REQ_NORTH; |
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247 | } |
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248 | } |
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249 | std::cout << "error: unexpected condition in function " |
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250 | << __FILE__ << ":" << __func__ << " +" << __LINE__ |
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251 | << std::endl; |
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252 | exit(1); |
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253 | } // end if (xdest > m_local_x) |
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254 | else if ( xdest < m_local_x ) { |
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255 | if ( (bhpos == BH_N) || (bhpos == BH_NW) || (bhpos == BH_W) || |
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256 | (bhpos == BH_SW) || (bhpos == BH_S) ) { |
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257 | return REQ_WEST; |
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258 | } |
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259 | else if ( bhpos == BH_NE ) { |
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260 | if ( (xdest < (m_local_x - 1)) || (ydest >= m_local_y) ) { |
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261 | return REQ_WEST; |
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262 | } |
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263 | else { |
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264 | return REQ_SOUTH; |
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265 | } |
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266 | } |
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267 | else if ( bhpos == BH_SE ) { |
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268 | if ( (m_local_x == 1) && (ydest > (m_local_y + 1)) ) { |
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269 | return REQ_NORTH; |
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270 | } |
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271 | else { |
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272 | return REQ_WEST; |
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273 | } |
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274 | } |
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275 | else if ( bhpos == BH_E ) { |
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276 | if ( (m_local_y == 0) || |
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277 | ((m_local_x == 1) && (ydest > m_local_y)) ) { |
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278 | return REQ_NORTH; |
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279 | } |
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280 | else { |
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281 | return REQ_SOUTH; |
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282 | } |
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283 | } |
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284 | std::cout << "error: unexpected condition in function " |
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285 | << __FILE__ << ":" << __func__ << " +" << __LINE__ |
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286 | << std::endl; |
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287 | exit(1); |
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288 | } // end if (xdest < m_local_x) |
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289 | else if ( ydest > m_local_y ) { |
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290 | if ( bhpos != BH_S ) { |
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291 | return REQ_NORTH; |
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292 | } |
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293 | else if ( m_local_x != 0 ) { |
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294 | return REQ_WEST; |
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295 | } |
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296 | else { |
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297 | return REQ_EAST; |
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298 | } |
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299 | } // end if (ydest > m_local_y) |
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300 | else if ( ydest < m_local_y ) { |
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301 | if ( bhpos != BH_N ) { |
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302 | return REQ_SOUTH; |
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303 | } |
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304 | else if ( m_local_x != 0) { |
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305 | return REQ_WEST; |
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306 | } |
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307 | else { |
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308 | return REQ_EAST; |
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309 | } |
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310 | } // end if (ydest < m_local_y) |
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311 | return REQ_LOCAL; |
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312 | } |
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313 | |
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314 | /////////////////////////////////////////////////// |
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315 | tmpl(int)::route( sc_uint<flit_width> data ) |
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316 | { |
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317 | size_t xdest = (size_t)(data >> m_x_shift) & m_x_mask; |
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318 | size_t ydest = (size_t)(data >> m_y_shift) & m_y_mask; |
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319 | if ( blackhole_position() != BH_NONE ) |
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320 | { |
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321 | // reroute the request if its destination is the blackhole (this |
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322 | // is to implement the segment recovery mechanism) |
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323 | if ( is_destination_blackhole(xdest, ydest, blackhole_position()) ) |
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324 | { |
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325 | int dir = migration_route(); |
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326 | |
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327 | #if SOCLIB_MODULE_DEBUG |
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328 | std::cout << "<" << name() << "> migration: " |
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329 | << "route request to DIR = " << dir << std::endl; |
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330 | #endif |
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331 | return dir; |
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332 | } |
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333 | |
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334 | if (is_network_recovery_enable()) |
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335 | { |
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336 | int dir = recovery_route(xdest, ydest); |
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337 | |
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338 | #if SOCLIB_MODULE_DEBUG |
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339 | std::cout << "<" << name() << "> network recovery: " |
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340 | << "route request to DIR = " << dir << std::endl; |
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341 | #endif |
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342 | return dir; |
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343 | } |
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344 | } |
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345 | return xfirst_route(xdest, ydest); |
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346 | } |
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347 | |
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348 | /////////////////////////////////////////////////// |
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349 | tmpl(int)::broadcast_route(int step, int source, sc_uint<flit_width> data) |
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350 | { |
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351 | const size_t lx = m_local_x; |
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352 | const size_t ly = m_local_y; |
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353 | const size_t xmin = (data >> (flit_width - 5 )) & 0x1F; |
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354 | const size_t xmax = (data >> (flit_width - 10)) & 0x1F; |
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355 | const size_t ymin = (data >> (flit_width - 15)) & 0x1F; |
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356 | const size_t ymax = (data >> (flit_width - 20)) & 0x1F; |
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357 | const int bh = blackhole_position(); |
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358 | int sel = REQ_NOP; |
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359 | bool ew = ((data & 0x2) != 0); |
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360 | |
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361 | switch(source) { |
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362 | case REQ_LOCAL : |
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363 | if ( step == 1 ) sel = REQ_NORTH; |
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364 | else if ( step == 2 ) sel = REQ_SOUTH; |
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365 | else if ( step == 3 ) { |
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366 | if ( (bh == BH_N) && (lx != 0) && (ly != 1) ) { |
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367 | sel = REQ_NOP; |
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368 | break; |
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369 | } |
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370 | sel = REQ_EAST; |
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371 | } |
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372 | else if ( step == 4 ) { |
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373 | if ( (bh == BH_NE) && (lx != 1) && (ly != 1) ) { |
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374 | sel = REQ_NOP; |
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375 | break; |
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376 | } |
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377 | sel = REQ_WEST; |
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378 | } |
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379 | break; |
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380 | case REQ_NORTH : |
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381 | if ( step == 1 ) sel = REQ_SOUTH; |
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382 | else if ( step == 2 ) sel = REQ_LOCAL; |
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383 | else if ( step == 3 ) { |
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384 | if ( bh == BH_SW ) { |
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385 | sel = REQ_EAST; |
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386 | break; |
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387 | } |
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388 | sel = REQ_NOP; |
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389 | } |
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390 | else if ( step == 4 ) { |
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391 | if ( (bh == BH_SE) && (ew || (lx == 1)) ) { |
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392 | sel = REQ_WEST; |
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393 | break; |
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394 | } |
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395 | sel = REQ_NOP; |
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396 | } |
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397 | break; |
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398 | case REQ_SOUTH : |
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399 | if ( step == 1 ) sel = REQ_NORTH; |
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400 | else if ( step == 2 ) sel = REQ_LOCAL; |
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401 | else if ( step == 3 ) { |
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402 | if ( bh == BH_NW ) { |
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403 | sel = REQ_EAST; |
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404 | break; |
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405 | } |
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406 | if ( (bh == BH_NE) && ((lx == 1) || (ly == 1)) ) { |
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407 | sel = REQ_WEST; |
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408 | break; |
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409 | } |
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410 | sel = REQ_NOP; |
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411 | } |
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412 | else if ( step == 4 ) sel = REQ_NOP; |
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413 | break; |
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414 | case REQ_EAST : |
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415 | if ( step == 1 ) { |
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416 | if ( (bh == BH_NE) && (lx != 1) && (ly != 1) ) { |
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417 | sel = REQ_NOP; |
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418 | break; |
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419 | } |
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420 | sel = REQ_WEST; |
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421 | } |
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422 | else if ( step == 2 ) sel = REQ_NORTH; |
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423 | else if ( step == 3 ) sel = REQ_SOUTH; |
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424 | else if ( step == 4 ) sel = REQ_LOCAL; |
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425 | break; |
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426 | case REQ_WEST : |
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427 | if ( step == 1 ) { |
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428 | if ( (bh == BH_N) && (ly != 1) ) { |
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429 | sel = REQ_NOP; |
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430 | break; |
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431 | } |
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432 | if ( (bh == BH_S) && !ew ) { |
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433 | sel = REQ_NOP; |
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434 | break; |
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435 | } |
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436 | sel = REQ_EAST; |
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437 | } |
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438 | else if ( step == 2 ) sel = REQ_NORTH; |
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439 | else if ( step == 3 ) sel = REQ_SOUTH; |
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440 | else if ( step == 4 ) sel = REQ_LOCAL; |
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441 | break; |
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442 | } |
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443 | |
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444 | if ( (sel == REQ_NORTH) && !(ly < ymax) ) sel = REQ_NOP; |
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445 | else if ( (sel == REQ_SOUTH) && !(ly > ymin) ) sel = REQ_NOP; |
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446 | else if ( (sel == REQ_EAST ) && !(lx < xmax) ) sel = REQ_NOP; |
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447 | else if ( (sel == REQ_WEST ) && !(lx > xmin) ) sel = REQ_NOP; |
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448 | |
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449 | #if 0 |
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450 | /* This code can be used if we want to inhibit requests to the |
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451 | * blackhole. However, it is not strictly necessary because the |
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452 | * blackhole will consume the request and will do nothing with it */ |
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453 | |
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454 | if ( (sel == REQ_NORTH) && (bh == BH_S) ) sel = REQ_NOP; |
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455 | else if ( (sel == REQ_SOUTH) && (bh == BH_N) ) sel = REQ_NOP; |
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456 | else if ( (sel == REQ_EAST ) && (bh == BH_W) ) sel = REQ_NOP; |
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457 | else if ( (sel == REQ_WEST ) && (bh == BH_E) ) sel = REQ_NOP; |
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458 | #endif |
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459 | |
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460 | return sel; |
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461 | } |
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462 | |
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463 | ///////////////////////////////////////////////////////// |
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464 | tmpl(bool)::is_broadcast(sc_uint<flit_width> data) |
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465 | { |
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466 | return ( (data & 0x1) != 0); |
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467 | } |
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468 | |
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469 | ///////////////////////////////////////////////////////// |
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470 | tmpl(sc_uint<flit_width>)::compute_broadcast_header(int source) |
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471 | { |
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472 | const int bh = blackhole_position(); |
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473 | sc_uint<flit_width> header = r_fifo_in[source].read().data; |
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474 | sc_uint<flit_width> mask = 0x2; |
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475 | switch (source) { |
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476 | case REQ_LOCAL: |
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477 | if ( bh != BH_NONE ) { |
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478 | header |= mask; |
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479 | } |
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480 | break; |
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481 | case REQ_EAST: |
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482 | if ( (bh == BH_NE) || (bh == BH_E) ) { |
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483 | header |= mask; |
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484 | } |
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485 | break; |
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486 | case REQ_WEST: |
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487 | if ( (bh == BH_NW) || (bh == BH_W) || (bh == BH_SW) ) { |
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488 | header |= mask; |
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489 | } |
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490 | break; |
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491 | |
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492 | /* Make sure that the EW bit is not set when it shouldn't. |
---|
493 | * This can arrive if an initiator or a local interconnect uses |
---|
494 | * the broadcast header reserved bits internally and don't reset |
---|
495 | * them */ |
---|
496 | case REQ_NORTH: |
---|
497 | if ( (bh == BH_NW) || (bh == BH_N) || (bh == BH_NE) ) { |
---|
498 | header &= ~mask; |
---|
499 | } |
---|
500 | break; |
---|
501 | case REQ_SOUTH: |
---|
502 | if ( (bh == BH_SW) || (bh == BH_S) || (bh == BH_SE) ) { |
---|
503 | header &= ~mask; |
---|
504 | } |
---|
505 | break; |
---|
506 | } |
---|
507 | return header; |
---|
508 | } |
---|
509 | |
---|
510 | ///////////////////////// |
---|
511 | tmpl(void)::print_trace() |
---|
512 | { |
---|
513 | const char* port_name[] = |
---|
514 | { |
---|
515 | "N", |
---|
516 | "S", |
---|
517 | "E", |
---|
518 | "W", |
---|
519 | "L" |
---|
520 | }; |
---|
521 | |
---|
522 | const char* infsm_str[] = |
---|
523 | { |
---|
524 | "IDLE", |
---|
525 | "REQ", |
---|
526 | "ALLOC", |
---|
527 | "REQ_FIRST", |
---|
528 | "ALLOC_FIRST", |
---|
529 | "REQ_SECOND", |
---|
530 | "ALLOC_SECOND", |
---|
531 | "REQ_THIRD", |
---|
532 | "ALLOC_THIRD", |
---|
533 | "REQ_FOURTH", |
---|
534 | "ALLOC_FOURTH" |
---|
535 | }; |
---|
536 | |
---|
537 | const char* bh_str[] = |
---|
538 | { |
---|
539 | "BH_NONE", |
---|
540 | "BH_N", |
---|
541 | "BH_NE", |
---|
542 | "BH_E", |
---|
543 | "BH_SE", |
---|
544 | "BH_S", |
---|
545 | "BH_SW", |
---|
546 | "BH_W", |
---|
547 | "BH_NW" |
---|
548 | }; |
---|
549 | |
---|
550 | std::cout << "DSPIN_ROUTER " << name(); |
---|
551 | std::cout << " / bh = " << bh_str[blackhole_position()]; |
---|
552 | |
---|
553 | for( size_t i = 0 ; i < 5 ; i++) // loop on input ports |
---|
554 | { |
---|
555 | std::cout << " / infsm[" << port_name[i] << "] " |
---|
556 | << infsm_str[r_fsm_in[i].read()]; |
---|
557 | } |
---|
558 | |
---|
559 | for ( size_t out=0 ; out<5 ; out++) // loop on output ports |
---|
560 | { |
---|
561 | if ( r_alloc_out[out].read() ) |
---|
562 | { |
---|
563 | int in = r_index_out[out]; |
---|
564 | std::cout << " / " << port_name[in] << " -> " << port_name[out] ; |
---|
565 | } |
---|
566 | } |
---|
567 | std::cout << std::endl; |
---|
568 | } |
---|
569 | |
---|
570 | //////////////////////// |
---|
571 | tmpl(void)::transition() |
---|
572 | { |
---|
573 | // Long wires connecting input and output ports |
---|
574 | size_t req_in[5]; // input ports -> output ports |
---|
575 | size_t get_out[5]; // output ports -> input ports |
---|
576 | bool put_in[5]; // input ports -> output ports |
---|
577 | internal_flit_t data_in[5]; // input ports -> output ports |
---|
578 | |
---|
579 | // control signals for the input fifos |
---|
580 | bool fifo_in_write[5]; |
---|
581 | bool fifo_in_read[5]; |
---|
582 | internal_flit_t fifo_in_wdata[5]; |
---|
583 | |
---|
584 | // control signals for the output fifos |
---|
585 | bool fifo_out_write[5]; |
---|
586 | bool fifo_out_read[5]; |
---|
587 | internal_flit_t fifo_out_wdata[5]; |
---|
588 | |
---|
589 | // Reset |
---|
590 | if ( p_resetn == false ) |
---|
591 | { |
---|
592 | for(size_t i = 0 ; i < 5 ; i++) |
---|
593 | { |
---|
594 | r_alloc_out[i] = false; |
---|
595 | r_index_out[i] = 0; |
---|
596 | r_index_in[i] = 0; |
---|
597 | r_fsm_in[i] = INFSM_IDLE; |
---|
598 | r_fifo_in[i].init(); |
---|
599 | r_fifo_out[i].init(); |
---|
600 | } |
---|
601 | return; |
---|
602 | } |
---|
603 | |
---|
604 | // fifos signals default values |
---|
605 | for(size_t i = 0 ; i < 5 ; i++) |
---|
606 | { |
---|
607 | fifo_in_read[i] = false; |
---|
608 | |
---|
609 | // do not write into the FIFO of disabled interfaces |
---|
610 | fifo_in_write[i] = p_in[i].write.read() && |
---|
611 | ((m_disable_mask & (1 << i)) == 0); |
---|
612 | |
---|
613 | fifo_in_wdata[i].data = p_in[i].data.read(); |
---|
614 | fifo_in_wdata[i].eop = p_in[i].eop.read(); |
---|
615 | |
---|
616 | fifo_out_read[i] = p_out[i].read.read(); |
---|
617 | fifo_out_write[i] = false; |
---|
618 | } |
---|
619 | |
---|
620 | // loop on the output ports: |
---|
621 | // compute get_out[j] depending on the output port state |
---|
622 | // and combining fifo_out[j].wok and r_alloc_out[j] |
---|
623 | for ( size_t j = 0 ; j < 5 ; j++ ) |
---|
624 | { |
---|
625 | if( r_alloc_out[j].read() and (r_fifo_out[j].wok()) ) |
---|
626 | { |
---|
627 | get_out[j] = r_index_out[j].read(); |
---|
628 | } |
---|
629 | else |
---|
630 | { |
---|
631 | get_out[j] = 0xFFFFFFFF; |
---|
632 | } |
---|
633 | } |
---|
634 | |
---|
635 | // loop on the input ports : |
---|
636 | // The port state is defined by r_fsm_in[i], r_index_in[i] & r_buf_in[i] |
---|
637 | // The req_in[i] computation implements the X-FIRST algorithm. |
---|
638 | // data_in[i], put_in[i] and req_in[i] depend on the input port state. |
---|
639 | // The fifo_in_read[i] is computed further... |
---|
640 | |
---|
641 | for ( size_t i = 0 ; i < 5 ; i++ ) |
---|
642 | { |
---|
643 | switch ( r_fsm_in[i].read() ) |
---|
644 | { |
---|
645 | case INFSM_IDLE: // no output port allocated |
---|
646 | { |
---|
647 | put_in[i] = false; |
---|
648 | |
---|
649 | if ( r_fifo_in[i].rok() ) // packet available in input fifo |
---|
650 | { |
---|
651 | if ( is_broadcast( r_fifo_in[i].read().data ) and |
---|
652 | m_broadcast_supported ) // broadcast |
---|
653 | { |
---|
654 | if ( r_fifo_in[i].read().eop ) |
---|
655 | { |
---|
656 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
657 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
658 | exit(1); |
---|
659 | } |
---|
660 | |
---|
661 | internal_flit_t header; |
---|
662 | header.eop = false; |
---|
663 | header.data = compute_broadcast_header(i); |
---|
664 | |
---|
665 | fifo_in_read[i] = true; |
---|
666 | req_in[i] = broadcast_route(1, i, header.data); |
---|
667 | r_buf_in[i] = header; |
---|
668 | r_index_in[i] = req_in[i]; |
---|
669 | if( req_in[i] == REQ_NOP ) r_fsm_in[i] = INFSM_REQ_SECOND; |
---|
670 | else r_fsm_in[i] = INFSM_REQ_FIRST; |
---|
671 | } |
---|
672 | else // unicast |
---|
673 | { |
---|
674 | req_in[i] = route(r_fifo_in[i].read().data); |
---|
675 | r_index_in[i] = req_in[i]; |
---|
676 | r_fsm_in[i] = INFSM_REQ; |
---|
677 | } |
---|
678 | } |
---|
679 | else |
---|
680 | { |
---|
681 | req_in[i] = REQ_NOP; |
---|
682 | } |
---|
683 | break; |
---|
684 | } |
---|
685 | case INFSM_REQ: // not a broadcast / waiting output port allocation |
---|
686 | { |
---|
687 | data_in[i] = r_fifo_in[i].read(); |
---|
688 | put_in[i] = r_fifo_in[i].rok(); |
---|
689 | req_in[i] = r_index_in[i]; |
---|
690 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
---|
691 | if ( get_out[r_index_in[i].read()] == i ) // first flit transfered |
---|
692 | { |
---|
693 | if ( r_fifo_in[i].read().eop ) r_fsm_in[i] = INFSM_IDLE; |
---|
694 | else r_fsm_in[i] = INFSM_ALLOC; |
---|
695 | } |
---|
696 | break; |
---|
697 | } |
---|
698 | case INFSM_ALLOC: // not a broadcast / output port allocated |
---|
699 | { |
---|
700 | data_in[i] = r_fifo_in[i].read(); |
---|
701 | put_in[i] = r_fifo_in[i].rok(); |
---|
702 | req_in[i] = REQ_NOP; // no request |
---|
703 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
---|
704 | if ( r_fifo_in[i].read().eop and |
---|
705 | r_fifo_in[i].rok() and |
---|
706 | (get_out[r_index_in[i].read()] == i) ) // last flit transfered |
---|
707 | { |
---|
708 | r_fsm_in[i] = INFSM_IDLE; |
---|
709 | } |
---|
710 | break; |
---|
711 | } |
---|
712 | case INFSM_REQ_FIRST: // broacast / waiting first output port allocation |
---|
713 | { |
---|
714 | data_in[i] = r_buf_in[i]; |
---|
715 | put_in[i] = true; |
---|
716 | req_in[i] = broadcast_route(1, i, r_buf_in[i].data); |
---|
717 | r_index_in[i] = req_in[i]; |
---|
718 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
719 | { |
---|
720 | r_fsm_in[i] = INFSM_REQ_SECOND; |
---|
721 | } |
---|
722 | else |
---|
723 | { |
---|
724 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
725 | { |
---|
726 | r_fsm_in[i] = INFSM_ALLOC_FIRST; |
---|
727 | } |
---|
728 | } |
---|
729 | break; |
---|
730 | } |
---|
731 | case INFSM_ALLOC_FIRST: // broadcast / first output port allocated |
---|
732 | { |
---|
733 | data_in[i] = r_fifo_in[i].read(); |
---|
734 | put_in[i] = r_fifo_in[i].rok(); |
---|
735 | req_in[i] = REQ_NOP; |
---|
736 | if( (get_out[r_index_in[i].read()] == i) |
---|
737 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
738 | { |
---|
739 | if ( not r_fifo_in[i].read().eop ) |
---|
740 | { |
---|
741 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
742 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
743 | } |
---|
744 | r_fsm_in[i] = INFSM_REQ_SECOND; |
---|
745 | } |
---|
746 | break; |
---|
747 | } |
---|
748 | case INFSM_REQ_SECOND: // broacast / waiting second output port allocation |
---|
749 | { |
---|
750 | data_in[i] = r_buf_in[i]; |
---|
751 | put_in[i] = true; |
---|
752 | req_in[i] = broadcast_route(2, i, r_buf_in[i].data); |
---|
753 | r_index_in[i] = req_in[i]; |
---|
754 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
755 | { |
---|
756 | r_fsm_in[i] = INFSM_REQ_THIRD; |
---|
757 | } |
---|
758 | else |
---|
759 | { |
---|
760 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
761 | { |
---|
762 | r_fsm_in[i] = INFSM_ALLOC_SECOND; |
---|
763 | } |
---|
764 | } |
---|
765 | break; |
---|
766 | } |
---|
767 | case INFSM_ALLOC_SECOND: // broadcast / second output port allocated |
---|
768 | { |
---|
769 | data_in[i] = r_fifo_in[i].read(); |
---|
770 | put_in[i] = r_fifo_in[i].rok(); |
---|
771 | req_in[i] = REQ_NOP; |
---|
772 | if( (get_out[r_index_in[i].read()] == i ) |
---|
773 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
774 | { |
---|
775 | if ( not r_fifo_in[i].read().eop ) |
---|
776 | { |
---|
777 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
778 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
779 | } |
---|
780 | r_fsm_in[i] = INFSM_REQ_THIRD; |
---|
781 | } |
---|
782 | break; |
---|
783 | } |
---|
784 | case INFSM_REQ_THIRD: // broacast / waiting third output port allocation |
---|
785 | { |
---|
786 | data_in[i] = r_buf_in[i]; |
---|
787 | put_in[i] = true; |
---|
788 | req_in[i] = broadcast_route(3, i, r_buf_in[i].data); |
---|
789 | r_index_in[i] = req_in[i]; |
---|
790 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
791 | { |
---|
792 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
---|
793 | } |
---|
794 | else |
---|
795 | { |
---|
796 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
797 | { |
---|
798 | r_fsm_in[i] = INFSM_ALLOC_THIRD; |
---|
799 | } |
---|
800 | } |
---|
801 | break; |
---|
802 | } |
---|
803 | case INFSM_ALLOC_THIRD: // broadcast / third output port allocated |
---|
804 | { |
---|
805 | data_in[i] = r_fifo_in[i].read(); |
---|
806 | put_in[i] = r_fifo_in[i].rok(); |
---|
807 | req_in[i] = REQ_NOP; |
---|
808 | if( (get_out[r_index_in[i].read()] == i ) |
---|
809 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
810 | { |
---|
811 | if ( not r_fifo_in[i].read().eop ) |
---|
812 | { |
---|
813 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
814 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
815 | } |
---|
816 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
---|
817 | } |
---|
818 | break; |
---|
819 | } |
---|
820 | case INFSM_REQ_FOURTH: // broacast / waiting fourth output port allocation |
---|
821 | { |
---|
822 | data_in[i] = r_buf_in[i]; |
---|
823 | put_in[i] = true; |
---|
824 | req_in[i] = broadcast_route(4, i, r_buf_in[i].data); |
---|
825 | r_index_in[i] = req_in[i]; |
---|
826 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
827 | { |
---|
828 | fifo_in_read[i] = true; |
---|
829 | r_fsm_in[i] = INFSM_IDLE; |
---|
830 | } |
---|
831 | else |
---|
832 | { |
---|
833 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
834 | { |
---|
835 | r_fsm_in[i] = INFSM_ALLOC_FOURTH; |
---|
836 | } |
---|
837 | } |
---|
838 | break; |
---|
839 | } |
---|
840 | case INFSM_ALLOC_FOURTH: // broadcast / fourth output port allocated |
---|
841 | { |
---|
842 | data_in[i] = r_fifo_in[i].read(); |
---|
843 | put_in[i] = r_fifo_in[i].rok(); |
---|
844 | req_in[i] = REQ_NOP; |
---|
845 | if( (get_out[r_index_in[i].read()] == i ) |
---|
846 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
847 | { |
---|
848 | if ( not r_fifo_in[i].read().eop ) |
---|
849 | { |
---|
850 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
851 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
852 | } |
---|
853 | fifo_in_read[i] = true; |
---|
854 | r_fsm_in[i] = INFSM_IDLE; |
---|
855 | } |
---|
856 | break; |
---|
857 | } |
---|
858 | } // end switch |
---|
859 | } // end for input ports |
---|
860 | |
---|
861 | // loop on the output ports : |
---|
862 | // The r_alloc_out[j] and r_index_out[j] computation |
---|
863 | // implements the round-robin allocation policy. |
---|
864 | // These two registers implement a 10 states FSM. |
---|
865 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
866 | { |
---|
867 | if( not r_alloc_out[j].read() ) // not allocated: possible new allocation |
---|
868 | { |
---|
869 | for( size_t k = r_index_out[j].read() + 1 ; |
---|
870 | k < (r_index_out[j] + 6) ; k++) |
---|
871 | { |
---|
872 | size_t i = k % 5; |
---|
873 | |
---|
874 | if( req_in[i] == j ) |
---|
875 | { |
---|
876 | r_alloc_out[j] = true; |
---|
877 | r_index_out[j] = i; |
---|
878 | break; |
---|
879 | } |
---|
880 | } // end loop on input ports |
---|
881 | } |
---|
882 | else // allocated: possible desallocation |
---|
883 | { |
---|
884 | if ( data_in[r_index_out[j]].eop and |
---|
885 | r_fifo_out[j].wok() and |
---|
886 | put_in[r_index_out[j]] ) |
---|
887 | { |
---|
888 | r_alloc_out[j] = false; |
---|
889 | } |
---|
890 | } |
---|
891 | } // end loop on output ports |
---|
892 | |
---|
893 | // loop on the output ports : |
---|
894 | // The fifo_out_write[j] and fifo_out_wdata[j] computation |
---|
895 | // implements the output port mux. |
---|
896 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
897 | { |
---|
898 | if( r_alloc_out[j] ) // output port allocated |
---|
899 | { |
---|
900 | fifo_out_write[j] = put_in[r_index_out[j]] && |
---|
901 | ((m_disable_mask & (1 << j)) == 0); |
---|
902 | fifo_out_wdata[j] = data_in[r_index_out[j]]; |
---|
903 | } |
---|
904 | } // end loop on the output ports |
---|
905 | |
---|
906 | // FIFOS update |
---|
907 | for(size_t i = 0 ; i < 5 ; i++) |
---|
908 | { |
---|
909 | r_fifo_in[i].update(fifo_in_read[i], |
---|
910 | fifo_in_write[i], |
---|
911 | fifo_in_wdata[i]); |
---|
912 | r_fifo_out[i].update(fifo_out_read[i], |
---|
913 | fifo_out_write[i], |
---|
914 | fifo_out_wdata[i]); |
---|
915 | } |
---|
916 | } // end transition |
---|
917 | |
---|
918 | //////////////////////////////// |
---|
919 | // genMoore |
---|
920 | //////////////////////////////// |
---|
921 | tmpl(void)::genMoore() |
---|
922 | { |
---|
923 | for(size_t i = 0 ; i < 5 ; i++) |
---|
924 | { |
---|
925 | // input ports : READ signals |
---|
926 | p_in[i].read = r_fifo_in[i].wok(); |
---|
927 | |
---|
928 | // output ports : DATA & WRITE signals |
---|
929 | p_out[i].data = r_fifo_out[i].read().data; |
---|
930 | p_out[i].eop = r_fifo_out[i].read().eop; |
---|
931 | p_out[i].write = r_fifo_out[i].rok(); |
---|
932 | } |
---|
933 | } // end genMoore |
---|
934 | |
---|
935 | }} // end namespace |
---|
936 | |
---|
937 | // Local Variables: |
---|
938 | // tab-width: 4 |
---|
939 | // c-basic-offset: 4 |
---|
940 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
941 | // indent-tabs-mode: nil |
---|
942 | // End: |
---|
943 | |
---|
944 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|