1 | /* -*- c++ -*- |
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2 | * |
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3 | * File : dspin_router.cpp |
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4 | * Copyright (c) UPMC, Lip6 |
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5 | * Authors : Alain Greiner, Abbas Sheibanyrad, Ivan Miro, Zhen Zhang |
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6 | * |
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7 | * SOCLIB_LGPL_HEADER_BEGIN |
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8 | * |
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9 | * This file is part of SoCLib, GNU LGPLv2.1. |
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10 | * |
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11 | * SoCLib is free software; you can redistribute it and/or modify it |
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12 | * under the terms of the GNU Lesser General Public License as published |
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13 | * by the Free Software Foundation; version 2.1 of the License. |
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14 | * |
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15 | * SoCLib is distributed in the hope that it will be useful, but |
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16 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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18 | * Lesser General Public License for more details. |
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19 | * |
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20 | * You should have received a copy of the GNU Lesser General Public |
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21 | * License along with SoCLib; if not, write to the Free Software |
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22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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23 | * 02110-1301 USA |
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24 | * |
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25 | * SOCLIB_LGPL_HEADER_END |
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26 | * |
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27 | */ |
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28 | |
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29 | /////////////////////////////////////////////////////////////////////////// |
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30 | // Implementation Note : |
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31 | // The xfirst_route(), broadcast_route() and is_broadcast() functions |
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32 | // defined below are used to decode the DSPIN first flit format: |
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33 | // - In case of a non-broadcast packet : |
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34 | // | X | Y |---------------------------------------|BC | |
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35 | // | x_width | y_width | flit_width - (x_width + y_width + 2) | 0 | |
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36 | // |
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37 | // - In case of a broacast |
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38 | // | XMIN | XMAX | YMIN | YMAX |-------------------|BC | |
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39 | // | 5 | 5 | 5 | 5 | flit_width - 22 | 1 | |
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40 | /////////////////////////////////////////////////////////////////////////// |
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41 | |
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42 | #include "../include/dspin_router.h" |
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43 | #include "dspin_router_config.h" |
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44 | |
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45 | namespace soclib { namespace caba { |
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46 | |
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47 | using namespace soclib::common; |
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48 | using namespace soclib::caba; |
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49 | |
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50 | #define tmpl(x) template<int flit_width> x DspinRouter<flit_width> |
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51 | |
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52 | //////////////////////////////////////////////// |
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53 | // constructor |
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54 | //////////////////////////////////////////////// |
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55 | tmpl(/**/)::DspinRouter( sc_module_name name, |
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56 | const size_t x, |
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57 | const size_t y, |
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58 | const size_t x_width, |
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59 | const size_t y_width, |
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60 | const size_t in_fifo_depth, |
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61 | const size_t out_fifo_depth, |
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62 | const bool broadcast_supported) |
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63 | : soclib::caba::BaseModule(name), |
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64 | |
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65 | p_clk( "p_clk" ), |
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66 | p_resetn( "p_resetn" ), |
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67 | p_in( alloc_elems<DspinInput<flit_width> >("p_in", 5) ), |
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68 | p_out( alloc_elems<DspinOutput<flit_width> >("p_out", 5) ), |
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69 | |
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70 | r_alloc_out( alloc_elems<sc_signal<bool> >("r_alloc_out", 5)), |
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71 | r_index_out( soclib::common::alloc_elems<sc_signal<size_t> >("r_index_out", 5)), |
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72 | r_fsm_in( alloc_elems<sc_signal<int> >("r_fsm_in", 5)), |
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73 | r_index_in( alloc_elems<sc_signal<size_t> >("r_index_in", 5)), |
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74 | |
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75 | m_local_x( x ), |
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76 | m_local_y( y ), |
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77 | m_x_width( x_width ), |
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78 | m_x_shift( flit_width - x_width ), |
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79 | m_x_mask( (0x1 << x_width) - 1 ), |
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80 | m_y_width( y_width ), |
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81 | m_y_shift( flit_width - x_width - y_width ), |
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82 | m_y_mask( (0x1 << y_width) - 1 ), |
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83 | m_broadcast_supported( broadcast_supported ), |
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84 | m_disable_mask( 0 ) |
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85 | { |
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86 | std::cout << " - Building DspinRouter : " << name << std::endl; |
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87 | |
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88 | SC_METHOD (transition); |
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89 | dont_initialize(); |
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90 | sensitive << p_clk.pos(); |
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91 | |
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92 | SC_METHOD (genMoore); |
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93 | dont_initialize(); |
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94 | sensitive << p_clk.neg(); |
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95 | |
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96 | r_fifo_in = (GenericFifo<internal_flit_t>*) |
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97 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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98 | |
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99 | r_fifo_out = (GenericFifo<internal_flit_t>*) |
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100 | malloc(sizeof(GenericFifo<internal_flit_t>) * 5); |
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101 | |
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102 | r_buf_in = (internal_flit_t*) |
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103 | malloc(sizeof(internal_flit_t) * 5); |
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104 | |
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105 | for( size_t i = 0 ; i < 5 ; i++ ) |
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106 | { |
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107 | std::ostringstream stri; |
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108 | stri << "r_in_fifo_" << i; |
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109 | new(&r_fifo_in[i]) |
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110 | GenericFifo<internal_flit_t >(stri.str(), in_fifo_depth); |
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111 | |
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112 | std::ostringstream stro; |
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113 | stro << "r_out_fifo_" << i; |
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114 | new(&r_fifo_out[i]) |
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115 | GenericFifo<internal_flit_t >(stro.str(), out_fifo_depth); |
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116 | } |
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117 | |
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118 | p_recovery_cfg = NULL; |
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119 | } // end constructor |
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120 | |
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121 | /////////////////////////////////////////////////// |
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122 | tmpl(/**/)::~DspinRouter() |
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123 | { |
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124 | if ( p_recovery_cfg != NULL ) delete p_recovery_cfg; |
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125 | } |
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126 | |
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127 | /////////////////////////////////////////////////// |
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128 | tmpl(int)::xfirst_route( size_t xdest, size_t ydest ) |
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129 | { |
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130 | return (xdest < m_local_x ? REQ_WEST : |
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131 | (xdest > m_local_x ? REQ_EAST : |
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132 | (ydest < m_local_y ? REQ_SOUTH : |
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133 | (ydest > m_local_y ? REQ_NORTH : REQ_LOCAL)))); |
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134 | } |
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135 | |
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136 | /////////////////////////////////////////////////// |
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137 | tmpl(void)::bind_recovery_port( sc_core::sc_signal<uint32_t> &s ) |
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138 | { |
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139 | if (p_recovery_cfg == NULL) { |
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140 | p_recovery_cfg = new sc_core::sc_in<uint32_t>; |
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141 | } |
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142 | (*p_recovery_cfg)(s); |
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143 | } |
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144 | |
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145 | /////////////////////////////////////////////////// |
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146 | tmpl(bool)::need_reroute( size_t xdest, size_t ydest, int bhpos ) |
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147 | { |
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148 | size_t xhole, yhole; |
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149 | if (bhpos == BH_N) { |
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150 | xhole = m_local_x; |
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151 | yhole = m_local_y - 1; |
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152 | } |
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153 | else if (bhpos == BH_NW) { |
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154 | xhole = m_local_x + 1; |
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155 | yhole = m_local_y - 1; |
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156 | } |
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157 | else if (bhpos == BH_W) { |
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158 | xhole = m_local_x + 1; |
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159 | yhole = m_local_y; |
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160 | } |
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161 | else if (bhpos == BH_SW) { |
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162 | xhole = m_local_x + 1; |
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163 | yhole = m_local_y + 1; |
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164 | } |
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165 | else if (bhpos == BH_S) { |
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166 | xhole = m_local_x; |
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167 | yhole = m_local_y + 1; |
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168 | } |
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169 | else if (bhpos == BH_SE) { |
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170 | xhole = m_local_x - 1; |
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171 | yhole = m_local_y + 1; |
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172 | } |
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173 | else if (bhpos == BH_E) { |
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174 | xhole = m_local_x - 1; |
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175 | yhole = m_local_y; |
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176 | } |
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177 | else if (bhpos == BH_NE) { |
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178 | xhole = m_local_x - 1; |
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179 | yhole = m_local_y - 1; |
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180 | } |
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181 | else { |
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182 | return false; |
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183 | } |
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184 | |
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185 | return ((xdest == xhole) && (ydest == yhole)); |
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186 | } |
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187 | |
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188 | /////////////////////////////////////////////////// |
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189 | tmpl(int)::recovery_route( size_t xdest, size_t ydest ) |
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190 | { |
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191 | int bhpos = p_recovery_cfg->read() & 0xF; |
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192 | |
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193 | // reroute the request if its destination is the blackhole (this is to |
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194 | // implement the segment recovery mechanism) |
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195 | if (need_reroute(xdest, ydest, bhpos)) { |
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196 | int recovery_direction = (p_recovery_cfg->read() >> 4) & 0xF; |
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197 | return recovery_direction; |
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198 | } |
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199 | |
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200 | if ( xdest > m_local_x ) { |
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201 | if ( (bhpos == BH_NE) || (bhpos == BH_E) || (bhpos == BH_SE) || |
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202 | (bhpos == BH_S) ) { |
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203 | return REQ_EAST; |
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204 | } |
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205 | else if ( bhpos == BH_N ) { |
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206 | if ( (m_local_y == 1) || (m_local_x == 0) || (ydest >= m_local_y) || |
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207 | (xdest > (m_local_x + 1)) ) { |
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208 | return REQ_EAST; |
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209 | } |
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210 | else { |
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211 | return REQ_WEST; |
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212 | } |
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213 | } |
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214 | else if ( bhpos == BH_NW ) { |
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215 | if ( (m_local_y == 1) || (ydest >= m_local_y) || |
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216 | (xdest > (m_local_x + 2)) ) { |
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217 | return REQ_EAST; |
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218 | } |
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219 | else { |
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220 | return REQ_SOUTH; |
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221 | } |
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222 | } |
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223 | else if ( bhpos == BH_W ) { |
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224 | if ( (m_local_y == 0) || (ydest > m_local_y)) { |
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225 | return REQ_NORTH; |
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226 | } |
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227 | else { |
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228 | return REQ_SOUTH; |
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229 | } |
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230 | } |
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231 | else if ( bhpos == BH_SW ) { |
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232 | if ( (ydest <= m_local_y) || (xdest > (m_local_x + 1)) ) { |
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233 | return REQ_EAST; |
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234 | } |
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235 | else { |
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236 | return REQ_NORTH; |
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237 | } |
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238 | } |
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239 | std::cout << "error: unexpected condition in function " |
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240 | << __FILE__ << ":" << __func__ << " +" << __LINE__ |
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241 | << std::endl; |
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242 | exit(1); |
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243 | } // end if (xdest > m_local_x) |
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244 | else if ( xdest < m_local_x ) { |
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245 | if ( (bhpos == BH_N) || (bhpos == BH_NW) || (bhpos == BH_W) || |
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246 | (bhpos == BH_SW) || (bhpos == BH_S) ) { |
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247 | return REQ_WEST; |
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248 | } |
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249 | else if ( bhpos == BH_NE ) { |
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250 | if ( (xdest < (m_local_x - 1)) || (ydest >= m_local_y) ) { |
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251 | return REQ_WEST; |
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252 | } |
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253 | else { |
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254 | return REQ_SOUTH; |
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255 | } |
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256 | } |
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257 | else if ( bhpos == BH_SE ) { |
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258 | if ( (m_local_x == 1) && (ydest > (m_local_y + 1)) ) { |
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259 | return REQ_NORTH; |
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260 | } |
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261 | else { |
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262 | return REQ_WEST; |
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263 | } |
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264 | } |
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265 | else if ( bhpos == BH_E ) { |
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266 | if ( (m_local_y == 0) || |
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267 | ((m_local_x == 1) && (ydest > m_local_y)) ) { |
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268 | return REQ_NORTH; |
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269 | } |
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270 | else { |
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271 | return REQ_SOUTH; |
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272 | } |
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273 | } |
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274 | std::cout << "error: unexpected condition in function " |
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275 | << __FILE__ << ":" << __func__ << " +" << __LINE__ |
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276 | << std::endl; |
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277 | exit(1); |
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278 | } // end if (xdest < m_local_x) |
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279 | else if ( ydest > m_local_y ) { |
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280 | if ( bhpos != BH_S ) { |
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281 | return REQ_NORTH; |
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282 | } |
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283 | else if ( m_local_x != 0 ) { |
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284 | return REQ_WEST; |
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285 | } |
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286 | else { |
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287 | return REQ_EAST; |
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288 | } |
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289 | } // end if (ydest > m_local_y) |
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290 | else if ( ydest < m_local_y ) { |
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291 | if ( bhpos != BH_N ) { |
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292 | return REQ_SOUTH; |
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293 | } |
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294 | else if ( m_local_x != 0) { |
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295 | return REQ_WEST; |
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296 | } |
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297 | else { |
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298 | return REQ_EAST; |
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299 | } |
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300 | } // end if (ydest < m_local_y) |
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301 | return REQ_LOCAL; |
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302 | } |
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303 | |
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304 | /////////////////////////////////////////////////// |
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305 | tmpl(int)::route( sc_uint<flit_width> data ) |
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306 | { |
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307 | size_t xdest = (size_t)(data >> m_x_shift) & m_x_mask; |
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308 | size_t ydest = (size_t)(data >> m_y_shift) & m_y_mask; |
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309 | if ( p_recovery_cfg != NULL ) |
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310 | { |
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311 | if ( (p_recovery_cfg->read() & 0xF) != BH_NONE ) |
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312 | { |
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313 | return recovery_route(xdest, ydest); |
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314 | } |
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315 | } |
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316 | return xfirst_route(xdest, ydest); |
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317 | } |
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318 | |
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319 | ////////////////////////////////////////////////////////////////////////// |
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320 | tmpl(int)::broadcast_route(int step, int source, sc_uint<flit_width> data) |
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321 | { |
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322 | int sel = REQ_NOP; |
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323 | size_t xmin = (data >> (flit_width - 5 )) & 0x1F; |
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324 | size_t xmax = (data >> (flit_width - 10)) & 0x1F; |
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325 | size_t ymin = (data >> (flit_width - 15)) & 0x1F; |
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326 | size_t ymax = (data >> (flit_width - 20)) & 0x1F; |
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327 | |
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328 | switch(source) { |
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329 | case REQ_LOCAL : |
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330 | if ( step == 1 ) sel = REQ_NORTH; |
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331 | else if ( step == 2 ) sel = REQ_SOUTH; |
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332 | else if ( step == 3 ) sel = REQ_EAST; |
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333 | else if ( step == 4 ) sel = REQ_WEST; |
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334 | break; |
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335 | case REQ_NORTH : |
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336 | if ( step == 1 ) sel = REQ_SOUTH; |
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337 | else if ( step == 2 ) sel = REQ_LOCAL; |
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338 | else if ( step == 3 ) sel = REQ_NOP; |
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339 | else if ( step == 4 ) sel = REQ_NOP; |
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340 | break; |
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341 | case REQ_SOUTH : |
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342 | if ( step == 1 ) sel = REQ_NORTH; |
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343 | else if ( step == 2 ) sel = REQ_LOCAL; |
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344 | else if ( step == 3 ) sel = REQ_NOP; |
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345 | else if ( step == 4 ) sel = REQ_NOP; |
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346 | break; |
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347 | case REQ_EAST : |
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348 | if ( step == 1 ) sel = REQ_WEST; |
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349 | else if ( step == 2 ) sel = REQ_NORTH; |
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350 | else if ( step == 3 ) sel = REQ_SOUTH; |
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351 | else if ( step == 4 ) sel = REQ_LOCAL; |
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352 | break; |
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353 | case REQ_WEST : |
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354 | if ( step == 1 ) sel = REQ_EAST; |
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355 | else if ( step == 2 ) sel = REQ_NORTH; |
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356 | else if ( step == 3 ) sel = REQ_SOUTH; |
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357 | else if ( step == 4 ) sel = REQ_LOCAL; |
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358 | break; |
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359 | } |
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360 | if ( (sel == REQ_NORTH) && !(m_local_y < ymax) ) sel = REQ_NOP; |
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361 | else if ( (sel == REQ_SOUTH) && !(m_local_y > ymin) ) sel = REQ_NOP; |
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362 | else if ( (sel == REQ_EAST ) && !(m_local_x < xmax) ) sel = REQ_NOP; |
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363 | else if ( (sel == REQ_WEST ) && !(m_local_x > xmin) ) sel = REQ_NOP; |
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364 | |
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365 | return sel; |
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366 | } |
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367 | |
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368 | ///////////////////////////////////////////////////////// |
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369 | tmpl(inline bool)::is_broadcast(sc_uint<flit_width> data) |
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370 | { |
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371 | return ( (data & 0x1) != 0); |
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372 | } |
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373 | |
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374 | ///////////////////////// |
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375 | tmpl(void)::print_trace() |
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376 | { |
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377 | const char* port_name[] = |
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378 | { |
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379 | "N", |
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380 | "S", |
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381 | "E", |
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382 | "W", |
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383 | "L" |
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384 | }; |
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385 | |
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386 | const char* infsm_str[] = |
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387 | { |
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388 | "IDLE", |
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389 | "REQ", |
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390 | "ALLOC", |
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391 | "REQ_FIRST", |
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392 | "ALLOC_FIRST", |
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393 | "REQ_SECOND", |
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394 | "ALLOC_SECOND", |
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395 | "REQ_THIRD", |
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396 | "ALLOC_THIRD", |
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397 | "REQ_FOURTH", |
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398 | "ALLOC_FOURTH" |
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399 | }; |
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400 | |
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401 | std::cout << "DSPIN_ROUTER " << name(); |
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402 | |
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403 | for( size_t i = 0 ; i < 5 ; i++) // loop on input ports |
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404 | { |
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405 | std::cout << " / infsm[" << port_name[i] << "] " |
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406 | << infsm_str[r_fsm_in[i].read()]; |
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407 | } |
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408 | |
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409 | for ( size_t out=0 ; out<5 ; out++) // loop on output ports |
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410 | { |
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411 | if ( r_alloc_out[out].read() ) |
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412 | { |
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413 | int in = r_index_out[out]; |
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414 | std::cout << " / " << port_name[in] << " -> " << port_name[out] ; |
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415 | } |
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416 | } |
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417 | std::cout << std::endl; |
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418 | } |
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419 | |
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420 | //////////////////////// |
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421 | tmpl(void)::transition() |
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422 | { |
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423 | // Long wires connecting input and output ports |
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424 | size_t req_in[5]; // input ports -> output ports |
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425 | size_t get_out[5]; // output ports -> input ports |
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426 | bool put_in[5]; // input ports -> output ports |
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427 | internal_flit_t data_in[5]; // input ports -> output ports |
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428 | |
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429 | // control signals for the input fifos |
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430 | bool fifo_in_write[5]; |
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431 | bool fifo_in_read[5]; |
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432 | internal_flit_t fifo_in_wdata[5]; |
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433 | |
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434 | // control signals for the output fifos |
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435 | bool fifo_out_write[5]; |
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436 | bool fifo_out_read[5]; |
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437 | internal_flit_t fifo_out_wdata[5]; |
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438 | |
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439 | // Reset |
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440 | if ( p_resetn == false ) |
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441 | { |
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442 | for(size_t i = 0 ; i < 5 ; i++) |
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443 | { |
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444 | r_alloc_out[i] = false; |
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445 | r_index_out[i] = 0; |
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446 | r_index_in[i] = 0; |
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447 | r_fsm_in[i] = INFSM_IDLE; |
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448 | r_fifo_in[i].init(); |
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449 | r_fifo_out[i].init(); |
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450 | } |
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451 | return; |
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452 | } |
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453 | |
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454 | // fifos signals default values |
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455 | for(size_t i = 0 ; i < 5 ; i++) |
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456 | { |
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457 | fifo_in_read[i] = false; |
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458 | |
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459 | // do not write into the FIFO of disabled interfaces |
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460 | fifo_in_write[i] = p_in[i].write.read() && |
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461 | ((m_disable_mask & (1 << i)) == 0); |
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462 | |
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463 | fifo_in_wdata[i].data = p_in[i].data.read(); |
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464 | fifo_in_wdata[i].eop = p_in[i].eop.read(); |
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465 | |
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466 | fifo_out_read[i] = p_out[i].read.read(); |
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467 | fifo_out_write[i] = false; |
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468 | } |
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469 | |
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470 | // loop on the output ports: |
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471 | // compute get_out[j] depending on the output port state |
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472 | // and combining fifo_out[j].wok and r_alloc_out[j] |
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473 | for ( size_t j = 0 ; j < 5 ; j++ ) |
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474 | { |
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475 | if( r_alloc_out[j].read() and (r_fifo_out[j].wok()) ) |
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476 | { |
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477 | get_out[j] = r_index_out[j].read(); |
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478 | } |
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479 | else |
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480 | { |
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481 | get_out[j] = 0xFFFFFFFF; |
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482 | } |
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483 | } |
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484 | |
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485 | // loop on the input ports : |
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486 | // The port state is defined by r_fsm_in[i], r_index_in[i] & r_buf_in[i] |
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487 | // The req_in[i] computation implements the X-FIRST algorithm. |
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488 | // data_in[i], put_in[i] and req_in[i] depend on the input port state. |
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489 | // The fifo_in_read[i] is computed further... |
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490 | |
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491 | for ( size_t i = 0 ; i < 5 ; i++ ) |
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492 | { |
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493 | switch ( r_fsm_in[i].read() ) |
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494 | { |
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495 | case INFSM_IDLE: // no output port allocated |
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496 | { |
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497 | put_in[i] = false; |
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498 | |
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499 | if ( r_fifo_in[i].rok() ) // packet available in input fifo |
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500 | { |
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501 | if ( is_broadcast( r_fifo_in[i].read().data ) and |
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502 | m_broadcast_supported ) // broadcast |
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503 | { |
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504 | fifo_in_read[i] = true; |
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505 | req_in[i] = broadcast_route(1, i, r_fifo_in[i].read().data); |
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506 | r_buf_in[i] = r_fifo_in[i].read(); |
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507 | r_index_in[i] = req_in[i]; |
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508 | if( req_in[i] == REQ_NOP ) r_fsm_in[i] = INFSM_REQ_SECOND; |
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509 | else r_fsm_in[i] = INFSM_REQ_FIRST; |
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510 | } |
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511 | else // unicast |
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512 | { |
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513 | req_in[i] = route(r_fifo_in[i].read().data); |
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514 | r_index_in[i] = req_in[i]; |
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515 | r_fsm_in[i] = INFSM_REQ; |
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516 | } |
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517 | } |
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518 | else |
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519 | { |
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520 | req_in[i] = REQ_NOP; |
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521 | } |
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522 | break; |
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523 | } |
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524 | case INFSM_REQ: // not a broadcast / waiting output port allocation |
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525 | { |
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526 | data_in[i] = r_fifo_in[i].read(); |
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527 | put_in[i] = r_fifo_in[i].rok(); |
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528 | req_in[i] = r_index_in[i]; |
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529 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
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530 | if ( get_out[r_index_in[i].read()] == i ) // first flit transfered |
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531 | { |
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532 | if ( r_fifo_in[i].read().eop ) r_fsm_in[i] = INFSM_IDLE; |
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533 | else r_fsm_in[i] = INFSM_ALLOC; |
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534 | } |
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535 | break; |
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536 | } |
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537 | case INFSM_ALLOC: // not a broadcast / output port allocated |
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538 | { |
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539 | data_in[i] = r_fifo_in[i].read(); |
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540 | put_in[i] = r_fifo_in[i].rok(); |
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541 | req_in[i] = REQ_NOP; // no request |
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542 | fifo_in_read[i] = (get_out[r_index_in[i].read()] == i); |
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543 | if ( r_fifo_in[i].read().eop and |
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544 | r_fifo_in[i].rok() and |
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545 | (get_out[r_index_in[i].read()] == i) ) // last flit transfered |
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546 | { |
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547 | r_fsm_in[i] = INFSM_IDLE; |
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548 | } |
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549 | break; |
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550 | } |
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551 | case INFSM_REQ_FIRST: // broacast / waiting first output port allocation |
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552 | { |
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553 | data_in[i] = r_buf_in[i]; |
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554 | put_in[i] = true; |
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555 | req_in[i] = broadcast_route(1, i, r_buf_in[i].data); |
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556 | r_index_in[i] = req_in[i]; |
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557 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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558 | { |
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559 | r_fsm_in[i] = INFSM_REQ_SECOND; |
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560 | } |
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561 | else |
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562 | { |
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563 | if( get_out[req_in[i]] == i ) // header flit transfered |
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564 | { |
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565 | r_fsm_in[i] = INFSM_ALLOC_FIRST; |
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566 | } |
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567 | } |
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568 | break; |
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569 | } |
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570 | case INFSM_ALLOC_FIRST: // broadcast / first output port allocated |
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571 | { |
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572 | data_in[i] = r_fifo_in[i].read(); |
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573 | put_in[i] = r_fifo_in[i].rok(); |
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574 | req_in[i] = REQ_NOP; |
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575 | if( (get_out[r_index_in[i].read()] == i) |
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576 | and r_fifo_in[i].rok() ) // data flit transfered |
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577 | { |
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578 | if ( not r_fifo_in[i].read().eop ) |
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579 | { |
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580 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
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581 | << " : broadcast packet must be 2 flits" << std::endl; |
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582 | } |
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583 | r_fsm_in[i] = INFSM_REQ_SECOND; |
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584 | } |
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585 | break; |
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586 | } |
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587 | case INFSM_REQ_SECOND: // broacast / waiting second output port allocation |
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588 | { |
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589 | data_in[i] = r_buf_in[i]; |
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590 | put_in[i] = true; |
---|
591 | req_in[i] = broadcast_route(2, i, r_buf_in[i].data); |
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592 | r_index_in[i] = req_in[i]; |
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593 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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594 | { |
---|
595 | r_fsm_in[i] = INFSM_REQ_THIRD; |
---|
596 | } |
---|
597 | else |
---|
598 | { |
---|
599 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
600 | { |
---|
601 | r_fsm_in[i] = INFSM_ALLOC_SECOND; |
---|
602 | } |
---|
603 | } |
---|
604 | break; |
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605 | } |
---|
606 | case INFSM_ALLOC_SECOND: // broadcast / second output port allocated |
---|
607 | { |
---|
608 | data_in[i] = r_fifo_in[i].read(); |
---|
609 | put_in[i] = r_fifo_in[i].rok(); |
---|
610 | req_in[i] = REQ_NOP; |
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611 | if( (get_out[r_index_in[i].read()] == i ) |
---|
612 | and r_fifo_in[i].rok() ) // data flit transfered |
---|
613 | { |
---|
614 | if ( not r_fifo_in[i].read().eop ) |
---|
615 | { |
---|
616 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
---|
617 | << " : broadcast packet must be 2 flits" << std::endl; |
---|
618 | } |
---|
619 | r_fsm_in[i] = INFSM_REQ_THIRD; |
---|
620 | } |
---|
621 | break; |
---|
622 | } |
---|
623 | case INFSM_REQ_THIRD: // broacast / waiting third output port allocation |
---|
624 | { |
---|
625 | data_in[i] = r_buf_in[i]; |
---|
626 | put_in[i] = true; |
---|
627 | req_in[i] = broadcast_route(3, i, r_buf_in[i].data); |
---|
628 | r_index_in[i] = req_in[i]; |
---|
629 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
---|
630 | { |
---|
631 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
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632 | } |
---|
633 | else |
---|
634 | { |
---|
635 | if( get_out[req_in[i]] == i ) // header flit transfered |
---|
636 | { |
---|
637 | r_fsm_in[i] = INFSM_ALLOC_THIRD; |
---|
638 | } |
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639 | } |
---|
640 | break; |
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641 | } |
---|
642 | case INFSM_ALLOC_THIRD: // broadcast / third output port allocated |
---|
643 | { |
---|
644 | data_in[i] = r_fifo_in[i].read(); |
---|
645 | put_in[i] = r_fifo_in[i].rok(); |
---|
646 | req_in[i] = REQ_NOP; |
---|
647 | if( (get_out[r_index_in[i].read()] == i ) |
---|
648 | and r_fifo_in[i].rok() ) // data flit transfered |
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649 | { |
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650 | if ( not r_fifo_in[i].read().eop ) |
---|
651 | { |
---|
652 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
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653 | << " : broadcast packet must be 2 flits" << std::endl; |
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654 | } |
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655 | r_fsm_in[i] = INFSM_REQ_FOURTH; |
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656 | } |
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657 | break; |
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658 | } |
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659 | case INFSM_REQ_FOURTH: // broacast / waiting fourth output port allocation |
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660 | { |
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661 | data_in[i] = r_buf_in[i]; |
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662 | put_in[i] = true; |
---|
663 | req_in[i] = broadcast_route(4, i, r_buf_in[i].data); |
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664 | r_index_in[i] = req_in[i]; |
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665 | if ( req_in[i] == REQ_NOP ) // no transfer for this step |
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666 | { |
---|
667 | fifo_in_read[i] = true; |
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668 | r_fsm_in[i] = INFSM_IDLE; |
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669 | } |
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670 | else |
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671 | { |
---|
672 | if( get_out[req_in[i]] == i ) // header flit transfered |
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673 | { |
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674 | r_fsm_in[i] = INFSM_ALLOC_FOURTH; |
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675 | } |
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676 | } |
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677 | break; |
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678 | } |
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679 | case INFSM_ALLOC_FOURTH: // broadcast / fourth output port allocated |
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680 | { |
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681 | data_in[i] = r_fifo_in[i].read(); |
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682 | put_in[i] = r_fifo_in[i].rok(); |
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683 | req_in[i] = REQ_NOP; |
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684 | if( (get_out[r_index_in[i].read()] == i ) |
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685 | and r_fifo_in[i].rok() ) // data flit transfered |
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686 | { |
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687 | if ( not r_fifo_in[i].read().eop ) |
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688 | { |
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689 | std::cout << "ERROR in DSPIN_ROUTER " << name() |
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690 | << " : broadcast packet must be 2 flits" << std::endl; |
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691 | } |
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692 | fifo_in_read[i] = true; |
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693 | r_fsm_in[i] = INFSM_IDLE; |
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694 | } |
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695 | break; |
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696 | } |
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697 | } // end switch |
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698 | } // end for input ports |
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699 | |
---|
700 | // loop on the output ports : |
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701 | // The r_alloc_out[j] and r_index_out[j] computation |
---|
702 | // implements the round-robin allocation policy. |
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703 | // These two registers implement a 10 states FSM. |
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704 | for( size_t j = 0 ; j < 5 ; j++ ) |
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705 | { |
---|
706 | if( not r_alloc_out[j].read() ) // not allocated: possible new allocation |
---|
707 | { |
---|
708 | for( size_t k = r_index_out[j].read() + 1 ; |
---|
709 | k < (r_index_out[j] + 6) ; k++) |
---|
710 | { |
---|
711 | size_t i = k % 5; |
---|
712 | |
---|
713 | if( req_in[i] == j ) |
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714 | { |
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715 | r_alloc_out[j] = true; |
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716 | r_index_out[j] = i; |
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717 | break; |
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718 | } |
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719 | } // end loop on input ports |
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720 | } |
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721 | else // allocated: possible desallocation |
---|
722 | { |
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723 | if ( data_in[r_index_out[j]].eop and |
---|
724 | r_fifo_out[j].wok() and |
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725 | put_in[r_index_out[j]] ) |
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726 | { |
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727 | r_alloc_out[j] = false; |
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728 | } |
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729 | } |
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730 | } // end loop on output ports |
---|
731 | |
---|
732 | // loop on the output ports : |
---|
733 | // The fifo_out_write[j] and fifo_out_wdata[j] computation |
---|
734 | // implements the output port mux. |
---|
735 | for( size_t j = 0 ; j < 5 ; j++ ) |
---|
736 | { |
---|
737 | if( r_alloc_out[j] ) // output port allocated |
---|
738 | { |
---|
739 | fifo_out_write[j] = put_in[r_index_out[j]] && |
---|
740 | ((m_disable_mask & (1 << j)) == 0); |
---|
741 | fifo_out_wdata[j] = data_in[r_index_out[j]]; |
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742 | } |
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743 | } // end loop on the output ports |
---|
744 | |
---|
745 | // FIFOS update |
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746 | for(size_t i = 0 ; i < 5 ; i++) |
---|
747 | { |
---|
748 | r_fifo_in[i].update(fifo_in_read[i], |
---|
749 | fifo_in_write[i], |
---|
750 | fifo_in_wdata[i]); |
---|
751 | r_fifo_out[i].update(fifo_out_read[i], |
---|
752 | fifo_out_write[i], |
---|
753 | fifo_out_wdata[i]); |
---|
754 | } |
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755 | } // end transition |
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756 | |
---|
757 | //////////////////////////////// |
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758 | // genMoore |
---|
759 | //////////////////////////////// |
---|
760 | tmpl(void)::genMoore() |
---|
761 | { |
---|
762 | for(size_t i = 0 ; i < 5 ; i++) |
---|
763 | { |
---|
764 | // input ports : READ signals |
---|
765 | p_in[i].read = r_fifo_in[i].wok(); |
---|
766 | |
---|
767 | // output ports : DATA & WRITE signals |
---|
768 | p_out[i].data = r_fifo_out[i].read().data; |
---|
769 | p_out[i].eop = r_fifo_out[i].read().eop; |
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770 | p_out[i].write = r_fifo_out[i].rok(); |
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771 | } |
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772 | } // end genMoore |
---|
773 | |
---|
774 | }} // end namespace |
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775 | |
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776 | // Local Variables: |
---|
777 | // tab-width: 4 |
---|
778 | // c-basic-offset: 4 |
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779 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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780 | // indent-tabs-mode: nil |
---|
781 | // End: |
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782 | |
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783 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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