1 | /* -*- c++ -*- |
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2 | * |
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3 | * SOCLIB_LGPL_HEADER_BEGIN |
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4 | * |
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5 | * This file is part of SoCLib, GNU LGPLv2.1. |
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6 | * |
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7 | * SoCLib is free software; you can redistribute it and/or modify it |
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8 | * under the terms of the GNU Lesser General Public License as published |
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9 | * by the Free Software Foundation; version 2.1 of the License. |
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10 | * |
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11 | * SoCLib is distributed in the hope that it will be useful, but |
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12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 | * Lesser General Public License for more details. |
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15 | * |
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16 | * You should have received a copy of the GNU Lesser General Public |
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17 | * License along with SoCLib; if not, write to the Free Software |
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18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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19 | * 02110-1301 USA |
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20 | * |
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21 | * SOCLIB_LGPL_HEADER_END |
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22 | * |
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23 | * Copyright (c) UPMC, Lip6 |
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24 | * Nicolas Pouillon <nipo@ssji.net>, 2009 |
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25 | */ |
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26 | |
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27 | #include <strings.h> |
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28 | |
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29 | #include "xicu.h" |
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30 | #include "register.h" |
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31 | #include "arithmetics.h" |
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32 | #include "alloc_elems.h" |
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33 | #include "../include/vci_xicu.h" |
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34 | |
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35 | namespace soclib { |
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36 | namespace caba { |
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37 | |
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38 | using namespace soclib; |
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39 | |
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40 | #define tmpl(t) template<typename vci_param> t VciXicu<vci_param> |
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41 | |
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42 | #ifdef SOCLIB_MODULE_DEBUG |
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43 | #define CHECK_BOUNDS(x) \ |
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44 | do { \ |
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45 | if ( idx >= (m_##x##_count) ) { \ |
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46 | std::cout << name() << " error: " #x " index " << idx \ |
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47 | << " out of bounds (" \ |
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48 | << m_##x##_count << ")" \ |
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49 | << std::endl; \ |
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50 | return false; \ |
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51 | } \ |
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52 | } while(0) |
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53 | #else |
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54 | #define CHECK_BOUNDS(x) do { if ( idx >= (m_##x##_count) ) return false; } while(0) |
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55 | #endif |
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56 | |
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57 | ////////////////////////////////////////////////////// |
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58 | tmpl(bool)::on_write( int seg, |
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59 | typename vci_param::addr_t addr, |
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60 | typename vci_param::data_t data, |
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61 | int be) |
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62 | { |
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63 | size_t cell = (size_t)addr / vci_param::B; |
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64 | size_t idx = cell & 0x1f; |
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65 | size_t func = (cell >> 5) & 0x1f; |
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66 | |
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67 | if ( be != 0xf ) |
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68 | return false; |
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69 | |
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70 | switch (func) |
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71 | { |
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72 | case XICU_WTI_REG: |
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73 | CHECK_BOUNDS(wti); |
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74 | if (idx == m_faulty_wti_reg) { |
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75 | data &= m_faulty_wti_msk; |
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76 | } |
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77 | r_wti_pending |= 1<<idx; |
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78 | r_wti_reg[idx] = data; |
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79 | |
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80 | #if SOCLIB_MODULE_DEBUG |
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81 | std::cout << "[" << name() << "] Write WTI_REG[" << std::dec << idx << "] = " |
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82 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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83 | #endif |
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84 | return true; |
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85 | |
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86 | case XICU_PTI_PER: |
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87 | CHECK_BOUNDS(pti); |
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88 | r_pti_per[idx] = data; |
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89 | if ( !data ) |
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90 | { |
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91 | r_pti_pending &= ~(1<<idx); |
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92 | r_pti_val[idx] = 0; |
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93 | } |
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94 | else if (r_pti_val[idx] == 0) |
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95 | { |
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96 | r_pti_val[idx] = data; |
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97 | } |
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98 | |
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99 | #if SOCLIB_MODULE_DEBUG |
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100 | std::cout << "[" << name() << "] Write PTI_PER[" << std::dec << idx << "] = " |
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101 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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102 | #endif |
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103 | return true; |
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104 | |
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105 | case XICU_PTI_VAL: |
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106 | CHECK_BOUNDS(pti); |
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107 | r_pti_val[idx] = data; |
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108 | |
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109 | #if SOCLIB_MODULE_DEBUG |
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110 | std::cout << "[" << name() << "] Write PTI_VAL[" << std::dec << idx << "] = " |
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111 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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112 | #endif |
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113 | return true; |
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114 | |
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115 | case XICU_MSK_PTI: |
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116 | CHECK_BOUNDS(irq); |
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117 | r_msk_pti[idx] = data; |
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118 | |
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119 | #if SOCLIB_MODULE_DEBUG |
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120 | std::cout << "[" << name() << "] Write MASK_PTI[" << std::dec << idx << "] = " |
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121 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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122 | #endif |
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123 | return true; |
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124 | |
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125 | case XICU_MSK_PTI_ENABLE: |
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126 | CHECK_BOUNDS(irq); |
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127 | r_msk_pti[idx] |= data; |
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128 | |
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129 | #if SOCLIB_MODULE_DEBUG |
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130 | std::cout << "[" << name() << "] Write PTI_ENABLE[" << std::dec << idx << "] = " |
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131 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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132 | #endif |
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133 | return true; |
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134 | |
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135 | case XICU_MSK_PTI_DISABLE: |
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136 | CHECK_BOUNDS(irq); |
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137 | r_msk_pti[idx] &= ~data; |
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138 | |
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139 | #if SOCLIB_MODULE_DEBUG |
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140 | std::cout << "[" << name() << "] Write PTI_DISABLE[" << std::dec << idx << "] = " |
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141 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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142 | #endif |
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143 | return true; |
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144 | |
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145 | case XICU_MSK_HWI: |
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146 | CHECK_BOUNDS(irq); |
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147 | r_msk_hwi[idx] = data; |
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148 | |
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149 | #if SOCLIB_MODULE_DEBUG |
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150 | std::cout << "[" << name() << "] Write MSK_HWI[" << std::dec << idx << "] = " |
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151 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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152 | #endif |
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153 | return true; |
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154 | |
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155 | case XICU_MSK_HWI_ENABLE: |
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156 | CHECK_BOUNDS(irq); |
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157 | r_msk_hwi[idx] |= data; |
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158 | |
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159 | #if SOCLIB_MODULE_DEBUG |
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160 | std::cout << "[" << name() << "] Write HWI_ENABLE[" << std::dec << idx << "] = " |
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161 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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162 | #endif |
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163 | return true; |
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164 | |
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165 | case XICU_MSK_HWI_DISABLE: |
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166 | CHECK_BOUNDS(irq); |
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167 | r_msk_hwi[idx] &= ~data; |
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168 | |
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169 | #if SOCLIB_MODULE_DEBUG |
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170 | std::cout << "[" << name() << "] Write HWI_DISABLE[" << std::dec << idx << "] = " |
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171 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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172 | #endif |
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173 | return true; |
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174 | |
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175 | case XICU_MSK_WTI: |
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176 | CHECK_BOUNDS(irq); |
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177 | r_msk_wti[idx] = data; |
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178 | |
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179 | #if SOCLIB_MODULE_DEBUG |
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180 | std::cout << "[" << name() << "] Write MSK_WTI[" << std::dec << idx << "] = " |
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181 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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182 | #endif |
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183 | return true; |
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184 | |
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185 | case XICU_MSK_WTI_ENABLE: |
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186 | CHECK_BOUNDS(irq); |
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187 | r_msk_wti[idx] |= data; |
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188 | |
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189 | #if SOCLIB_MODULE_DEBUG |
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190 | std::cout << "[" << name() << "] Write WTI_ENABLE[" << std::dec << idx << "] = " |
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191 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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192 | #endif |
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193 | return true; |
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194 | |
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195 | case XICU_MSK_WTI_DISABLE: |
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196 | CHECK_BOUNDS(irq); |
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197 | r_msk_wti[idx] &= ~data; |
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198 | |
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199 | #if SOCLIB_MODULE_DEBUG |
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200 | std::cout << "[" << name() << "] Write WTI_DISABLE[" << std::dec << idx << "] = " |
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201 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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202 | #endif |
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203 | return true; |
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204 | |
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205 | case XICU_CFG_REG: |
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206 | CHECK_BOUNDS(cfg); |
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207 | r_cfg_reg[idx] = data; |
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208 | |
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209 | #if SOCLIB_MODULE_DEBUG |
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210 | std::cout << "[" << name() << "] Write CFG_REG[" << std::dec << idx << "] = " |
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211 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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212 | #endif |
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213 | return true; |
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214 | } |
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215 | return false; |
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216 | } // end on_write() |
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217 | |
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218 | ///////////////////////////////////////////////////// |
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219 | tmpl(bool)::on_read( int seg, |
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220 | typename vci_param::addr_t addr, |
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221 | typename vci_param::data_t &data) |
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222 | { |
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223 | size_t cell = (size_t)addr / vci_param::B; |
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224 | size_t idx = cell & 0x1f; |
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225 | size_t func = (cell >> 5) & 0x1f; |
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226 | |
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227 | switch (func) |
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228 | { |
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229 | case XICU_WTI_REG: |
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230 | CHECK_BOUNDS(wti); |
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231 | data = r_wti_reg[idx]; |
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232 | r_wti_pending &= ~(1<<idx); |
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233 | |
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234 | #if SOCLIB_MODULE_DEBUG |
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235 | std::cout << "[" << name() << "] Read XICU_WTI_REG[" << std::dec << idx << "] = " |
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236 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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237 | #endif |
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238 | return true; |
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239 | |
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240 | case XICU_PTI_PER: |
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241 | CHECK_BOUNDS(pti); |
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242 | data = r_pti_per[idx]; |
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243 | |
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244 | #if SOCLIB_MODULE_DEBUG |
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245 | std::cout << "[" << name() << "] Read XICU_PTI_PER[" << std::dec << idx << "] = " |
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246 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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247 | #endif |
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248 | return true; |
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249 | |
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250 | case XICU_PTI_VAL: |
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251 | CHECK_BOUNDS(pti); |
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252 | data = r_pti_val[idx]; |
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253 | |
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254 | #if SOCLIB_MODULE_DEBUG |
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255 | std::cout << "[" << name() << "] Read XICU_PTI_VAL[" << std::dec << idx << "] = " |
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256 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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257 | #endif |
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258 | return true; |
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259 | |
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260 | case XICU_PTI_ACK: |
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261 | CHECK_BOUNDS(pti); |
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262 | r_pti_pending &= ~(1<<idx); |
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263 | data = 0; |
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264 | |
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265 | #if SOCLIB_MODULE_DEBUG |
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266 | std::cout << "[" << name() << "] Read XICU_PTI_ACK[" << std::dec << idx << "] = " |
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267 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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268 | #endif |
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269 | return true; |
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270 | |
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271 | case XICU_MSK_PTI: |
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272 | CHECK_BOUNDS(irq); |
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273 | data = r_msk_pti[idx]; |
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274 | |
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275 | #if SOCLIB_MODULE_DEBUG |
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276 | std::cout << "[" << name() << "] Read XICU_MSK_PTI[" << std::dec << idx << "] = " |
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277 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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278 | #endif |
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279 | return true; |
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280 | |
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281 | case XICU_PTI_ACTIVE: |
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282 | CHECK_BOUNDS(irq); |
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283 | data = r_msk_pti[idx] & r_pti_pending; |
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284 | |
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285 | #if SOCLIB_MODULE_DEBUG |
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286 | std::cout << "[" << name() << "] Read XICU_PTI_ACTIVE[" << std::dec << idx << "] = " |
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287 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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288 | #endif |
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289 | return true; |
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290 | |
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291 | case XICU_MSK_HWI: |
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292 | CHECK_BOUNDS(irq); |
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293 | data = r_msk_hwi[idx]; |
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294 | |
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295 | #if SOCLIB_MODULE_DEBUG |
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296 | std::cout << "[" << name() << "] Read XICU_MSK_HWI[" << std::dec << idx << "] = " |
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297 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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298 | #endif |
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299 | return true; |
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300 | |
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301 | case XICU_HWI_ACTIVE: |
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302 | CHECK_BOUNDS(irq); |
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303 | data = r_msk_hwi[idx] & r_hwi_pending; |
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304 | |
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305 | #if SOCLIB_MODULE_DEBUG |
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306 | std::cout << "[" << name() << "] Read XICU_HWI_ACTIVE[" << std::dec << idx << "] = " |
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307 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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308 | #endif |
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309 | return true; |
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310 | |
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311 | case XICU_MSK_WTI: |
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312 | CHECK_BOUNDS(irq); |
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313 | data = r_msk_wti[idx]; |
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314 | |
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315 | #if SOCLIB_MODULE_DEBUG |
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316 | std::cout << "[" << name() << "] Read XICU_MSK_WTI[" << std::dec << idx << "] = " |
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317 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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318 | #endif |
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319 | return true; |
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320 | |
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321 | case XICU_WTI_ACTIVE: |
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322 | CHECK_BOUNDS(irq); |
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323 | data = r_msk_wti[idx] & r_wti_pending; |
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324 | |
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325 | #if SOCLIB_MODULE_DEBUG |
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326 | std::cout << "[" << name() << "] Read XICU_WTI_ACTIVE[" << std::dec << idx << "] = " |
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327 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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328 | #endif |
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329 | return true; |
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330 | |
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331 | case XICU_PRIO: |
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332 | CHECK_BOUNDS(irq); |
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333 | { |
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334 | uint32_t pti_active = r_msk_pti[idx] & r_pti_pending; |
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335 | uint32_t hwi_active = r_msk_hwi[idx] & r_hwi_pending; |
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336 | uint32_t wti_active = r_msk_wti[idx] & r_wti_pending; |
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337 | uint32_t t = pti_active ? 1 : 0; |
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338 | uint32_t h = hwi_active ? 1 : 0; |
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339 | uint32_t w = wti_active ? 1 : 0; |
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340 | uint32_t prio_pti = t ? soclib::common::ctz<uint32_t>(pti_active) : 0; |
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341 | uint32_t prio_hwi = h ? soclib::common::ctz<uint32_t>(hwi_active) : 0; |
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342 | uint32_t prio_wti = w ? soclib::common::ctz<uint32_t>(wti_active) : 0; |
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343 | |
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344 | data = (t << 0) | (h << 1) | (w << 2) | |
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345 | (prio_pti << 8 ) | (prio_hwi << 16) | (prio_wti << 24); |
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346 | } |
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347 | #if SOCLIB_MODULE_DEBUG |
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348 | std::cout << "[" << name() << "] Read XICU_PRIO[" << std::dec << idx << "] = " |
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349 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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350 | #endif |
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351 | return true; |
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352 | |
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353 | case XICU_CONFIG: |
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354 | data = (m_irq_count << 24) | (m_wti_count << 16) | (m_hwi_count << 8) | m_pti_count; |
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355 | |
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356 | #if SOCLIB_MODULE_DEBUG |
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357 | std::cout << "[" << name() << "] Read XICU_CONFIG = " |
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358 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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359 | #endif |
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360 | return true; |
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361 | |
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362 | case XICU_CFG_REG: |
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363 | CHECK_BOUNDS(cfg); |
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364 | data = r_cfg_reg[idx]; |
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365 | |
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366 | #if SOCLIB_MODULE_DEBUG |
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367 | std::cout << "[" << name() << "] Read XICU_CFG_REG[" << std::dec << idx << "] = " |
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368 | << std::hex << (int)data << std::dec << " time = " << m_clock_cycles << std::endl; |
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369 | #endif |
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370 | return true; |
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371 | } |
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372 | return false; |
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373 | } // end on_read() |
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374 | |
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375 | //////////////////////// |
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376 | tmpl(void)::transition() |
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377 | { |
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378 | #if SOCLIB_MODULE_DEBUG |
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379 | m_clock_cycles++; |
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380 | #endif |
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381 | |
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382 | if (!p_resetn.read()) |
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383 | { |
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384 | m_vci_fsm.reset(); |
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385 | |
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386 | for ( size_t i = 0; i<m_pti_count; ++i ) |
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387 | { |
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388 | r_pti_per[i] = 0; |
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389 | r_pti_val[i] = 0; |
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390 | } |
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391 | for ( size_t i = 0; i<m_wti_count; ++i ) |
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392 | { |
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393 | r_wti_reg[i] = 0; |
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394 | } |
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395 | for ( size_t i = 0; i<m_irq_count; ++i ) |
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396 | { |
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397 | r_msk_pti[i] = 0; |
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398 | r_msk_wti[i] = 0; |
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399 | r_msk_hwi[i] = 0; |
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400 | } |
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401 | for ( size_t i = 0; i<m_cfg_count; ++i ) |
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402 | { |
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403 | r_cfg_reg[i] = 0; |
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404 | } |
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405 | r_pti_pending = 0; |
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406 | r_wti_pending = 0; |
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407 | r_hwi_pending = 0; |
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408 | |
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409 | return; |
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410 | } |
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411 | |
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412 | // update timer interrupt vector |
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413 | for ( size_t i = 0; i<m_pti_count; ++i ) |
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414 | { |
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415 | uint32_t per = r_pti_per[i]; |
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416 | |
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417 | if ( per && --r_pti_val[i] == 0 ) |
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418 | { |
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419 | r_pti_pending |= 1<<i; |
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420 | r_pti_val[i] = per; |
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421 | } |
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422 | } |
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423 | |
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424 | // update pending hardware interrupt vector |
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425 | uint32_t hwi_pending = 0; |
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426 | for ( size_t i = 0; i<m_hwi_count; ++i ) |
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427 | hwi_pending |= (p_hwi[i].read() ? 1 : 0) << i; |
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428 | r_hwi_pending = hwi_pending; |
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429 | |
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430 | m_vci_fsm.transition(); |
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431 | } |
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432 | |
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433 | ////////////////////////////////////////// |
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434 | tmpl(void)::print_trace( size_t channel ) |
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435 | { |
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436 | assert( (channel < m_irq_count) and |
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437 | "ERROR in XICU print_trace() : channel larger than proc number"); |
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438 | |
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439 | std::cout << "XICU " << name() << std::hex |
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440 | << " / HWI_MASK = " << r_msk_hwi[channel] |
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441 | << " / SWI_MASK = " << r_msk_wti[channel] |
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442 | << " / PTI_MASK = " << r_msk_pti[channel] |
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443 | << " / HWI = " << r_hwi_pending |
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444 | << " / WTI = " << r_wti_pending |
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445 | << " / PTI = " << r_pti_pending |
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446 | << std::endl; |
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447 | } |
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448 | |
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449 | /////////////////////// |
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450 | tmpl(void)::genMoore() |
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451 | { |
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452 | m_vci_fsm.genMoore(); |
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453 | |
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454 | // output irqs |
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455 | for ( size_t i = 0; i<m_irq_count; ++i ) |
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456 | { |
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457 | bool b = (r_msk_pti[i] & r_pti_pending) || |
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458 | (r_msk_wti[i] & r_wti_pending) || |
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459 | (r_msk_hwi[i] & r_hwi_pending); |
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460 | |
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461 | #if SOCLIB_MODULE_DEBUG |
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462 | if ( b && !p_irq[i].read()) |
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463 | { |
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464 | std::cout << "[" << name() << "] set p_irq[" << i << "] / " |
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465 | << std::hex |
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466 | << " msk_pti[" << i << "] = " << r_msk_pti[i] << " / " |
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467 | << " pti_pending = " << r_pti_pending << " / " |
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468 | << " msk_wti[" << i << "] = " << r_msk_wti[i] << " / " |
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469 | << " wti_pending = " << r_wti_pending << " / " |
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470 | << " msk_hwi[" << i << "] = " << r_msk_hwi[i] << " / " |
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471 | << " hwi_pending = " << r_hwi_pending |
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472 | << std::dec << std::endl; |
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473 | } |
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474 | if ( !b && p_irq[i].read()) |
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475 | { |
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476 | std::cout << "[" << name() << "] unset p_irq[" << i << "]" << std::endl; |
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477 | } |
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478 | #endif |
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479 | p_irq[i] = b; |
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480 | } |
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481 | |
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482 | // output cfg registers |
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483 | for ( size_t i = 0; i<m_cfg_count; ++i ) |
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484 | { |
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485 | p_cfg[i] = r_cfg_reg[i]; |
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486 | } |
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487 | } |
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488 | |
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489 | ////////////////////////////////////////////////// |
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490 | tmpl(/**/)::VciXicu( sc_core::sc_module_name name, |
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491 | const MappingTable &mt, |
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492 | const IntTab &index, |
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493 | size_t pti_count, |
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494 | size_t hwi_count, |
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495 | size_t wti_count, |
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496 | size_t irq_count, |
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497 | size_t cfg_count ) |
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498 | : caba::BaseModule(name), |
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499 | m_seglist(mt.getSegmentList(index)), |
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500 | m_vci_fsm(p_vci, m_seglist), |
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501 | m_pti_count(pti_count), |
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502 | m_hwi_count(hwi_count), |
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503 | m_wti_count(wti_count), |
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504 | m_irq_count(irq_count), |
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505 | m_cfg_count(cfg_count), |
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506 | r_msk_pti(new uint32_t[irq_count]), |
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507 | r_msk_wti(new uint32_t[irq_count]), |
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508 | r_msk_hwi(new uint32_t[irq_count]), |
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509 | r_pti_pending(0), |
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510 | r_wti_pending(0), |
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511 | r_hwi_pending(0), |
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512 | r_pti_per(new uint32_t[pti_count]), |
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513 | r_pti_val(new uint32_t[pti_count]), |
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514 | r_wti_reg(new uint32_t[wti_count]), |
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515 | m_faulty_wti_reg(0xFFFFFFFF), |
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516 | m_faulty_wti_msk(0x00000000), |
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517 | m_clock_cycles(0), |
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518 | p_clk("clk"), |
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519 | p_resetn("resetn"), |
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520 | p_vci("vci"), |
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521 | p_irq(soclib::common::alloc_elems<sc_core::sc_out<bool> >("irq", irq_count)), |
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522 | p_hwi(soclib::common::alloc_elems<sc_core::sc_in<bool> >("hwi", hwi_count)) |
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523 | { |
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524 | std::cout << " - Building VciXicu : " << name << std::endl; |
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525 | |
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526 | std::list<soclib::common::Segment>::iterator seg; |
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527 | for ( seg = m_seglist.begin() ; seg != m_seglist.end() ; seg++ ) |
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528 | { |
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529 | std::cout << " => segment " << seg->name() |
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530 | << " / base = " << std::hex << seg->baseAddress() |
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531 | << " / size = " << seg->size() << std::endl; |
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532 | } |
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533 | |
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534 | if ( cfg_count > 0 ) |
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535 | { |
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536 | r_cfg_reg = new uint32_t[cfg_count]; |
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537 | p_cfg = soclib::common::alloc_elems<sc_core::sc_out<uint32_t> >("cfg", cfg_count); |
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538 | } |
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539 | |
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540 | m_vci_fsm.on_read_write( on_read, on_write ); |
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541 | |
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542 | SC_METHOD(transition); |
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543 | dont_initialize(); |
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544 | sensitive << p_clk.pos(); |
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545 | |
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546 | SC_METHOD(genMoore); |
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547 | dont_initialize(); |
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548 | sensitive << p_clk.neg(); |
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549 | } |
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550 | |
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551 | ////////////////////// |
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552 | tmpl(/**/)::~VciXicu() |
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553 | { |
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554 | delete [] r_msk_pti; |
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555 | delete [] r_msk_wti; |
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556 | delete [] r_msk_hwi; |
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557 | delete [] r_pti_per; |
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558 | delete [] r_pti_val; |
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559 | delete [] r_wti_reg; |
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560 | soclib::common::dealloc_elems(p_irq, m_irq_count); |
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561 | soclib::common::dealloc_elems(p_hwi, m_hwi_count); |
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562 | if ( m_cfg_count > 0 ) |
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563 | { |
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564 | delete [] r_cfg_reg; |
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565 | soclib::common::dealloc_elems(p_cfg, m_cfg_count); |
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566 | } |
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567 | } |
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568 | |
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569 | }} |
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570 | |
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571 | // Local Variables: |
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572 | // tab-width: 4 |
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573 | // c-basic-offset: 4 |
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574 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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575 | // indent-tabs-mode: nil |
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576 | // End: |
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577 | |
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578 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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579 | |
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