1 | /** |
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2 | * \file io.h |
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3 | * \date 5 September 2012 |
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4 | * \author Cesar Fuguet |
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5 | * |
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6 | * Utility functions to write or read memory mapped hardware registers |
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7 | */ |
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8 | #ifndef IO_H |
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9 | #define IO_H |
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10 | |
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11 | #include <cpu.h> |
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12 | |
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13 | /** |
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14 | * \brief Read an 32 bits memory mapped hardware register |
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15 | * |
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16 | * \note interrupts should be disabled while executing this function |
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17 | */ |
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18 | static inline unsigned int ioread32(uint64_t paddr) |
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19 | { |
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20 | uint32_t value; |
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21 | uint32_t msb = paddr >> CLUSTER_OFFSET_BITS; |
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22 | uint32_t lsb = paddr & ((1ULL << CLUSTER_OFFSET_BITS)-1); |
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23 | |
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24 | asm volatile("mfc2 $8, $24 \n" /* t0 <= DATA_PADDR_EXT */ |
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25 | "mtc2 %2, $24 \n" /* DATA_PADDR_EXT <= msb */ |
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26 | "lw %0, 0(%1) \n" /* value <= *paddr */ |
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27 | "mtc2 $8, $24 \n" /* DATA_PADDR_EXT <= 0 */ |
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28 | : "=r"(value) |
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29 | : "r"(lsb), "r"(msb) |
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30 | : "$8", "memory"); |
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31 | |
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32 | return value; |
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33 | } |
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34 | |
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35 | /** |
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36 | * \brief Write an 32 bits memory mapped hardware register |
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37 | * |
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38 | * \note interrupts should be disabled while executing this function |
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39 | */ |
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40 | static inline void iowrite32(uint64_t paddr, uint32_t value) |
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41 | { |
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42 | uint32_t msb = paddr >> CLUSTER_OFFSET_BITS; |
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43 | uint32_t lsb = paddr & ((1ULL << CLUSTER_OFFSET_BITS)-1); |
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44 | |
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45 | asm volatile("mfc2 $8, $24 \n" /* t0 <= DATA_PADDR_EXT */ |
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46 | "mtc2 %2, $24 \n" /* DATA_PADDR_EXT <= msb */ |
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47 | "sw %0, 0(%1) \n" /* value <= *paddr */ |
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48 | "mtc2 $8, $24 \n" /* DATA_PADDR_EXT <= 0 */ |
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49 | "sync \n" |
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50 | : /* no outputs */ |
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51 | : "r"(value), "r"(lsb), "r"(msb) |
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52 | : "$8", "memory"); |
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53 | } |
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54 | |
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55 | #endif |
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56 | |
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57 | /* |
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58 | * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab |
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59 | */ |
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