source: branches/v4/platforms/caba-ring-ccxcachev1_memcachev3-mipsel/segmentation.h @ 748

Last change on this file since 748 was 137, checked in by simerabe, 14 years ago

replacing old ring versions with new one

  • Property svn:eol-style set to native
  • Property svn:executable set to *
  • Property svn:keywords set to "Author Date Id Rev URL Revision"
  • Property svn:mime-type set to text/plain
File size: 1.8 KB
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1
2/////////////////////////////////////////////////////////////////
3//      ADDRESS SPACE SEGMENTATION
4//
5//      This file must be included in the system.cpp file,
6//      for harware configuration : It is used to build
7//      the SOCLIB_SEGMENT_TABLE.
8//
9//      This file can also be used by the ldscript generator,
10//      for embedded software generation.
11//     
12//      It gives the system integrator the garanty
13//      that hardware and software have the same
14//      description of the address space segmentation.
15/////////////////////////////////////////////////////////////////
16
17/////////////////////////////////////////////////////////////////
18//      reset, and exception segments
19//      base address required by MIPS processor
20/////////////////////////////////////////////////////////////////
21
22#define RESET_BASE      0xBFC00000
23#define RESET_SIZE      0x00010000
24
25#define EXCEP_BASE      0x80000000
26#define EXCEP_SIZE      0x00010000
27
28#define TEXT_BASE       0x00400000
29#define TEXT_SIZE       0x00050000
30/////////////////////////////////////////////////////////////////
31//      global data segment (initialised)
32/////////////////////////////////////////////////////////////////
33
34#define MC_M_BASE       0x10000000
35#define MC_M_SIZE       0x00200000
36
37//////////////////////////////////////////////////////////
38//      System devices
39///////////////////////////////////////////////////////////
40
41#define TTY_BASE        0xC0200000
42#define TTY_SIZE        0x00000100
43
44#define TIMER_BASE      0xD0200000
45#define TIMER_SIZE      0x00000100
46
47#define LOCKS_BASE      0xE0200000
48#define LOCKS_SIZE      0x00000100
49
50#define C_PROC0_BASE    0x01200000
51#define C_PROC0_SIZE    0x00000010
52
53#define C_PROC1_BASE    0x02200000
54#define C_PROC1_SIZE    0x00000010
55
56#define C_PROC2_BASE    0x03200000
57#define C_PROC2_SIZE    0x00000010
58
59#define C_PROC3_BASE    0x04200000
60#define C_PROC3_SIZE    0x00000010
61
62#define C_MC_M_BASE     0x00200000
63#define C_MC_M_SIZE     0x00000008
64
65#define XRAM_BASE       0xB0200000
66#define XRAM_SIZE       0x00000008
67
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