| 
                Last change
                  on this file since 498 was
                  232,
                  checked in by alain, 13 years ago
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          | 
               
Introducing the elementary tests for a TSAR mono-cluster 
mono-processor platform with MMU using the vci_cc_vcache_v4   
such as the "tsarv4_mono_mmu". 
(assemby level tests written by Manuel Bouyer) 
 
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            File size:
            1.4 KB
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| 1 | -n test_sanity:  | 
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| 2 | -n test_exceptions:  | 
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| 3 | -n test_mmu_basic:  | 
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| 4 | test FAILED | 
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| 5 | -n test_excep_ls:  | 
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| 6 | test FAILED | 
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| 7 | -n test_excep_ls_delayslot:  | 
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| 8 | -n test_excep_ls_llsc:  | 
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| 9 | test FAILED | 
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| 10 | -n test_excep_if:  | 
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| 11 | test FAILED | 
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| 12 | -n test_excep_if_delayslot:  | 
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| 13 | test FAILED | 
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| 14 | -n test_excep_if_llsc:  | 
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| 15 | test FAILED | 
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| 16 | -n test_exception_epc_modify:  | 
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| 17 | -n test_dtlb_inval:  | 
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| 18 | -n test_dtlb_inval2:  | 
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| 19 | test FAILED | 
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| 20 | -n test_dtlb_inval3:  | 
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| 21 | test FAILED | 
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| 22 | -n test_itlb_inval:  | 
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| 23 | -n test_itlb_inval2:  | 
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| 24 | test FAILED | 
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| 25 | -n test_idtlb_inval:  | 
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| 26 | test FAILED | 
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| 27 | -n test_idtlb_inval2:  | 
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| 28 | test FAILED | 
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| 29 | -n test_idtlb_inval3:  | 
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| 30 | test FAILED | 
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| 31 | -n test_idtlb_inval4:  | 
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| 32 | test FAILED | 
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| 33 | -n test_dtlb_ptprinval:  | 
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| 34 | -n test_itlb_ptprinval:  | 
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| 35 | -n test_idtlb_ptprinval:  | 
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| 36 | test FAILED | 
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| 37 | -n test_sync:  | 
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| 38 | -n test_sc_update_cache:  | 
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| 39 | -n test_pte_llsc:  | 
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| 40 | test FAILED | 
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| 41 | -n test_interrupt:  | 
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| 42 | -n test_interrupt_epc_modify:  | 
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| 43 | -n test_xicu_timer:  | 
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| 44 | -n test_interrupt_delayslot:  | 
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| 45 | test FAILED | 
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| 46 | -n test_interrupt_mask:  | 
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| 47 | -n test_interrupt_external_mask:  | 
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| 48 | -n test_excep_cop:  | 
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| 49 | -n test_excep_cop_delayslot:  | 
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| 50 | -n test_excep_cop1:  | 
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| 51 | -n test_syscall:  | 
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| 52 | -n test_syscall_delayslot:  | 
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| 53 | -n test_breakpoint:  | 
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| 54 | -n test_breakpoint_delayslot:  | 
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| 55 | -n test_ri:  | 
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| 56 | -n test_ri_delayslot:  | 
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| 57 | -n test_ao:  | 
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| 58 | -n test_ao_delayslot:  | 
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| 59 | -n test_trap:  | 
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| 60 | -n test_trap_delayslot:  | 
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| 61 | -n test_fpe:  | 
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| 62 | -n test_fpe_delayslot:  | 
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| 63 | test FAILED | 
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| 64 | -n test_dcache_inval_pa:  | 
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| 65 | test FAILED | 
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| 66 | -n test_icache_inval_pa:  | 
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| 67 | test FAILED | 
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| 68 | -n test_pte2i_ref:  | 
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| 69 | -n test_pte2lw_ref:  | 
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| 70 | -n test_pte2ll_ref:  | 
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| 71 | -n test_pte2sw_dirty:  | 
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| 72 | -n test_pte2sc_dirty:  | 
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