source: branches/v4/softs/tsar_boot/README.txt @ 941

Last change on this file since 941 was 347, checked in by cfuguet, 12 years ago

Introducing dcache line invalidation mechanism in the boot_ioc_read
function, when using platform without cache coherency.

Introducing two parameters in the defs_platform.h file:

CACHE_COHERENCE

Equals to 0 when no cache coherency

CACHE_LINE_SIZE

Number of bytes in a cache line

  • TODO: Use the config register of the cache models to get

this size

Adding new platform configuration file for the

caba_vgsb_xicu_mmu SOCLIB platform.
File size: 2.8 KB
Line 
1TSAR BOOT LOADER
2
3Files:
4===============================================================================
5src/        Source files
6            The entry point of this boot loader is the file reset.S
7
8include/    Header files
9
10conf/       Platform specific files and ldscript.
11            For each platform, we must define a new directory.
12
13      --->  defs_platform.h:
14
15             This file is mandatory. This file defines the
16             NB_PROCS per cluster, the NB_CLUSTERS and the base address of
17             the TTY, IOC and XICU devices.
18             It defines also:
19              -> CACHE_COHERENCE
20                 This constant is used by the boot_ioc_read function to know
21                 if the buffer used to store the blocks from the block_device
22                 must be invalidated in the dcache after the transfert has
23                 finished.
24                                 0 means invalidation must be made.
25
26              -> CACHE_LINE_SIZE
27                 This constant defines the size in bytes of a cache line.
28
29              -> IRQ_PER_PROC
30                 This constant is used to know how many XICU irq outputs are
31                 connected to each processor.
32
33      --->  platform_soclib.dts:
34
35             Device tree file. It is mandatory if compiling
36             for a SOCLIB platform. If the application to execute does not use
37             a device tree file, create an empty one.
38
39      --->  platform_fpga.dts:
40             Device tree file. It is mandatory if compiling
41             for a FPGA platform. If the application to execute does not use
42             a device tree file, create an empty one.
43
44      --->  ldscript:
45             LD script defining the segments of this boot loader.
46             We define two segments:
47                seg_stack_base: Base address of the stack used by processor 0
48                during the boot process.
49
50                seg_boot_base: Base address of the code and data defined for
51                this loader
52           
53Makefile    Makefile for compile the boot loader.
54            Arguments to pass:
55
56             ---> PLATFORM_DIR=conf/<platform_dir>
57   
58                   Defines the directory where to find the plateform specific
59                   files
60
61             ---> SOCLIB=1
62
63                   If using SOCLIB, define this flag to use the SOCLIB device
64                   drivers
65
66             ---> SYSCLK_FREQ=<value hz>
67
68                   If not SOCLIB platform, this flag allows us to choose the
69                   CLK frequency used in the hardware platform (i.e. FPGA).
70                   This information is used to configurate the SPI device
71                   which allow us to drive a SD card device.
72
73              i.e. make PLATFORM_DIR=conf/<platform_dir> SYSCLK_FREQ=50000000
74                   make PLATFORM_DIR=conf/<platform_dir> SOCLIB=1
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