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Last change
on this file since 371 was
347,
checked in by cfuguet, 12 years ago
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Introducing dcache line invalidation mechanism in the boot_ioc_read
function, when using platform without cache coherency.
Introducing two parameters in the defs_platform.h file:
CACHE_COHERENCE
Equals to 0 when no cache coherency
CACHE_LINE_SIZE
Number of bytes in a cache line
- TODO: Use the config register of the cache models to get
this size
Adding new platform configuration file for the
caba_vgsb_xicu_mmu SOCLIB platform.
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File size:
279 bytes
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| Line | |
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| 1 | #define NB_PROCS 4 |
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| 2 | #define NB_CLUSTERS 1 |
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| 3 | |
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| 4 | #define IRQ_PER_PROC 1 |
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| 5 | |
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| 6 | #define CACHE_COHERENCE 0 |
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| 7 | #define CACHE_LINE_SIZE 16//bytes |
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| 8 | |
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| 9 | #define ICU_BASE 0x00F00000 |
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| 10 | #define IOC_BASE 0x00F10000 |
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| 11 | #define VCIBD_BASE IOC_BASE |
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| 12 | #define TTY_BASE 0x00F20000 |
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