source: branches/v4/softs/tsar_boot/include/spi.h @ 809

Last change on this file since 809 was 292, checked in by cfuguet, 12 years ago

Changing directory structure of the TSAR boot loader.
A README.txt file has been included to explain the new structure
and the MAKEFILE parameters.

Erasing the heap segment for the boot elf loader. All the work space
is allocated in the stack.

The stack size is defined in the include/defs.h.

Important modification in the reset.S file. The non-boot
processors (processor id != 0) wait in a low comsumption energy
mode to be wake up by processor 0 using an IPI. Each processor
has a private mailbox in the local XICU. The value written in
the mailbox will be used as address to jump by the processors.

The waking up of non-boot processors is not done in this boot loader
so it must be done in the application loaded.

The boot_loader_elf function loads into memory an executable .elf file
which must be placed in the BOOT_LOADER_LBA block of the disk. This
constant can be defined in the include/defs.h file.

File size: 4.1 KB
Line 
1/**
2 * \file  : spi.h
3 * \date  : 30 August 2012
4 * \author: Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr>
5 *
6 * This file contains the definition of a driver for the SPI controller
7 */
8
9#ifndef SPI_H
10#define SPI_H
11
12#include <io.h>
13
14/**
15 * SPI type definition
16 */
17struct spi_dev
18{
19    /**
20     * RX/TX registers of the SPI controller
21     */
22    unsigned int rx_tx[4];
23
24    /**
25     * Control register of the SPI controller
26     */
27    unsigned int ctrl;
28
29    /**
30     * Divider register for the SPI controller generated clock signal
31     */
32    unsigned int divider;
33
34    /**
35     * Slave select register of the SPI controller
36     */
37    unsigned int ss;
38};
39
40/**
41 * \param   spi     : initialized pointer to a SPI controller.
42 * \param   byte    : Byte to send to the SPI controller
43 * \param   index   : index of the TX register in the SPI (TX[index])
44 *
45 * \return  void
46 *
47 * \brief   Send a byte to one of the tx buffer registers of the
48 *          SPI controller
49 */
50void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index);
51
52/**
53 * \param   spi     : initialized pointer to a SPI controller.
54 * \param   index   : index of the RX register in the SPI (RX[index])
55 *
56 * \return  byte from the RX[index] register
57 *
58 * \brief   Get a byte from one of the rx buffer registers of the
59 *          SPI controller
60 */
61inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index);
62
63/**
64 * \param   spi     : initialized pointer to a SPI controller.
65 * \param   index   : index of the slave select signal to assert
66 *
67 * \return  void
68 *
69 * \brief   Set the index selected slave select signal (ss[index] <= '0')
70 */
71inline void spi_ss_assert(struct spi_dev * spi, int index);
72
73/**
74 * \param   spi     : initialized pointer to a SPI controller.
75 * \param   index   : index of the slave select signal to deassert
76 *
77 * \return  void
78 *
79 * \brief   Unset the index selected slave select signal (ss[index] <= '0')
80 */
81inline void spi_ss_deassert(struct spi_dev * spi, int index);
82
83/**
84 * \param   spi         : initialized pointer to a SPI controller.
85 * \param   spi_freq    : SPI Master to Slave clock frequency (in Hz)
86 * \param   sys_freq    : System clock frequency (in Hz)
87 * \param   char_len    : number to bits to transmit in one transfer
88 * \param   tx_edge     : when 0, the Master Out Slave In signal is changed
89 *                        on the falling edge of the clock
90 * \param   rx_edge     : when 0, the Master In Slave Out signal is latched
91 *                        on the falling edge of the clock
92 *
93 * \return  void
94 *
95 * \brief   Configure the SPI controller
96 * \note    Any of the arguments can be less than 0 if you want to keep the old value
97 */
98void spi_dev_config (
99        struct spi_dev * spi,
100        int spi_freq        ,
101        int sys_freq            ,
102        int char_len            ,
103        int tx_edge                     ,
104        int rx_edge                     );
105
106/**
107 * SPI macros and constants
108 */
109#define SPI_TX_POSEDGE         1           /**< MOSI is changed on neg edge   */
110#define SPI_TX_NEGEDGE         0           /**< MOSI is changed on pos edge   */
111#define SPI_RX_POSEDGE         1           /**< MISO is latched on pos edge   */
112#define SPI_RX_NEGEDGE         0           /**< MISO is latched on neg edge   */
113
114#define SPI_CTRL_ASS_EN        ( 1 << 13 ) /**< Auto Slave Sel Assertion      */
115#define SPI_CTRL_IE_EN         ( 1 << 12 ) /**< Interrupt Enable              */
116#define SPI_CTRL_LSB_EN        ( 1 << 11 ) /**< LSB are sent first            */
117#define SPI_CTRL_TXN_EN        ( 1 << 10 ) /**< MOSI is changed on neg edge   */
118#define SPI_CTRL_RXN_EN        ( 1 << 9  ) /**< MISO is latched on neg edge   */
119#define SPI_CTRL_GO_BSY        ( 1 << 8  ) /**< Start the transfer            */
120#define SPI_CTRL_CHAR_LEN_MASK (  0xFF   ) /**< Bits transmited in 1 transfer */
121#define SPI_RXTX_MASK          (  0xFF   ) /**< Mask for the an RX/TX value   */
122
123 /**
124  * \param  x   :   Initialized pointer to the SPI controller
125  *
126  * \return 1 if there is an unfinished transfer in the SPI controller
127  *
128  * Check the GO_BUSY bit of the SPI Controller
129  */
130#define SPI_IS_BUSY(x)         ((ioread32(&x->ctrl) & SPI_CTRL_GO_BSY) != 0) ? 1 : 0
131
132#endif
133
134/*
135 * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4
136 */
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