source: branches/v5/modules/dspin_local_ring_fast_c/caba/source/include/dspin_half_gateway_initiator_fast_c.h

Last change on this file was 359, checked in by joannou, 13 years ago

bugfix : correctly updating the r_preempt register
File size: 22.5 KB
Line 
1
2 /* SOCLIB_LGPL_HEADER_BEGIN
3 *
4 * This file is part of SoCLib, GNU LGPLv2.1.
5 *
6 * SoCLib is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; version 2.1 of the License.
9 *
10 * SoCLib is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with SoCLib; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 * SOCLIB_LGPL_HEADER_END
21 *
22 * Author : Abdelmalek SI MERABET
23 * Date : Februrary 2011
24 * Copyright: UPMC - LIP6
25 */
26#ifndef DSPIN_HALF_GATEWAY_INITIATOR_FAST_H
27#define DSPIN_HALF_GATEWAY_INITIATOR_FAST_H
28
29#include "caba_base_module.h"
30#include "generic_fifo.h"
31#include "mapping_table.h"
32#include "ring_signals_fast.h"
33#include "dspin_interface.h"
34
35#define BRDCST_TGT_MASK 0xFFFFFFFFE1ULL
36#define HI_DEBUG
37
38namespace soclib { namespace caba {
39
40namespace {
41
42const char *ring_cmd_fsm_state_str_hi[] = {
43 "CMD_IDLE",
44 "OWNER",
45 "BDC_FIRST",
46 "BDC_SECOND",
47 "SENDING",
48};
49
50#ifdef HI_DEBUG
51
52const char *ring_rsp_fsm_state_str_hi[] = {
53 "RSP_IDLE",
54 "ALLOC",
55 "NALLOC",
56};
57#endif
58
59}
60template<typename vci_param, int ring_cmd_data_size, int ring_rsp_data_size>
61class DspinHalfGatewayInitiatorFastC
62{
63
64typedef LocalRingSignals ring_signal_t;
65typedef DspinInput<ring_cmd_data_size> cmd_in_t;
66typedef DspinOutput<ring_rsp_data_size> rsp_out_t;
67
68private:
69
70 enum ring_rsp_fsm_state_e {
71 RSP_IDLE, // waiting for first flit of a response packet
72 ALLOC, // next flit of a local rsp packet
73 NALLOC, // next flit of a ring rsp packet
74 };
75
76 enum ring_cmd_fsm_state_e {
77 CMD_IDLE,
78 OWNER,
79 BDC_FIRST,
80 BDC_SECOND,
81 SENDING,
82 PREEMPT,
83 };
84
85 // structural parameters
86 std::string m_name;
87 bool m_alloc_init;
88
89
90 // internal fifos
91 GenericFifo<uint64_t > m_cmd_fifo; // fifo for the local command packet
92 GenericFifo<uint64_t > m_rsp_fifo; // fifo for the local response packet
93
94 // routing table
95 soclib::common::AddressDecodingTable<uint32_t, bool> m_lt;
96
97 uint64_t r_brdcst_save;
98 uint32_t m_srcid;
99 uint32_t m_nb_target;
100 uint32_t m_x_width;
101 uint32_t m_y_width;
102
103 // internal registers
104 sc_core::sc_signal<bool> r_preempt; // ring preempted, priority to gate init.
105 sc_core::sc_signal<uint32_t> r_cpt_tgt; // target id for sequential broadcast
106 sc_core::sc_signal<uint32_t> r_ring_cmd_fsm; // ring command packet FSM (distributed)
107 sc_core::sc_signal<uint32_t> r_ring_rsp_fsm; // ring response packet FSM
108
109public :
110
111#define __renRegGateInit(x) x((((std::string) name)+"_" #x).c_str())
112
113DspinHalfGatewayInitiatorFastC(
114 const char *name,
115 bool alloc_init,
116 const int &wrapper_fifo_depth,
117 const soclib::common::MappingTable &mt,
118 const soclib::common::IntTab &ringid,
119 const uint32_t &nb_target,
120 const uint32_t &x_width,
121 const uint32_t &y_width)
122 : m_name(name),
123 m_alloc_init(alloc_init),
124 m_cmd_fifo(((std::string) name)+"m_cmd_fifo", wrapper_fifo_depth),
125 m_rsp_fifo(((std::string) name)+"m_rsp_fifo", wrapper_fifo_depth),
126 m_lt(mt.getIdLocalityTable(ringid)),
127 m_nb_target(nb_target),
128 m_x_width(x_width),
129 m_y_width(y_width),
130 __renRegGateInit(r_cpt_tgt),
131 __renRegGateInit(r_ring_cmd_fsm),
132 __renRegGateInit(r_ring_rsp_fsm)
133 { } // end constructor
134
135
136void reset()
137{
138 if(m_alloc_init)
139 r_ring_cmd_fsm = OWNER;
140 else
141 r_ring_cmd_fsm = CMD_IDLE;
142
143 r_ring_rsp_fsm = RSP_IDLE;
144 m_cmd_fifo.init();
145 m_rsp_fifo.init();
146
147}
148
149void transition(const cmd_in_t &p_gate_cmd_in, const rsp_out_t &p_gate_rsp_out, const ring_signal_t p_ring_in, cmd_str &init_cmd, bool &init_rsp_val, const bool tga)
150{
151
152 bool cmd_fifo_get = false;
153 bool cmd_fifo_put = false;
154 uint64_t cmd_fifo_data = 0;
155
156 bool rsp_fifo_put = false;
157 uint64_t rsp_fifo_data = 0;
158
159
160//////////// VCI CMD FSM /////////////////////////
161
162 if (p_gate_cmd_in.write.read()) {
163 cmd_fifo_data = (uint64_t) p_gate_cmd_in.data.read();
164 cmd_fifo_put = m_cmd_fifo.wok();
165 }
166
167 bool rsp_fifo_get = p_gate_rsp_out.read.read();
168
169//////////// RING CMD FSM /////////////////////////
170 switch( r_ring_cmd_fsm )
171 {
172 case CMD_IDLE:
173 {
174 bool eop = ( (int) ((m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1);
175 // tga : target gate allocated
176 if(m_cmd_fifo.rok())
177 {
178#ifdef HI_DEBUG
179 std::cout << std::dec << sc_time_stamp() << " - " << m_name
180 << " - ring_cmd_fsm = " << ring_cmd_fsm_state_str_hi[r_ring_cmd_fsm]
181 << " - fifo ROK : " << m_cmd_fifo.rok()
182 << " - fifo _data : " << std::hex << m_cmd_fifo.read()
183 << " - in grant : " << p_ring_in.cmd_grant
184 << " - in tga : " << tga
185 << " - in wok : " << p_ring_in.cmd_r
186 << " - in data : " << p_ring_in.cmd_data
187
188 << std::endl;
189#endif
190 r_preempt = tga;
191
192 if (m_cmd_fifo.read() & 0x1 == 0x1) // broadcast
193 {
194 if (tga || p_ring_in.cmd_grant)
195 {
196 r_cpt_tgt = 0;
197 r_brdcst_save = m_cmd_fifo.read() & BRDCST_TGT_MASK; // save first flit of brdcst
198 r_ring_cmd_fsm = BDC_FIRST;
199 }
200 }
201 else if (tga)
202 {
203 //r_preempt = 1;
204
205 cmd_fifo_get = p_ring_in.cmd_r;
206 if (eop)
207 r_ring_cmd_fsm = CMD_IDLE;
208 else
209 r_ring_cmd_fsm = SENDING;
210 break;
211 }
212
213 if(p_ring_in.cmd_grant)
214 {
215 r_ring_cmd_fsm = SENDING;
216 }
217
218 }
219 }
220 break;
221
222 case OWNER:
223 if ( m_cmd_fifo.rok()) // && p_ring_in.cmd_wok.read() )
224 {
225#ifdef HI_DEBUG
226 std::cout << std::dec << sc_time_stamp() << " - " << m_name
227 << " - ring_cmd_fsm = " << ring_cmd_fsm_state_str_hi[r_ring_cmd_fsm]
228 << " - fifo ROK : " << m_cmd_fifo.rok()
229 << " - in grant : " << p_ring_in.cmd_grant
230 << " - in wok : " << p_ring_in.cmd_r
231 << " - fifo data : " << std::hex << m_cmd_fifo.read()
232 << std::endl;
233#endif
234
235 bool eop = ( (int) ((m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1);
236
237 if (m_cmd_fifo.read() & 0x1 == 0x1) // broadcast
238 {
239 r_cpt_tgt = 0;
240 r_brdcst_save = m_cmd_fifo.read() & BRDCST_TGT_MASK; // save first flit of brdcst
241 r_ring_cmd_fsm = BDC_FIRST;
242 }
243//
244 else
245 {
246 if ( eop && p_ring_in.cmd_r )
247 {
248 cmd_fifo_get = true;
249 if ( p_ring_in.cmd_grant )
250 r_ring_cmd_fsm = OWNER;
251 else
252 r_ring_cmd_fsm = CMD_IDLE;
253 }
254
255 if (!eop || !p_ring_in.cmd_r)
256 {
257 cmd_fifo_get = p_ring_in.cmd_r;
258 r_ring_cmd_fsm = SENDING;
259 }
260
261 }
262
263 }
264 else if ( !p_ring_in.cmd_grant)
265 r_ring_cmd_fsm = CMD_IDLE;
266 break;
267
268 case BDC_FIRST:
269
270#ifdef HI_DEBUG
271 std::cout << std::dec << sc_time_stamp() << " - " << m_name
272 << " - ring_cmd_fsm = " << ring_cmd_fsm_state_str_hi[r_ring_cmd_fsm]
273 << " - fifo ROK : " << m_cmd_fifo.rok()
274 << " - in grant : " << p_ring_in.cmd_grant
275 << " - preempt : " << r_preempt
276 << " - in wok : " << p_ring_in.cmd_r
277 << " - cpt_tgt : " << r_cpt_tgt.read()
278 << " - fifo data : " << std::hex << m_cmd_fifo.read()
279 << std::endl;
280
281#endif
282 r_preempt = tga;
283
284 if (p_ring_in.cmd_r)
285 {
286 if (r_cpt_tgt.read() == 0)
287 {
288 cmd_fifo_get = true;
289 }
290 r_ring_cmd_fsm = BDC_SECOND;
291 }
292 break;
293
294 case BDC_SECOND:
295#ifdef HI_DEBUG
296 std::cout << std::dec << sc_time_stamp() << " - " << m_name
297 << " - ring_cmd_fsm = " << ring_cmd_fsm_state_str_hi[r_ring_cmd_fsm]
298 << " - fifo ROK : " << m_cmd_fifo.rok()
299 << " - in grant : " << p_ring_in.cmd_grant
300 << " - preempt : " << r_preempt
301 << " - in wok : " << p_ring_in.cmd_r
302 << " - fifo data : " << std::hex << m_cmd_fifo.read()
303 << std::endl;
304
305#endif
306
307 if(m_cmd_fifo.rok() && p_ring_in.cmd_r)
308 {
309 if(r_cpt_tgt.read() == m_nb_target - 1)
310 {
311 cmd_fifo_get = true;
312
313 if ( !r_preempt && p_ring_in.cmd_grant )
314 {
315 r_ring_cmd_fsm = OWNER;
316 }
317 else //r_preempt || !p_ring_in.cmd_grant
318 {
319 r_ring_cmd_fsm = CMD_IDLE;
320 }
321 }
322 else
323 {
324 r_cpt_tgt = r_cpt_tgt + 1;
325 r_ring_cmd_fsm = BDC_FIRST;
326 }
327
328 }
329 break;
330
331 case SENDING:
332#ifdef HI_DEBUG
333if(m_cmd_fifo.rok())
334 std::cout << std::dec << sc_time_stamp() << " - " << m_name
335 << " - ring_cmd_fsm = " << ring_cmd_fsm_state_str_hi[r_ring_cmd_fsm]
336 << " - fifo ROK : " << m_cmd_fifo.rok()
337 << " - in grant : " << p_ring_in.cmd_grant
338 << " - in wok : " << p_ring_in.cmd_r
339 << " - fifo data : " << std::hex << m_cmd_fifo.read()
340 << std::endl;
341#endif
342
343
344 if(m_cmd_fifo.rok() && p_ring_in.cmd_r )
345 {
346 cmd_fifo_get = true;
347 bool eop = ((int) (m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1;
348 if (eop)
349 {
350 if (!r_preempt && p_ring_in.cmd_grant )
351 r_ring_cmd_fsm = OWNER;
352 else
353 r_ring_cmd_fsm = CMD_IDLE;
354 }
355 }
356 break;
357
358 } // end switch ring cmd fsm
359
360/////////// RING RSP FSM ////////////////////////
361
362 switch( r_ring_rsp_fsm )
363 {
364 case RSP_IDLE:
365
366 {
367 uint32_t rsrcid = (uint32_t) ((sc_dt::sc_uint<vci_param::S>) ((p_ring_in.rsp_data >> (ring_rsp_data_size-m_x_width-m_y_width - 1)) << (vci_param::S-m_x_width-m_y_width)));
368 bool islocal = !m_lt[rsrcid];
369 bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
370
371
372
373 if (p_ring_in.rsp_w)
374 {
375#ifdef HI_DEBUG
376 std::cout << std::dec << sc_time_stamp() << " - " << m_name
377 << " - ring_rsp_fsm = " << ring_rsp_fsm_state_str_hi[r_ring_rsp_fsm]
378 << " - in preempt : " << p_ring_in.rsp_preempt
379 << " - in rok : " << p_ring_in.rsp_w
380 << " - in data : " << std::hex << p_ring_in.rsp_data
381 << " - rsrcid : " << rsrcid
382 << " - isloc : " << islocal
383 << " - in wok : " << p_ring_in.rsp_r
384 << " - fifo wok : " << m_rsp_fifo.wok()
385 << " - reop : " << reop
386 << std::endl;
387#endif
388 if(islocal)
389 {
390 rsp_fifo_put = m_rsp_fifo.wok();
391 rsp_fifo_data = p_ring_in.rsp_data;
392
393 if (reop && m_rsp_fifo.wok())
394 r_ring_rsp_fsm = RSP_IDLE;
395 else
396 r_ring_rsp_fsm = ALLOC;
397 }
398
399 else // !islocal
400 {
401
402 if (reop && p_ring_in.rsp_r)
403 r_ring_rsp_fsm = RSP_IDLE;
404 else
405 r_ring_rsp_fsm = NALLOC;
406 }
407 }
408 else // !p_ring_in.rsp_w
409 r_ring_rsp_fsm = RSP_IDLE;
410 }
411 break;
412
413 case ALLOC:
414 {
415 bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
416#ifdef HI_DEBUG
417if(p_ring_in.rsp_w || p_ring_in.rsp_preempt)
418 std::cout << std::dec << sc_time_stamp() << " - " << m_name
419 << " - ring_rsp_fsm = " << ring_rsp_fsm_state_str_hi[r_ring_rsp_fsm]
420 << " - in preempt : " << p_ring_in.rsp_preempt
421 << " - in rok : " << p_ring_in.rsp_w
422 << " - in wok : " << p_ring_in.rsp_r
423 << " - in data : " << std::hex << p_ring_in.rsp_data
424 << " - fifo wok : " << m_rsp_fifo.wok()
425 << " - reop : " << reop
426 << std::endl;
427#endif
428
429
430 if(p_ring_in.rsp_preempt) break;
431
432 if (p_ring_in.rsp_w && m_rsp_fifo.wok() && reop)
433 {
434
435 rsp_fifo_put = true;
436 rsp_fifo_data = p_ring_in.rsp_data;
437
438 if(p_ring_in.rsp_palloc)
439 r_ring_rsp_fsm = NALLOC;
440 else
441 r_ring_rsp_fsm = RSP_IDLE;
442 }
443 else // !p_ring_in.rsp_w || !m_rsp_fifo.wok() || !reop
444 {
445
446 rsp_fifo_put = p_ring_in.rsp_w && m_rsp_fifo.wok();
447 rsp_fifo_data = p_ring_in.rsp_data;
448 r_ring_rsp_fsm = ALLOC;
449 }
450 }
451 break;
452
453 case NALLOC:
454 {
455
456#ifdef HI_DEBUG
457if(p_ring_in.rsp_w)
458 std::cout << std::dec << sc_time_stamp() << " - " << m_name
459 << " - ring_rsp_fsm = " << ring_rsp_fsm_state_str_hi[r_ring_rsp_fsm]
460 << " - in rok : " << p_ring_in.rsp_w
461 << " - fifo wok : " << m_rsp_fifo.wok()
462 << " - in wok : " << p_ring_in.rsp_r
463 << " - in data : " << std::hex << p_ring_in.rsp_data
464 << std::endl;
465#endif
466
467 bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
468
469
470 if (p_ring_in.rsp_w && reop && p_ring_in.rsp_r)
471 {
472 r_ring_rsp_fsm = RSP_IDLE;
473 }
474 else
475 {
476 r_ring_rsp_fsm = NALLOC;
477 }
478 }
479 break;
480
481 } // end switch rsp fsm
482
483
484 ////////////////////////
485 // fifos update //
486 ////////////////////////
487
488//-- keep trace on ring traffic
489 init_cmd.cmdval = cmd_fifo_get;
490 init_cmd.flit = m_cmd_fifo.read();
491 init_cmd.state = ring_cmd_fsm_state_str_hi[r_ring_cmd_fsm];
492
493 //init_cmd_val = cmd_fifo_get;
494 init_rsp_val = rsp_fifo_put;
495// local cmd fifo update
496 if ( cmd_fifo_put && cmd_fifo_get ) m_cmd_fifo.put_and_get(cmd_fifo_data);
497 else if ( cmd_fifo_put && !cmd_fifo_get ) m_cmd_fifo.simple_put(cmd_fifo_data);
498 else if ( !cmd_fifo_put && cmd_fifo_get ) m_cmd_fifo.simple_get();
499
500// local rsp fifo update
501 if ( rsp_fifo_put && rsp_fifo_get ) m_rsp_fifo.put_and_get(rsp_fifo_data);
502 else if ( rsp_fifo_put && !rsp_fifo_get ) m_rsp_fifo.simple_put(rsp_fifo_data);
503 else if ( !rsp_fifo_put && rsp_fifo_get ) m_rsp_fifo.simple_get();
504
505} // end Transition()
506
507///////////////////////////////////////////////////////////////////
508void genMoore(cmd_in_t &p_gate_cmd_in, rsp_out_t &p_gate_rsp_out)
509///////////////////////////////////////////////////////////////////
510{
511 p_gate_rsp_out.write = m_rsp_fifo.rok();
512 p_gate_rsp_out.data = (sc_dt::sc_uint<ring_rsp_data_size>) m_rsp_fifo.read();
513
514 p_gate_cmd_in.read= m_cmd_fifo.wok();
515
516} // end genMoore
517
518/////////////////////////////////////////////////////////////////////////////////////////////////
519void update_ring_signals(ring_signal_t p_ring_in, ring_signal_t &p_ring_out, bool tga, bool &iga)
520/////////////////////////////////////////////////////////////////////////////////////////////////
521// palloc may have 2 values :
522// palloc = 2 : means Target Gate still allocated
523// global state for targets : TG TL0 TL1 TL2 ... TLn
524// A N N P2 N
525// A N N N N
526// palloc = 1 : means Target Gate free (not allocated)
527// global state for targets : TG TL0 TL1 TL2 ... TLn
528// A N N P2 N
529// N N N P1 N
530// I I I I I
531// TLi not allocated, in case of preempt and last flit, needs to test value of palloc
532// if palloc=1 => next state : IDLE (TG not allocated)
533// else (palloc2=2) => next state : NALLOC (TG still Allocated)
534{
535 switch( r_ring_cmd_fsm )
536 {
537 case CMD_IDLE:
538 {
539 bool brdcst = (m_cmd_fifo.read() & 0x1 == 0x1);
540
541 p_ring_out.cmd_grant = !m_cmd_fifo.rok() && p_ring_in.cmd_grant;
542
543 if (m_cmd_fifo.rok() && tga && !brdcst)
544 {
545 p_ring_out.cmd_preempt = 1;
546 p_ring_out.cmd_palloc = 1;
547 p_ring_out.cmd_header = 1;
548 p_ring_out.cmd_w = 1;
549 p_ring_out.cmd_data = m_cmd_fifo.read();
550 }
551 else
552 {
553 p_ring_out.cmd_preempt = 0;
554 p_ring_out.cmd_palloc = 0;
555 p_ring_out.cmd_header = 0;
556 p_ring_out.cmd_w = p_ring_in.cmd_w;
557 p_ring_out.cmd_data = p_ring_in.cmd_data;
558 }
559
560 }
561 break;
562
563 case OWNER:
564 {
565 bool eop = ((int) ((m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1);
566 bool brdcst = (m_cmd_fifo.read() & 0x1 == 0x1);
567
568 p_ring_out.cmd_grant = (!m_cmd_fifo.rok() || (eop && p_ring_in.cmd_r)) ;
569
570 p_ring_out.cmd_preempt = 0;
571 p_ring_out.cmd_header = 0;
572 p_ring_out.cmd_palloc = 0;
573 p_ring_out.cmd_w = m_cmd_fifo.rok() && !brdcst;
574 p_ring_out.cmd_data = m_cmd_fifo.read();
575 }
576 break;
577
578 case BDC_FIRST:
579 if(tga)
580 {
581 p_ring_out.cmd_header = 1;
582 p_ring_out.cmd_palloc = 1; //1+(tga ? 1:0);
583 p_ring_out.cmd_preempt = 1;
584 p_ring_out.cmd_grant = p_ring_in.cmd_grant;
585 }
586 else
587 {
588 p_ring_out.cmd_header = 0;
589 p_ring_out.cmd_palloc = 0;
590 p_ring_out.cmd_preempt = 0;
591 p_ring_out.cmd_grant = false;
592 }
593
594 p_ring_out.cmd_w = true;
595 p_ring_out.cmd_data = r_brdcst_save | ((((uint64_t) r_cpt_tgt.read()) & 0xF) << 0x1);
596 break;
597
598 case BDC_SECOND:
599
600 if (r_preempt)
601 {
602 p_ring_out.cmd_grant = p_ring_in.cmd_grant;
603 p_ring_out.cmd_palloc = 1+(tga ? 1:0);
604
605 p_ring_out.cmd_preempt = m_cmd_fifo.rok(); //&& tga;
606 p_ring_out.cmd_header = 0;
607
608 if ( m_cmd_fifo.rok() )
609 {
610 p_ring_out.cmd_w = 1; //m_cmd_fifo.rok();
611 p_ring_out.cmd_data = m_cmd_fifo.read();
612 }
613 else
614 {
615 // if init local has finished, tga = 0
616 // init gate remains the only initiator, then w = 0
617 p_ring_out.cmd_w = p_ring_in.cmd_w && tga;
618 p_ring_out.cmd_data = p_ring_in.cmd_data;
619 }
620 }
621 else
622 {
623 // si on est dans cet etat, c'est qu'on n'utilise pas le cmd_preempt mais le gnt.
624 p_ring_out.cmd_preempt= 0;
625 p_ring_out.cmd_header = 0;
626 p_ring_out.cmd_palloc = 0;
627 p_ring_out.cmd_w = m_cmd_fifo.rok();
628 p_ring_out.cmd_data = m_cmd_fifo.read();
629 p_ring_out.cmd_grant = m_cmd_fifo.rok() && p_ring_in.cmd_r && (r_cpt_tgt.read() == m_nb_target - 1);
630 }
631 break;
632
633 case SENDING:
634 {
635
636 if (r_preempt)
637 {
638 p_ring_out.cmd_grant = p_ring_in.cmd_grant;
639 p_ring_out.cmd_palloc = 1+(tga ? 1:0);
640
641 p_ring_out.cmd_preempt = m_cmd_fifo.rok(); //&& tga;
642 p_ring_out.cmd_header = 0;
643
644 if ( m_cmd_fifo.rok() )
645 {
646 p_ring_out.cmd_w = 1; //m_cmd_fifo.rok();
647 p_ring_out.cmd_data = m_cmd_fifo.read();
648 }
649 else
650 {
651 // if init local has finished, tga = 0
652 // init gate remains the only initiator, then w = 0
653 p_ring_out.cmd_w = p_ring_in.cmd_w && tga;
654 p_ring_out.cmd_data = p_ring_in.cmd_data;
655 }
656 }
657 else
658 {
659 bool eop = ((int) (m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1;
660 // si on est dans cet etat, c'est qu'on n'utilise pas le cmd_preempt mais le gnt.
661 p_ring_out.cmd_preempt= 0;
662 p_ring_out.cmd_header = 0;
663 p_ring_out.cmd_palloc = 0;
664 p_ring_out.cmd_w = m_cmd_fifo.rok();
665 p_ring_out.cmd_data = m_cmd_fifo.read();
666 p_ring_out.cmd_grant = m_cmd_fifo.rok() && p_ring_in.cmd_r && eop;
667 }
668 }
669 break;
670
671 } // end switch
672
673 p_ring_out.cmd_r = p_ring_in.cmd_r;
674
675 p_ring_out.rsp_w = p_ring_in.rsp_w;
676 p_ring_out.rsp_data = p_ring_in.rsp_data;
677
678 p_ring_out.rsp_grant = p_ring_in.rsp_grant;
679
680 p_ring_out.rsp_palloc = p_ring_in.rsp_palloc;
681 p_ring_out.rsp_preempt = p_ring_in.rsp_preempt;
682 p_ring_out.rsp_header = p_ring_in.rsp_header;
683
684
685 switch( r_ring_rsp_fsm )
686 {
687 case RSP_IDLE:
688 {
689 uint32_t rsrcid = (uint32_t) ((sc_dt::sc_uint<vci_param::S>) ((p_ring_in.rsp_data >> (ring_rsp_data_size-m_x_width-m_y_width - 1)) << (vci_param::S-m_x_width-m_y_width)));
690 bool islocal = !m_lt[rsrcid];
691
692 iga = false;
693
694 if(p_ring_in.rsp_w && islocal)
695 p_ring_out.rsp_r = m_rsp_fifo.wok();
696 else
697 p_ring_out.rsp_r = p_ring_in.rsp_r;
698 }
699 break;
700
701 case ALLOC:
702 iga = true;
703
704 if (!p_ring_in.rsp_preempt)
705 p_ring_out.rsp_r = m_rsp_fifo.wok();
706 else
707 p_ring_out.rsp_r = p_ring_in.rsp_r;
708 break;
709
710 case NALLOC:
711 iga = false;
712 p_ring_out.rsp_r = p_ring_in.rsp_r;
713 break;
714 } // end switch
715
716
717} // end update_ring_signals
718
719};
720
721}} // end namespace
722
723#endif // DSPIN_HALF_GATEWAY_INITIATOR_FAST_H
724
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