1 | ////////////////////////////////////////////////////////////////////////////// |
---|
2 | // File: tsar_cluster_mmu.c |
---|
3 | // Author: Alain Greiner |
---|
4 | // Copyright: UPMC/LIP6 |
---|
5 | // Date : march 2011 |
---|
6 | // This program is released under the GNU public license |
---|
7 | ////////////////////////////////////////////////////////////////////////////// |
---|
8 | // This file define a TSAR cluster architecture with virtual memory: |
---|
9 | // - It uses the virtual_dspin_router as distributed global interconnect |
---|
10 | // - It uses the vci_local_crossbar as local interconnect |
---|
11 | // - It uses the vci_cc_vcache_wrapper |
---|
12 | // - It uses the vci_mem_cache |
---|
13 | // - It contains a private RAM with a variable latency to emulate the L3 cache |
---|
14 | // - It can contains 1, 2 or 4 processors |
---|
15 | // - Each processor has a private dma channel (vci_multi_dma) |
---|
16 | // - It uses the vci_xicu interrupt controller |
---|
17 | // - The peripherals MTTY, BDEV, FBUF, and the boot BROM are in the cluster |
---|
18 | // containing address 0xBFC00000. |
---|
19 | // - The Multi-TTY component controls up to 15 terminals. |
---|
20 | // - Each Multi-DMA component controls up to 8 DMA channels. |
---|
21 | // - The DMA IRQs are connected to IRQ_IN[8]...IRQ_IN[15] |
---|
22 | // - The TTY IRQs are connected to IRQ_IN[16]...IRQ_IN[30] |
---|
23 | // - The BDEV IRQ is connected to IRQ_IN[31] |
---|
24 | ////////////////////////////////////////////////////////////////////////////////// |
---|
25 | |
---|
26 | #include "../include/tsar_cluster_mmu.h" |
---|
27 | |
---|
28 | namespace soclib { |
---|
29 | namespace caba { |
---|
30 | |
---|
31 | ////////////////////////////////////////////////////////////////////////// |
---|
32 | // Constructor |
---|
33 | ////////////////////////////////////////////////////////////////////////// |
---|
34 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
---|
35 | TsarClusterMmu<vci_param, iss_t, cmd_width, rsp_width>::TsarClusterMmu( |
---|
36 | sc_module_name insname, |
---|
37 | size_t nb_procs, |
---|
38 | size_t nb_ttys, |
---|
39 | size_t nb_dmas, |
---|
40 | size_t x_id, |
---|
41 | size_t y_id, |
---|
42 | size_t cluster_id, |
---|
43 | const soclib::common::MappingTable &mtd, |
---|
44 | const soclib::common::MappingTable &mtc, |
---|
45 | const soclib::common::MappingTable &mtx, |
---|
46 | size_t x_width, |
---|
47 | size_t y_width, |
---|
48 | size_t tgtid_memc, |
---|
49 | size_t tgtid_xicu, |
---|
50 | size_t tgtid_mdma, |
---|
51 | size_t tgtid_fbuf, |
---|
52 | size_t tgtid_mtty, |
---|
53 | size_t tgtid_brom, |
---|
54 | size_t tgtid_mnic, |
---|
55 | size_t tgtid_bdev, |
---|
56 | size_t memc_ways, |
---|
57 | size_t memc_sets, |
---|
58 | size_t l1_i_ways, |
---|
59 | size_t l1_i_sets, |
---|
60 | size_t l1_d_ways, |
---|
61 | size_t l1_d_sets, |
---|
62 | size_t xram_latency, |
---|
63 | bool io, |
---|
64 | size_t xfb, |
---|
65 | size_t yfb, |
---|
66 | char* disk_name, |
---|
67 | size_t block_size, |
---|
68 | size_t nic_channels, |
---|
69 | char* nic_rx_name, |
---|
70 | char* nic_tx_name, |
---|
71 | uint32_t nic_timeout, |
---|
72 | const Loader &loader, |
---|
73 | uint32_t frozen_cycles, |
---|
74 | uint32_t debug_start_cycle, |
---|
75 | bool memc_debug_ok, |
---|
76 | bool proc_debug_ok) |
---|
77 | : soclib::caba::BaseModule(insname), |
---|
78 | p_clk("clk"), |
---|
79 | p_resetn("resetn") |
---|
80 | |
---|
81 | { |
---|
82 | // Vectors of ports definition |
---|
83 | |
---|
84 | p_cmd_in = alloc_elems<DspinInput<cmd_width> >("p_cmd_in", 2, 4); |
---|
85 | p_cmd_out = alloc_elems<DspinOutput<cmd_width> >("p_cmd_out", 2, 4); |
---|
86 | p_rsp_in = alloc_elems<DspinInput<rsp_width> >("p_rsp_in", 2, 4); |
---|
87 | p_rsp_out = alloc_elems<DspinOutput<rsp_width> >("p_rsp_out", 2, 4); |
---|
88 | |
---|
89 | // Components definition |
---|
90 | |
---|
91 | // on direct network : local srcid[proc] in [0..nb_procs-1] |
---|
92 | // on direct network : local srcid[mdma] = nb_procs |
---|
93 | // on direct network : local srcid[bdev] = nb_procs + 1 |
---|
94 | |
---|
95 | // on coherence network : local srcid[proc] in [0...nb_procs-1] |
---|
96 | // on coherence network : local srcid[memc] = nb_procs |
---|
97 | |
---|
98 | std::cout << " - building proc_" << x_id << "_" << y_id << "-*" << std::endl; |
---|
99 | |
---|
100 | for (size_t p = 0; p < nb_procs; p++) |
---|
101 | { |
---|
102 | std::ostringstream sproc; |
---|
103 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
---|
104 | proc[p] = new VciCcVCacheWrapper<vci_param, iss_t>( |
---|
105 | sproc.str().c_str(), |
---|
106 | cluster_id*nb_procs + p, |
---|
107 | mtd, // Mapping Table Direct |
---|
108 | mtc, // Mapping Table Coherence |
---|
109 | IntTab(cluster_id,p), // SRCID_D |
---|
110 | IntTab(cluster_id,p), // SRCID_C |
---|
111 | IntTab(cluster_id,p), // TGTID_C |
---|
112 | 8, // ITLB ways |
---|
113 | 8, // ITLB sets |
---|
114 | 8, // DTLB ways |
---|
115 | 8, // DTLB sets |
---|
116 | l1_i_ways,l1_i_sets,16, // ICACHE size |
---|
117 | l1_d_ways,l1_d_sets,16, // DCACHE size |
---|
118 | 4, // WBUF nlines |
---|
119 | 4, // WBUF nwords |
---|
120 | x_width, |
---|
121 | y_width, |
---|
122 | nb_procs, // MEMC local index |
---|
123 | frozen_cycles, // max frozen cycles |
---|
124 | debug_start_cycle, |
---|
125 | proc_debug_ok); |
---|
126 | } |
---|
127 | |
---|
128 | std::cout << " - building memc_" << x_id << "_" << y_id << std::endl; |
---|
129 | |
---|
130 | std::ostringstream smemc; |
---|
131 | smemc << "memc_" << x_id << "_" << y_id; |
---|
132 | memc = new VciMemCache<vci_param>( |
---|
133 | smemc.str().c_str(), |
---|
134 | mtd, mtc, mtx, |
---|
135 | IntTab(cluster_id), // SRCID_X |
---|
136 | IntTab(cluster_id, nb_procs), // SRCID_C |
---|
137 | IntTab(cluster_id, tgtid_memc), // TGTID_D |
---|
138 | IntTab(cluster_id, nb_procs), // TGTID_C |
---|
139 | memc_ways, memc_sets, 16, // CACHE SIZE |
---|
140 | //4096, // HEAP SIZE |
---|
141 | 256, // HEAP SIZE |
---|
142 | 8, // TRANSACTION TABLE DEPTH |
---|
143 | 8, // UPDATE TABLE DEPTH |
---|
144 | debug_start_cycle, |
---|
145 | memc_debug_ok); |
---|
146 | |
---|
147 | std::cout << " - building xram_" << x_id << "_" << y_id << std::endl; |
---|
148 | |
---|
149 | std::ostringstream sxram; |
---|
150 | sxram << "xram_" << x_id << "_" << y_id; |
---|
151 | xram = new VciSimpleRam<vci_param>( |
---|
152 | sxram.str().c_str(), |
---|
153 | IntTab(cluster_id), |
---|
154 | mtx, |
---|
155 | loader, |
---|
156 | xram_latency); |
---|
157 | |
---|
158 | std::cout << " - building xicu_" << x_id << "_" << y_id << std::endl; |
---|
159 | |
---|
160 | std::ostringstream sicu; |
---|
161 | sicu << "xicu_" << x_id << "_" << y_id; |
---|
162 | xicu = new VciXicu<vci_param>( |
---|
163 | sicu.str().c_str(), |
---|
164 | mtd, // mapping table |
---|
165 | IntTab(cluster_id, tgtid_xicu), // TGTID_D |
---|
166 | nb_procs, // number of timer IRQs |
---|
167 | 32, // number of hard IRQs |
---|
168 | 0, // number of soft IRQs |
---|
169 | nb_procs); // number of output IRQs |
---|
170 | |
---|
171 | std::cout << " - building dma_" << x_id << "_" << y_id << std::endl; |
---|
172 | |
---|
173 | std::ostringstream sdma; |
---|
174 | sdma << "dma_" << x_id << "_" << y_id; |
---|
175 | mdma = new VciMultiDma<vci_param>( |
---|
176 | sdma.str().c_str(), |
---|
177 | mtd, |
---|
178 | IntTab(cluster_id, nb_procs), // SRCID |
---|
179 | IntTab(cluster_id, tgtid_mdma), // TGTID |
---|
180 | 64, // burst size |
---|
181 | nb_dmas); // number of IRQs |
---|
182 | |
---|
183 | std::cout << " - building xbard_" << x_id << "_" << y_id << std::endl; |
---|
184 | |
---|
185 | size_t nb_direct_initiators = nb_procs + 1; |
---|
186 | size_t nb_direct_targets = 3; |
---|
187 | if ( io ) |
---|
188 | { |
---|
189 | nb_direct_initiators = nb_procs + 2; |
---|
190 | nb_direct_targets = 8; |
---|
191 | } |
---|
192 | std::ostringstream sd; |
---|
193 | sd << "xbard_" << x_id << "_" << y_id; |
---|
194 | xbard = new VciLocalCrossbar<vci_param>( |
---|
195 | sd.str().c_str(), |
---|
196 | mtd, |
---|
197 | IntTab(cluster_id), // cluster initiator index |
---|
198 | IntTab(cluster_id), // cluster target index |
---|
199 | nb_direct_initiators, // number of initiators |
---|
200 | nb_direct_targets); // number of targets |
---|
201 | |
---|
202 | std::cout << " - building xbarc_" << x_id << "_" << y_id << std::endl; |
---|
203 | |
---|
204 | std::ostringstream sc; |
---|
205 | sc << "xbarc_" << x_id << "_" << y_id; |
---|
206 | xbarc = new VciLocalCrossbar<vci_param>( |
---|
207 | sc.str().c_str(), |
---|
208 | mtc, |
---|
209 | IntTab(cluster_id), // cluster initiator index |
---|
210 | IntTab(cluster_id), // cluster target index |
---|
211 | nb_procs + 1, // number of initiators |
---|
212 | nb_procs + 1); // number of targets |
---|
213 | |
---|
214 | std::cout << " - building wrappers in cluster_" << x_id << "_" << y_id << std::endl; |
---|
215 | |
---|
216 | std::ostringstream wid; |
---|
217 | wid << "iniwrapperd_" << x_id << "_" << y_id; |
---|
218 | iniwrapperd = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
---|
219 | wid.str().c_str(), |
---|
220 | 4, // cmd fifo depth |
---|
221 | 4); // rsp fifo depth |
---|
222 | |
---|
223 | std::ostringstream wtd; |
---|
224 | wtd << "tgtwrapperd_" << x_id << "_" << y_id; |
---|
225 | tgtwrapperd = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
---|
226 | wtd.str().c_str(), |
---|
227 | 4, // cmd fifo depth |
---|
228 | 4); // rsp fifo depth |
---|
229 | |
---|
230 | std::ostringstream wic; |
---|
231 | wic << "iniwrapperc_" << x_id << "_" << y_id; |
---|
232 | iniwrapperc = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
---|
233 | wic.str().c_str(), |
---|
234 | 4, // cmd fifo depth |
---|
235 | 4); // rsp fifo depth |
---|
236 | |
---|
237 | std::ostringstream wtc; |
---|
238 | wtc << "tgtwrapperc_" << x_id << "_" << y_id; |
---|
239 | tgtwrapperc = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
---|
240 | wtc.str().c_str(), |
---|
241 | 4, // cmd fifo depth |
---|
242 | 4); // rsp fifo depth |
---|
243 | |
---|
244 | std::cout << " - building cmdrouter_" << x_id << "_" << y_id << std::endl; |
---|
245 | |
---|
246 | std::ostringstream scmd; |
---|
247 | scmd << "cmdrouter_" << x_id << "_" << y_id; |
---|
248 | cmdrouter = new VirtualDspinRouter<cmd_width>( |
---|
249 | scmd.str().c_str(), |
---|
250 | x_id,y_id, // coordinate in the mesh |
---|
251 | x_width, y_width, // x & y fields width |
---|
252 | 4,4); // input & output fifo depths |
---|
253 | |
---|
254 | std::cout << " - building rsprouter_" << x_id << "_" << y_id << std::endl; |
---|
255 | |
---|
256 | std::ostringstream srsp; |
---|
257 | srsp << "rsprouter_" << x_id << "_" << y_id; |
---|
258 | rsprouter = new VirtualDspinRouter<rsp_width>( |
---|
259 | srsp.str().c_str(), |
---|
260 | x_id,y_id, // coordinates in mesh |
---|
261 | x_width, y_width, // x & y fields width |
---|
262 | 4,4); // input & output fifo depths |
---|
263 | |
---|
264 | // IO cluster components |
---|
265 | if ( io ) |
---|
266 | { |
---|
267 | std::cout << " - building brom" << std::endl; |
---|
268 | |
---|
269 | brom = new VciSimpleRam<vci_param>( |
---|
270 | "brom", |
---|
271 | IntTab(cluster_id, tgtid_brom), |
---|
272 | mtd, |
---|
273 | loader); |
---|
274 | |
---|
275 | std::cout << " - building fbuf" << std::endl; |
---|
276 | |
---|
277 | fbuf = new VciFrameBuffer<vci_param>( |
---|
278 | "fbuf", |
---|
279 | IntTab(cluster_id, tgtid_fbuf), |
---|
280 | mtd, |
---|
281 | xfb, yfb); |
---|
282 | |
---|
283 | std::cout << " - building fbuf" << std::endl; |
---|
284 | |
---|
285 | bdev = new VciBlockDeviceTsarV4<vci_param>( |
---|
286 | "bdev", |
---|
287 | mtd, |
---|
288 | IntTab(cluster_id, nb_procs+1), |
---|
289 | IntTab(cluster_id, tgtid_bdev), |
---|
290 | disk_name, |
---|
291 | block_size, |
---|
292 | 64); // burst size |
---|
293 | |
---|
294 | std::cout << " - building mnic" << std::endl; |
---|
295 | |
---|
296 | mnic = new VciMultiNic<vci_param>( |
---|
297 | "mnic", |
---|
298 | IntTab(cluster_id, tgtid_mnic), |
---|
299 | mtd, |
---|
300 | nic_channels, |
---|
301 | nic_rx_name, |
---|
302 | nic_tx_name, |
---|
303 | 0, // default mac address MAC4 |
---|
304 | 0 ); // default mac address MAC2 |
---|
305 | |
---|
306 | std::cout << " - building mtty" << std::endl; |
---|
307 | |
---|
308 | std::vector<std::string> vect_names; |
---|
309 | for( size_t tid = 0 ; tid < (nb_ttys) ; tid++ ) |
---|
310 | { |
---|
311 | std::ostringstream term_name; |
---|
312 | term_name << "term" << tid; |
---|
313 | vect_names.push_back(term_name.str().c_str()); |
---|
314 | } |
---|
315 | mtty = new VciMultiTty<vci_param>( |
---|
316 | "mtty", |
---|
317 | IntTab(cluster_id, tgtid_mtty), |
---|
318 | mtd, |
---|
319 | vect_names); |
---|
320 | } |
---|
321 | |
---|
322 | std::cout << std::endl; |
---|
323 | |
---|
324 | //////////////////////////////////// |
---|
325 | // Connections are defined here |
---|
326 | //////////////////////////////////// |
---|
327 | |
---|
328 | // CMDROUTER and RSPROUTER |
---|
329 | cmdrouter->p_clk (this->p_clk); |
---|
330 | cmdrouter->p_resetn (this->p_resetn); |
---|
331 | rsprouter->p_clk (this->p_clk); |
---|
332 | rsprouter->p_resetn (this->p_resetn); |
---|
333 | for (int x = 0; x < 2; x++) |
---|
334 | { |
---|
335 | for(int y = 0; y < 4; y++) |
---|
336 | { |
---|
337 | cmdrouter->p_out[x][y] (this->p_cmd_out[x][y]); |
---|
338 | cmdrouter->p_in[x][y] (this->p_cmd_in[x][y]); |
---|
339 | rsprouter->p_out[x][y] (this->p_rsp_out[x][y]); |
---|
340 | rsprouter->p_in[x][y] (this->p_rsp_in[x][y]); |
---|
341 | } |
---|
342 | } |
---|
343 | |
---|
344 | cmdrouter->p_out[0][4] (signal_dspin_cmd_g2l_d); |
---|
345 | cmdrouter->p_out[1][4] (signal_dspin_cmd_g2l_c); |
---|
346 | cmdrouter->p_in[0][4] (signal_dspin_cmd_l2g_d); |
---|
347 | cmdrouter->p_in[1][4] (signal_dspin_cmd_l2g_c); |
---|
348 | |
---|
349 | rsprouter->p_out[0][4] (signal_dspin_rsp_g2l_d); |
---|
350 | rsprouter->p_out[1][4] (signal_dspin_rsp_g2l_c); |
---|
351 | rsprouter->p_in[0][4] (signal_dspin_rsp_l2g_d); |
---|
352 | rsprouter->p_in[1][4] (signal_dspin_rsp_l2g_c); |
---|
353 | |
---|
354 | std::cout << " - CMD & RSP routers connected" << std::endl; |
---|
355 | |
---|
356 | // VCI/DSPIN WRAPPERS |
---|
357 | iniwrapperd->p_clk (this->p_clk); |
---|
358 | iniwrapperd->p_resetn (this->p_resetn); |
---|
359 | iniwrapperd->p_vci (signal_vci_l2g_d); |
---|
360 | iniwrapperd->p_dspin_out (signal_dspin_cmd_l2g_d); |
---|
361 | iniwrapperd->p_dspin_in (signal_dspin_rsp_g2l_d); |
---|
362 | |
---|
363 | tgtwrapperd->p_clk (this->p_clk); |
---|
364 | tgtwrapperd->p_resetn (this->p_resetn); |
---|
365 | tgtwrapperd->p_vci (signal_vci_g2l_d); |
---|
366 | tgtwrapperd->p_dspin_out (signal_dspin_rsp_l2g_d); |
---|
367 | tgtwrapperd->p_dspin_in (signal_dspin_cmd_g2l_d); |
---|
368 | |
---|
369 | iniwrapperc->p_clk (this->p_clk); |
---|
370 | iniwrapperc->p_resetn (this->p_resetn); |
---|
371 | iniwrapperc->p_vci (signal_vci_l2g_c); |
---|
372 | iniwrapperc->p_dspin_out (signal_dspin_cmd_l2g_c); |
---|
373 | iniwrapperc->p_dspin_in (signal_dspin_rsp_g2l_c); |
---|
374 | |
---|
375 | tgtwrapperc->p_clk (this->p_clk); |
---|
376 | tgtwrapperc->p_resetn (this->p_resetn); |
---|
377 | tgtwrapperc->p_vci (signal_vci_g2l_c); |
---|
378 | tgtwrapperc->p_dspin_out (signal_dspin_rsp_l2g_c); |
---|
379 | tgtwrapperc->p_dspin_in (signal_dspin_cmd_g2l_c); |
---|
380 | |
---|
381 | std::cout << " - VCI/DSPIN wrappers connected" << std::endl; |
---|
382 | |
---|
383 | // CROSSBAR direct |
---|
384 | xbard->p_clk (this->p_clk); |
---|
385 | xbard->p_resetn (this->p_resetn); |
---|
386 | xbard->p_initiator_to_up (signal_vci_l2g_d); |
---|
387 | xbard->p_target_to_up (signal_vci_g2l_d); |
---|
388 | |
---|
389 | xbard->p_to_target[tgtid_memc] (signal_vci_tgt_d_memc); |
---|
390 | xbard->p_to_target[tgtid_xicu] (signal_vci_tgt_d_xicu); |
---|
391 | xbard->p_to_target[tgtid_mdma] (signal_vci_tgt_d_mdma); |
---|
392 | |
---|
393 | xbard->p_to_initiator[nb_procs] (signal_vci_ini_d_mdma); |
---|
394 | |
---|
395 | for (size_t p = 0; p < nb_procs; p++) |
---|
396 | { |
---|
397 | xbard->p_to_initiator[p] (signal_vci_ini_d_proc[p]); |
---|
398 | } |
---|
399 | |
---|
400 | if ( io ) |
---|
401 | { |
---|
402 | xbard->p_to_target[tgtid_mtty] (signal_vci_tgt_d_mtty); |
---|
403 | xbard->p_to_target[tgtid_brom] (signal_vci_tgt_d_brom); |
---|
404 | xbard->p_to_target[tgtid_bdev] (signal_vci_tgt_d_bdev); |
---|
405 | xbard->p_to_target[tgtid_fbuf] (signal_vci_tgt_d_fbuf); |
---|
406 | xbard->p_to_target[tgtid_mnic] (signal_vci_tgt_d_mnic); |
---|
407 | |
---|
408 | xbard->p_to_initiator[nb_procs+1] (signal_vci_ini_d_bdev); |
---|
409 | } |
---|
410 | |
---|
411 | std::cout << " - Direct crossbar connected" << std::endl; |
---|
412 | |
---|
413 | // CROSSBAR coherence |
---|
414 | xbarc->p_clk (this->p_clk); |
---|
415 | xbarc->p_resetn (this->p_resetn); |
---|
416 | xbarc->p_initiator_to_up (signal_vci_l2g_c); |
---|
417 | xbarc->p_target_to_up (signal_vci_g2l_c); |
---|
418 | xbarc->p_to_initiator[nb_procs] (signal_vci_ini_c_memc); |
---|
419 | xbarc->p_to_target[nb_procs] (signal_vci_tgt_c_memc); |
---|
420 | for (size_t p = 0; p < nb_procs; p++) |
---|
421 | { |
---|
422 | xbarc->p_to_target[p] (signal_vci_tgt_c_proc[p]); |
---|
423 | xbarc->p_to_initiator[p] (signal_vci_ini_c_proc[p]); |
---|
424 | } |
---|
425 | |
---|
426 | std::cout << " - Coherence crossbar connected" << std::endl; |
---|
427 | |
---|
428 | // Processors |
---|
429 | for (size_t p = 0; p < nb_procs; p++) |
---|
430 | { |
---|
431 | proc[p]->p_clk (this->p_clk); |
---|
432 | proc[p]->p_resetn (this->p_resetn); |
---|
433 | proc[p]->p_vci_ini_d (signal_vci_ini_d_proc[p]); |
---|
434 | proc[p]->p_vci_ini_c (signal_vci_ini_c_proc[p]); |
---|
435 | proc[p]->p_vci_tgt_c (signal_vci_tgt_c_proc[p]); |
---|
436 | proc[p]->p_irq[0] (signal_proc_it[p]); |
---|
437 | for ( size_t j = 1 ; j < 6 ; j++) |
---|
438 | { |
---|
439 | proc[p]->p_irq[j] (signal_false); |
---|
440 | } |
---|
441 | } |
---|
442 | |
---|
443 | std::cout << " - Processors connected" << std::endl; |
---|
444 | |
---|
445 | // XICU |
---|
446 | xicu->p_clk (this->p_clk); |
---|
447 | xicu->p_resetn (this->p_resetn); |
---|
448 | xicu->p_vci (signal_vci_tgt_d_xicu); |
---|
449 | for ( size_t p=0 ; p<nb_procs ; p++) |
---|
450 | { |
---|
451 | xicu->p_irq[p] (signal_proc_it[p]); |
---|
452 | } |
---|
453 | for ( size_t i=0 ; i<32 ; i++) |
---|
454 | { |
---|
455 | if ( io ) // I/O cluster |
---|
456 | { |
---|
457 | if (i < 8) xicu->p_hwi[i] (signal_false); |
---|
458 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
---|
459 | else if (i < 16) xicu->p_hwi[i] (signal_false); |
---|
460 | else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i-16]); |
---|
461 | else if (i < 31) xicu->p_hwi[i] (signal_false); |
---|
462 | else xicu->p_hwi[i] (signal_irq_bdev); |
---|
463 | } |
---|
464 | else // other clusters |
---|
465 | { |
---|
466 | if (i < 8) xicu->p_hwi[i] (signal_false); |
---|
467 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
---|
468 | else xicu->p_hwi[i] (signal_false); |
---|
469 | } |
---|
470 | } |
---|
471 | |
---|
472 | std::cout << " - XICU connected" << std::endl; |
---|
473 | |
---|
474 | // MEMC |
---|
475 | memc->p_clk (this->p_clk); |
---|
476 | memc->p_resetn (this->p_resetn); |
---|
477 | memc->p_vci_ixr (signal_vci_xram); |
---|
478 | memc->p_vci_tgt (signal_vci_tgt_d_memc); |
---|
479 | memc->p_vci_ini (signal_vci_ini_c_memc); |
---|
480 | memc->p_vci_tgt_cleanup (signal_vci_tgt_c_memc); |
---|
481 | |
---|
482 | std::cout << " - MEMC connected" << std::endl; |
---|
483 | |
---|
484 | // XRAM |
---|
485 | xram->p_clk (this->p_clk); |
---|
486 | xram->p_resetn (this->p_resetn); |
---|
487 | xram->p_vci (signal_vci_xram); |
---|
488 | |
---|
489 | std::cout << " - XRAM connected" << std::endl; |
---|
490 | |
---|
491 | // CDMA |
---|
492 | mdma->p_clk (this->p_clk); |
---|
493 | mdma->p_resetn (this->p_resetn); |
---|
494 | mdma->p_vci_target (signal_vci_tgt_d_mdma); |
---|
495 | mdma->p_vci_initiator (signal_vci_ini_d_mdma); |
---|
496 | for (size_t i=0 ; i<nb_dmas ; i++) |
---|
497 | { |
---|
498 | mdma->p_irq[i] (signal_irq_mdma[i]); |
---|
499 | } |
---|
500 | |
---|
501 | std::cout << " - MDMA connected" << std::endl; |
---|
502 | |
---|
503 | // Components in I/O cluster |
---|
504 | |
---|
505 | if ( io ) |
---|
506 | { |
---|
507 | // BDEV |
---|
508 | bdev->p_clk (this->p_clk); |
---|
509 | bdev->p_resetn (this->p_resetn); |
---|
510 | bdev->p_irq (signal_irq_bdev); |
---|
511 | bdev->p_vci_target (signal_vci_tgt_d_bdev); |
---|
512 | bdev->p_vci_initiator (signal_vci_ini_d_bdev); |
---|
513 | |
---|
514 | std::cout << " - BDEV connected" << std::endl; |
---|
515 | |
---|
516 | // FBUF |
---|
517 | fbuf->p_clk (this->p_clk); |
---|
518 | fbuf->p_resetn (this->p_resetn); |
---|
519 | fbuf->p_vci (signal_vci_tgt_d_fbuf); |
---|
520 | |
---|
521 | std::cout << " - FBUF connected" << std::endl; |
---|
522 | |
---|
523 | // MNIC |
---|
524 | mnic->p_clk (this->p_clk); |
---|
525 | mnic->p_resetn (this->p_resetn); |
---|
526 | mnic->p_vci (signal_vci_tgt_d_mnic); |
---|
527 | for ( size_t i=0 ; i<nic_channels ; i++ ) |
---|
528 | { |
---|
529 | mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); |
---|
530 | mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); |
---|
531 | } |
---|
532 | |
---|
533 | std::cout << " - MNIC connected" << std::endl; |
---|
534 | |
---|
535 | // BROM |
---|
536 | brom->p_clk (this->p_clk); |
---|
537 | brom->p_resetn (this->p_resetn); |
---|
538 | brom->p_vci (signal_vci_tgt_d_brom); |
---|
539 | |
---|
540 | std::cout << " - BROM connected" << std::endl; |
---|
541 | |
---|
542 | // MTTY |
---|
543 | mtty->p_clk (this->p_clk); |
---|
544 | mtty->p_resetn (this->p_resetn); |
---|
545 | mtty->p_vci (signal_vci_tgt_d_mtty); |
---|
546 | for ( size_t i=0 ; i<nb_ttys ; i++ ) |
---|
547 | { |
---|
548 | mtty->p_irq[i] (signal_irq_mtty[i]); |
---|
549 | } |
---|
550 | |
---|
551 | std::cout << " - MTTY connected" << std::endl; |
---|
552 | } |
---|
553 | } // end constructor |
---|
554 | |
---|
555 | /////////////////////////////////////////////////////////////////////////// |
---|
556 | // destructor |
---|
557 | /////////////////////////////////////////////////////////////////////////// |
---|
558 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
---|
559 | TsarClusterMmu<vci_param, iss_t, cmd_width, rsp_width>::~TsarClusterMmu() {} |
---|
560 | |
---|
561 | } |
---|
562 | } |
---|
563 | |
---|
564 | |
---|
565 | // Local Variables: |
---|
566 | // tab-width: 3 |
---|
567 | // c-basic-offset: 3 |
---|
568 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
569 | // indent-tabs-mode: nil |
---|
570 | // End: |
---|
571 | |
---|
572 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
---|
573 | |
---|
574 | |
---|
575 | |
---|