1 | |
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2 | # -*- python -*- |
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3 | |
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4 | __id__ = "$Id: vci_mem_cache.sd 295 2013-02-14 15:05:05Z cfuguet $" |
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5 | __version__ = "$Revision: 295 $" |
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6 | |
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7 | Module('caba:vci_mem_cache', |
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8 | classname = 'soclib::caba::VciMemCache', |
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9 | |
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10 | tmpl_parameters = [ |
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11 | parameter.Module('vci_param_int', default = 'caba:vci_param', |
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12 | cell_size = parameter.Reference('memc_cell_size_int') |
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13 | ), |
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14 | parameter.Module('vci_param_ext', default = 'caba:vci_param', |
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15 | cell_size = parameter.Reference('memc_cell_size_ext') |
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16 | ), |
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17 | parameter.Int('memc_dspin_in_width'), |
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18 | parameter.Int('memc_dspin_out_width'), |
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19 | ], |
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20 | |
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21 | header_files = [ |
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22 | '../source/include/vci_mem_cache.h', |
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23 | '../source/include/xram_transaction.h', |
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24 | '../source/include/mem_cache_directory.h', |
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25 | '../source/include/update_tab.h' |
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26 | ], |
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27 | |
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28 | interface_files = [ |
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29 | '../../include/soclib/mem_cache.h', |
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30 | ], |
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31 | |
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32 | implementation_files = [ |
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33 | '../source/src/vci_mem_cache.cpp' |
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34 | ], |
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35 | |
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36 | uses = [ |
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37 | Uses('caba:base_module'), |
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38 | Uses('common:loader'), |
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39 | Uses('common:mapping_table'), |
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40 | Uses('common:gdb_iss', gdb_iss_t = 'common:mips32el'), |
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41 | Uses('caba:generic_fifo'), |
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42 | Uses('caba:generic_llsc_global_table'), |
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43 | Uses('caba:dspin_wtidl_param'), |
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44 | Uses('caba:vci_cc_vcache_wrapper', |
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45 | cell_size = parameter.Reference('memc_cell_size_int'), |
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46 | dspin_in_width = parameter.Reference('memc_dspin_out_width'), |
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47 | dspin_out_width = parameter.Reference('memc_dspin_in_width'), |
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48 | iss_t = 'common:gdb_iss', |
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49 | gdb_iss_t = 'common:mips32el'), |
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50 | ], |
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51 | |
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52 | ports = [ |
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53 | Port('caba:clock_in' , 'p_clk' , auto = 'clock' ), |
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54 | Port('caba:bit_in' , 'p_resetn' , auto = 'resetn'), |
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55 | Port('caba:vci_target' , 'p_vci_tgt'), |
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56 | Port('caba:vci_initiator', 'p_vci_ixr'), |
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57 | Port('caba:dspin_input', |
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58 | 'p_dspin_p2m', |
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59 | dspin_data_size = parameter.Reference('memc_dspin_in_width') |
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60 | ), |
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61 | Port('caba:dspin_output', |
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62 | 'p_dspin_m2p', |
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63 | dspin_data_size = parameter.Reference('memc_dspin_out_width') |
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64 | ), |
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65 | Port('caba:dspin_output', |
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66 | 'p_dspin_clack', |
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67 | dspin_data_size = parameter.Reference('memc_dspin_out_width') |
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68 | ), |
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69 | ], |
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70 | |
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71 | instance_parameters = [ |
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72 | parameter.Module('mtp', 'common:mapping_table'), |
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73 | parameter.Module('mtc', 'common:mapping_table'), |
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74 | parameter.Module('mtx', 'common:mapping_table'), |
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75 | parameter.IntTab('vci_ixr_index'), |
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76 | parameter.IntTab('vci_ini_index'), |
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77 | parameter.IntTab('vci_tgt_index'), |
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78 | parameter.IntTab('vci_tgt_index_cleanup'), |
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79 | parameter.Int ('nways'), |
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80 | parameter.Int ('nsets'), |
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81 | parameter.Int ('nwords'), |
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82 | parameter.Int ('heap_size'), |
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83 | ], |
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84 | ) |
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