1 | /* SOCLIB_LGPL_HEADER_BEGIN |
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2 | * |
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3 | * This file is part of SoCLib, GNU LGPLv2.1. |
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4 | * |
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5 | * SoCLib is free software; you can redistribute it and/or modify it |
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6 | * under the terms of the GNU Lesser General Public License as published |
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7 | * by the Free Software Foundation; version 2.1 of the License. |
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8 | * |
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9 | * SoCLib is distributed in the hope that it will be useful, but |
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10 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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12 | * Lesser General Public License for more details. |
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13 | * |
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14 | * You should have received a copy of the GNU Lesser General Public |
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15 | * License along with SoCLib; if not, write to the Free Software |
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16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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17 | * 02110-1301 USA |
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18 | * |
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19 | * SOCLIB_LGPL_HEADER_END |
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20 | * |
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21 | * Author : Abdelmalek SI MERABET |
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22 | * Date : March 2010 |
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23 | * Copyright: UPMC - LIP6 |
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24 | */ |
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25 | #include "vci_target.h" |
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26 | #include "generic_fifo.h" |
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27 | #include "mapping_table.h" |
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28 | #include "ring_signals_2.h" |
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29 | #include <systemc.h> |
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30 | |
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31 | //#define I_DEBUG |
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32 | //#define IR_DEBUG |
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33 | //#define I_DEBUG_FSM |
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34 | |
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35 | namespace soclib { namespace caba { |
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36 | |
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37 | using namespace sc_core; |
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38 | |
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39 | #ifdef I_DEBUG_FSM |
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40 | namespace { |
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41 | const char *vci_cmd_fsm_state_str_i[] = { |
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42 | "CMD_FIRST_HEADER", |
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43 | "CMD_SECOND_HEADER", |
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44 | "WDATA", |
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45 | }; |
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46 | const char *vci_rsp_fsm_state_str_i[] = { |
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47 | "RSP_HEADER", |
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48 | "RSP_DATA", |
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49 | }; |
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50 | const char *ring_cmd_fsm_state_str_i[] = { |
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51 | "CMD_IDLE", |
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52 | "DEFAULT", |
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53 | "KEEP", |
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54 | }; |
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55 | const char *ring_rsp_fsm_state_str_i[] = { |
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56 | "RSP_IDLE", |
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57 | "LOCAL", |
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58 | "RING", |
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59 | }; |
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60 | } |
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61 | #endif |
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62 | |
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63 | template<typename vci_param, int ring_cmd_data_size, int ring_rsp_data_size> |
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64 | class VciRingInitiator |
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65 | { |
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66 | |
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67 | typedef soclib::caba::VciTarget<vci_param> vci_target_t; |
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68 | typedef RingSignals2 ring_signal_t; |
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69 | |
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70 | private: |
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71 | enum vci_cmd_fsm_state_e { |
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72 | CMD_FIRST_HEADER, // first flit for a ring cmd packet (read or write) |
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73 | CMD_SECOND_HEADER, // second flit for a ring cmd packet |
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74 | WDATA, // data flit for a ring cmd write packet |
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75 | }; |
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76 | |
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77 | enum vci_rsp_fsm_state_e { |
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78 | RSP_HEADER, // first flit for a ring rsp packet (read or write) |
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79 | RSP_DATA, // next flit for a ring rsp packet |
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80 | |
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81 | }; |
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82 | |
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83 | enum ring_rsp_fsm_state_e { |
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84 | RSP_IDLE, // waiting for first flit of a response packet |
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85 | LOCAL, // next flit of a local rsp packet |
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86 | RING, // next flit of a ring rsp packet |
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87 | }; |
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88 | |
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89 | // cmd token allocation fsm |
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90 | enum ring_cmd_fsm_state_e { |
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91 | CMD_IDLE, |
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92 | DEFAULT, |
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93 | KEEP, |
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94 | }; |
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95 | |
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96 | // structural parameters |
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97 | bool m_alloc_init; |
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98 | uint32_t m_srcid; |
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99 | std::string m_name; |
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100 | |
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101 | // internal registers |
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102 | sc_signal<int> r_ring_cmd_fsm; // ring command packet FSM (distributed) |
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103 | sc_signal<int> r_ring_rsp_fsm; // ring response packet FSM |
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104 | sc_signal<int> r_vci_cmd_fsm; // vci command packet FSM |
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105 | sc_signal<int> r_vci_rsp_fsm; // vci response packet FSM |
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106 | |
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107 | sc_signal<bool> r_read_ack; // vci ack if vci cmd read |
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108 | |
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109 | sc_signal<sc_uint<vci_param::S> > r_srcid_save; |
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110 | sc_signal<sc_uint<vci_param::T> > r_trdid_save; |
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111 | sc_signal<sc_uint<vci_param::P> > r_pktid_save; |
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112 | sc_signal<sc_uint<vci_param::E> > r_error_save; |
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113 | |
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114 | // internal fifos |
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115 | GenericFifo<uint64_t > m_cmd_fifo; // fifo for the local command packet |
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116 | GenericFifo<uint64_t > m_rsp_fifo; // fifo for the local response packet |
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117 | |
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118 | // routing table |
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119 | soclib::common::AddressMaskingTable<uint32_t> m_rt; |
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120 | soclib::common::AddressDecodingTable<uint32_t, bool> m_lt; |
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121 | |
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122 | bool trace(int sc_time_stamp) |
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123 | { |
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124 | int time_stamp=0; |
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125 | char *ctime_stamp= getenv("FROM_CYCLE"); |
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126 | |
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127 | if (ctime_stamp) time_stamp=atoi(ctime_stamp); |
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128 | |
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129 | return sc_time_stamp >= time_stamp; |
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130 | |
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131 | } |
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132 | |
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133 | public : |
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134 | |
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135 | VciRingInitiator( |
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136 | const char *name, |
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137 | bool alloc_init, |
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138 | const int &wrapper_fifo_depth, |
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139 | const soclib::common::MappingTable &mt, |
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140 | const soclib::common::IntTab &ringid, |
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141 | const uint32_t &srcid) |
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142 | : m_name(name), |
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143 | m_alloc_init(alloc_init), |
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144 | m_cmd_fifo("m_cmd_fifo", wrapper_fifo_depth), |
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145 | m_rsp_fifo("m_rsp_fifo", wrapper_fifo_depth), |
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146 | m_rt(mt.getIdMaskingTable(ringid.level())), |
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147 | m_lt(mt.getIdLocalityTable(ringid)), |
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148 | m_srcid(srcid), |
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149 | r_ring_cmd_fsm("r_ring_cmd_fsm"), |
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150 | r_ring_rsp_fsm("r_ring_rsp_fsm"), |
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151 | r_vci_cmd_fsm("r_vci_cmd_fsm"), |
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152 | r_vci_rsp_fsm("r_vci_rsp_fsm") |
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153 | |
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154 | {} // end constructor |
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155 | |
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156 | void reset() |
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157 | { |
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158 | if(m_alloc_init) |
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159 | r_ring_cmd_fsm = DEFAULT; |
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160 | else |
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161 | r_ring_cmd_fsm = CMD_IDLE; |
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162 | |
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163 | r_vci_cmd_fsm = CMD_FIRST_HEADER; |
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164 | r_vci_rsp_fsm = RSP_HEADER; |
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165 | r_ring_rsp_fsm = RSP_IDLE; |
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166 | m_cmd_fifo.init(); |
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167 | m_rsp_fifo.init(); |
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168 | } |
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169 | |
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170 | void transition(const vci_target_t &p_vci, const ring_signal_t p_ring_in) |
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171 | { |
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172 | |
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173 | bool cmd_fifo_get = false; |
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174 | bool cmd_fifo_put = false; |
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175 | uint64_t cmd_fifo_data = 0; |
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176 | |
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177 | bool rsp_fifo_get = false; |
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178 | bool rsp_fifo_put = false; |
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179 | uint64_t rsp_fifo_data = 0; |
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180 | |
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181 | #ifdef I_DEBUG_FSM |
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182 | std::cout << "--------------------------------------------" << std::endl; |
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183 | std::cout << " vci cmd fsm = " << vci_cmd_fsm_state_str_i[r_vci_cmd_fsm] << std::endl |
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184 | << " vci rsp fsm = " << vci_rsp_fsm_state_str_i[r_vci_rsp_fsm] << std::endl |
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185 | << " ring cmd fsm = " << ring_cmd_fsm_state_str_i[r_ring_cmd_fsm] << std::endl |
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186 | << " ring rsp fsm = " << ring_rsp_fsm_state_str_i[r_ring_rsp_fsm] << std::endl; |
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187 | #endif |
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188 | //////////// VCI CMD FSM ///////////////////////// |
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189 | switch ( r_vci_cmd_fsm ) |
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190 | { |
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191 | case CMD_FIRST_HEADER: |
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192 | if ( p_vci.cmdval.read() ) |
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193 | { |
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194 | #ifdef I_DEBUG |
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195 | if( trace(sc_time_stamp())) |
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196 | std::cout << sc_time_stamp() << " -- " << m_name |
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197 | << " -- r_vci_cmd_fsm -- CMD_FIRST_HEADER " |
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198 | << " -- vci_cmdval : " << p_vci.cmdval.read() |
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199 | << " -- vci_address : " << std::hex << p_vci.address.read() |
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200 | << " -- vci_srcid : " << p_vci.srcid.read() |
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201 | << " -- fifo_wok : " << m_cmd_fifo.wok() |
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202 | << std::endl; |
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203 | #endif |
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204 | cmd_fifo_data = (uint64_t) ((p_vci.address.read() >> 2) << 1); |
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205 | r_read_ack = p_vci.eop.read() |
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206 | && ((p_vci.cmd.read() == vci_param::CMD_READ) |
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207 | || (p_vci.cmd.read() == vci_param::CMD_LOCKED_READ)); |
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208 | |
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209 | if(m_cmd_fifo.wok()) |
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210 | { |
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211 | cmd_fifo_put = true; |
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212 | |
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213 | // test sur broadcast |
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214 | if ((p_vci.address.read() & 0x3) == 0x3) |
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215 | { |
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216 | #ifdef I_DEBUG |
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217 | if( trace(sc_time_stamp())) |
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218 | std::cout << sc_time_stamp() << " -- " << m_name << " -- " << " broadcast " << std::endl; |
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219 | #endif |
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220 | cmd_fifo_data = cmd_fifo_data | ((uint64_t) 0x1) | |
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221 | (((uint64_t) 0x5) << 1) | |
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222 | (((uint64_t) p_vci.srcid.read()) << 20) | |
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223 | (((uint64_t) (p_vci.trdid.read() & 0xF)) << 16); |
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224 | |
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225 | r_vci_cmd_fsm = WDATA; |
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226 | |
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227 | } |
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228 | else |
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229 | { |
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230 | r_vci_cmd_fsm = CMD_SECOND_HEADER; |
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231 | |
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232 | } |
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233 | } // end fifo wok |
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234 | |
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235 | |
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236 | } // end if cmdval |
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237 | break; |
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238 | |
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239 | case CMD_SECOND_HEADER: |
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240 | |
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241 | |
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242 | if ( p_vci.cmdval.read() && m_cmd_fifo.wok() ) |
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243 | { |
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244 | #ifdef I_DEBUG |
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245 | if( trace(sc_time_stamp())) |
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246 | std::cout << sc_time_stamp() << " -- " << m_name |
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247 | << " -- r_vci_cmd_fsm -- CMD_SECOND_HEADER " |
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248 | << " -- vci_cmdval : " << p_vci.cmdval.read() |
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249 | << " -- fifo_wok : " << m_cmd_fifo.wok() |
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250 | << " -- vci_cmd : " << std::hex << p_vci.cmd.read() |
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251 | << " -- vci_plen : " << p_vci.plen.read() |
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252 | << std::endl; |
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253 | #endif |
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254 | cmd_fifo_put = true; |
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255 | cmd_fifo_data = (((uint64_t) p_vci.srcid.read()) << 20)| |
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256 | (((uint64_t) (p_vci.cmd.read() & 0x3)) << 18) | |
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257 | (((uint64_t) (p_vci.plen.read() & 0xFF)) << 8) | |
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258 | (((uint64_t) (p_vci.pktid.read() & 0xF)) << 4) | |
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259 | (uint64_t) (p_vci.trdid.read() & 0xF); |
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260 | if (p_vci.contig == true) |
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261 | cmd_fifo_data = cmd_fifo_data | ((uint64_t) 0x1) << 17; |
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262 | if (p_vci.cons == true) |
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263 | cmd_fifo_data = cmd_fifo_data | ((uint64_t) 0x1) << 16; |
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264 | if(r_read_ack) |
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265 | { |
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266 | cmd_fifo_data = cmd_fifo_data | (((uint64_t) 0x1) << (ring_cmd_data_size-1)); //39 |
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267 | r_vci_cmd_fsm = CMD_FIRST_HEADER; |
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268 | } |
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269 | else // write command |
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270 | { |
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271 | r_vci_cmd_fsm = WDATA; |
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272 | } |
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273 | } // endif cmdval |
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274 | break; |
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275 | |
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276 | case WDATA: |
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277 | |
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278 | |
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279 | if ( p_vci.cmdval.read() && m_cmd_fifo.wok() ) |
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280 | { |
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281 | #ifdef I_DEBUG |
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282 | if( trace(sc_time_stamp())) |
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283 | std::cout << sc_time_stamp() << " -- " << m_name |
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284 | << " -- r_vci_cmd_fsm -- WDATA " |
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285 | << " -- vci_cmdval : " << p_vci.cmdval.read() |
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286 | << " -- fifo_wok : " << m_cmd_fifo.wok() |
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287 | << " -- vci_wdata : " << std::hex << p_vci.wdata.read() |
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288 | << " -- vci_be : " << p_vci.be.read() |
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289 | << " -- vci_eop : " << p_vci.eop.read() |
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290 | << std::endl; |
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291 | #endif |
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292 | |
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293 | |
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294 | cmd_fifo_put = true; |
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295 | cmd_fifo_data = ((uint64_t) p_vci.wdata.read()) | (((uint64_t) p_vci.be.read()) << 32); |
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296 | if ( p_vci.eop.read() == true ) |
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297 | { |
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298 | r_vci_cmd_fsm = CMD_FIRST_HEADER; |
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299 | cmd_fifo_data = cmd_fifo_data | (((uint64_t) 0x1) << (ring_cmd_data_size-1)); //39 |
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300 | } |
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301 | else |
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302 | r_vci_cmd_fsm = WDATA; |
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303 | } // end if cmdval |
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304 | break; |
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305 | |
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306 | } // end switch r_vci_cmd_fsm |
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307 | |
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308 | /////////// VCI RSP FSM ///////////////////////// |
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309 | switch ( r_vci_rsp_fsm ) |
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310 | { |
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311 | case RSP_HEADER: |
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312 | |
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313 | if ( m_rsp_fifo.rok() ) |
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314 | { |
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315 | |
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316 | #ifdef I_DEBUG |
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317 | if( trace(sc_time_stamp())) |
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318 | std::cout << sc_time_stamp() << " -- " << m_name |
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319 | << " -- r_vci_rsp_fsm -- RSP_HEADER " |
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320 | << " -- fifo_rsp_rok : " << m_rsp_fifo.rok() |
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321 | << std::endl; |
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322 | #endif |
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323 | rsp_fifo_get = true; |
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324 | r_srcid_save = ((sc_uint<vci_param::S>) m_rsp_fifo.read()) >> 12; |
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325 | r_trdid_save = (sc_uint<vci_param::T>) (m_rsp_fifo.read() & 0xF); |
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326 | r_pktid_save = (((sc_uint<vci_param::P>) m_rsp_fifo.read()) >> 4) & 0xF; |
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327 | r_error_save = (((sc_uint<vci_param::E>) m_rsp_fifo.read()) >> 8) & 0x1; |
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328 | r_vci_rsp_fsm = RSP_DATA; |
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329 | } |
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330 | break; |
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331 | |
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332 | case RSP_DATA: |
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333 | |
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334 | if ( p_vci.rspack.read() && m_rsp_fifo.rok() ) |
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335 | { |
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336 | #ifdef I_DEBUG |
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337 | if( trace(sc_time_stamp())) |
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338 | std::cout << sc_time_stamp() << " -- " << m_name |
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339 | << " -- r_vci_rsp_fsm -- RSP_DATA " |
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340 | << " -- rsrcid : " << std::hex << r_srcid_save.read() |
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341 | << " -- rdata : " << m_rsp_fifo.read() |
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342 | << " -- rerror : " << r_error_save.read() |
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343 | << std::endl; |
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344 | #endif |
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345 | rsp_fifo_get = true; |
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346 | if(((m_rsp_fifo.read() >> 32) & 0x1) == 0x1) |
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347 | r_vci_rsp_fsm = RSP_HEADER; |
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348 | } // endif rspack && rok |
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349 | break; |
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350 | |
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351 | } // end switch r_vci_rsp_fsm |
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352 | |
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353 | //////////// RING CMD FSM ///////////////////////// |
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354 | switch( r_ring_cmd_fsm ) |
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355 | { |
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356 | case CMD_IDLE: |
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357 | #ifdef IR_DEBUG |
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358 | if( trace(sc_time_stamp())) |
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359 | std::cout << sc_time_stamp() << " -- " << m_name << " -- r_ring_cmd_fsm : CMD_IDLE " |
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360 | << " -- fifo ROK : " << m_cmd_fifo.rok() |
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361 | << " -- in grant : " << p_ring_in.cmd_grant |
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362 | << " -- fifo _data : " << std::hex << m_cmd_fifo.read() |
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363 | << std::endl; |
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364 | |
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365 | #endif |
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366 | |
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367 | if ( p_ring_in.cmd_grant && m_cmd_fifo.rok() ) |
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368 | { |
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369 | // debug above is here |
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370 | r_ring_cmd_fsm = KEEP; |
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371 | } |
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372 | break; |
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373 | |
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374 | case DEFAULT: |
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375 | #ifdef IR_DEBUG |
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376 | if( trace(sc_time_stamp())) |
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377 | std::cout << sc_time_stamp() << " -- " << m_name << " -- r_ring_cmd_fsm : DEFAULT " |
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378 | << " -- fifo ROK : " << m_cmd_fifo.rok() |
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379 | << " -- in grant : " << p_ring_in.cmd_grant |
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380 | << " -- fifo _data : " << std::hex << m_cmd_fifo.read() |
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381 | << std::endl; |
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382 | |
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383 | #endif |
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384 | |
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385 | |
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386 | if ( m_cmd_fifo.rok() ) |
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387 | { |
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388 | // debug above is here |
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389 | cmd_fifo_get = p_ring_in.cmd_r; |
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390 | r_ring_cmd_fsm = KEEP; |
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391 | } |
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392 | else if ( !p_ring_in.cmd_grant ) |
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393 | r_ring_cmd_fsm = CMD_IDLE; |
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394 | break; |
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395 | |
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396 | case KEEP: |
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397 | #ifdef IR_DEBUG |
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398 | if( trace(sc_time_stamp())) |
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399 | std::cout << sc_time_stamp() << " -- " << m_name |
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400 | << " -- r_ring_cmd_fsm : KEEP " |
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401 | << " -- fifo_rok : " << m_cmd_fifo.rok() |
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402 | << " -- in grant : " << p_ring_in.cmd_grant |
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403 | << " -- ring_in_wok : " << p_ring_in.cmd_r |
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404 | << " -- fifo_out_data : " << std::hex << m_cmd_fifo.read() |
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405 | << std::endl; |
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406 | #endif |
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407 | |
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408 | if(m_cmd_fifo.rok() && p_ring_in.cmd_r ) |
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409 | { |
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410 | // debug above is here |
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411 | cmd_fifo_get = true; |
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412 | if (((int) (m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1) // 39 |
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413 | { |
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414 | if ( p_ring_in.cmd_grant ) |
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415 | r_ring_cmd_fsm = DEFAULT; |
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416 | else |
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417 | r_ring_cmd_fsm = CMD_IDLE; |
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418 | } |
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419 | } |
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420 | break; |
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421 | |
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422 | } // end switch ring cmd fsm |
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423 | |
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424 | /////////// RING RSP FSM //////////////////////// |
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425 | |
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426 | switch( r_ring_rsp_fsm ) |
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427 | { |
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428 | case RSP_IDLE: |
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429 | { |
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430 | int rsrcid = (int) ((p_ring_in.rsp_data >> 12) & 0x3FFF); |
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431 | bool islocal = m_lt[rsrcid] && (m_rt[rsrcid] == m_srcid); |
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432 | bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1; |
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433 | #ifdef IR_DEBUG |
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434 | if( trace(sc_time_stamp())) |
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435 | std::cout << sc_time_stamp() << " -- " << m_name |
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436 | << " -- ring_rsp_fsm -- RSP_IDLE " |
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437 | << " -- islocal : " << islocal |
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438 | << " -- eop : " << reop |
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439 | << " -- rsrcid : " << std::hex << rsrcid |
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440 | << " -- in rok : " << p_ring_in.rsp_w |
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441 | << " -- in wok : " << p_ring_in.rsp_r |
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442 | << " -- fifo wok : " << m_rsp_fifo.wok() |
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443 | << std::endl; |
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444 | #endif |
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445 | if (p_ring_in.rsp_w && !reop && islocal) |
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446 | { |
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447 | r_ring_rsp_fsm = LOCAL; |
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448 | rsp_fifo_put = m_rsp_fifo.wok(); |
---|
449 | rsp_fifo_data = p_ring_in.rsp_data; |
---|
450 | } |
---|
451 | if (p_ring_in.rsp_w && !reop && !islocal) |
---|
452 | { |
---|
453 | r_ring_rsp_fsm = RING; |
---|
454 | } |
---|
455 | if (!p_ring_in.rsp_w || reop ) |
---|
456 | { |
---|
457 | r_ring_rsp_fsm = RSP_IDLE; |
---|
458 | } |
---|
459 | } |
---|
460 | break; |
---|
461 | |
---|
462 | case LOCAL: |
---|
463 | { |
---|
464 | bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1; |
---|
465 | |
---|
466 | #ifdef IR_DEBUG |
---|
467 | if( trace(sc_time_stamp())) |
---|
468 | std::cout << sc_time_stamp() << " -- " << m_name |
---|
469 | << " -- ring_rsp_fsm -- LOCAL " |
---|
470 | << " -- in rok : " << p_ring_in.rsp_w |
---|
471 | << " -- fifo wok : " << m_rsp_fifo.wok() |
---|
472 | << " -- in data : " << std::hex << p_ring_in.rsp_data |
---|
473 | << " -- eop : " << reop |
---|
474 | << std::endl; |
---|
475 | #endif |
---|
476 | |
---|
477 | |
---|
478 | if (p_ring_in.rsp_w && m_rsp_fifo.wok() && reop) |
---|
479 | { |
---|
480 | |
---|
481 | rsp_fifo_put = true; |
---|
482 | rsp_fifo_data = p_ring_in.rsp_data; |
---|
483 | r_ring_rsp_fsm = RSP_IDLE; |
---|
484 | } |
---|
485 | if (!p_ring_in.rsp_w || !m_rsp_fifo.wok() || !reop) |
---|
486 | { |
---|
487 | |
---|
488 | rsp_fifo_put = p_ring_in.rsp_w && m_rsp_fifo.wok(); |
---|
489 | rsp_fifo_data = p_ring_in.rsp_data; |
---|
490 | r_ring_rsp_fsm = LOCAL; |
---|
491 | } |
---|
492 | } |
---|
493 | break; |
---|
494 | |
---|
495 | case RING: |
---|
496 | { |
---|
497 | bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1; |
---|
498 | |
---|
499 | #ifdef IR_DEBUG |
---|
500 | if( trace(sc_time_stamp())) |
---|
501 | std::cout << sc_time_stamp() << " -- " << m_name |
---|
502 | << " -- ring_rsp_fsm -- RING " |
---|
503 | << " -- in rok : " << p_ring_in.rsp_w |
---|
504 | << " -- in wok : " << p_ring_in.rsp_r |
---|
505 | << " -- in data : " << std::hex << p_ring_in.rsp_data |
---|
506 | << " -- eop : " << reop |
---|
507 | << std::endl; |
---|
508 | #endif |
---|
509 | |
---|
510 | |
---|
511 | if (p_ring_in.rsp_w && reop) |
---|
512 | { |
---|
513 | r_ring_rsp_fsm = RSP_IDLE; |
---|
514 | } |
---|
515 | else |
---|
516 | { |
---|
517 | r_ring_rsp_fsm = RING; |
---|
518 | } |
---|
519 | } |
---|
520 | break; |
---|
521 | |
---|
522 | } // end switch rsp fsm |
---|
523 | |
---|
524 | //////////////////////// |
---|
525 | // fifos update // |
---|
526 | //////////////////////// |
---|
527 | |
---|
528 | // local cmd fifo update |
---|
529 | if ( cmd_fifo_put && cmd_fifo_get ) m_cmd_fifo.put_and_get(cmd_fifo_data); |
---|
530 | else if ( cmd_fifo_put && !cmd_fifo_get ) m_cmd_fifo.simple_put(cmd_fifo_data); |
---|
531 | else if ( !cmd_fifo_put && cmd_fifo_get ) m_cmd_fifo.simple_get(); |
---|
532 | |
---|
533 | // local rsp fifo update |
---|
534 | if ( rsp_fifo_put && rsp_fifo_get ) m_rsp_fifo.put_and_get(rsp_fifo_data); |
---|
535 | else if ( rsp_fifo_put && !rsp_fifo_get ) m_rsp_fifo.simple_put(rsp_fifo_data); |
---|
536 | else if ( !rsp_fifo_put && rsp_fifo_get ) m_rsp_fifo.simple_get(); |
---|
537 | |
---|
538 | } // end Transition() |
---|
539 | |
---|
540 | /////////////////////////////////////////////////////////////////// |
---|
541 | void genMoore(vci_target_t &p_vci) |
---|
542 | /////////////////////////////////////////////////////////////////// |
---|
543 | { |
---|
544 | |
---|
545 | switch ( r_vci_cmd_fsm ) |
---|
546 | { |
---|
547 | case CMD_FIRST_HEADER: |
---|
548 | p_vci.cmdack = false; |
---|
549 | break; |
---|
550 | |
---|
551 | case CMD_SECOND_HEADER: |
---|
552 | p_vci.cmdack = r_read_ack; |
---|
553 | break; |
---|
554 | |
---|
555 | case WDATA: |
---|
556 | p_vci.cmdack = m_cmd_fifo.wok(); |
---|
557 | break; |
---|
558 | |
---|
559 | } // end switch fsm |
---|
560 | |
---|
561 | switch ( r_vci_rsp_fsm ) |
---|
562 | { |
---|
563 | case RSP_HEADER: |
---|
564 | p_vci.rspval = false; |
---|
565 | break; |
---|
566 | |
---|
567 | case RSP_DATA: |
---|
568 | p_vci.rspval = m_rsp_fifo.rok(); |
---|
569 | p_vci.rsrcid = r_srcid_save; |
---|
570 | p_vci.rtrdid = r_trdid_save; |
---|
571 | p_vci.rpktid = r_pktid_save; |
---|
572 | p_vci.rerror = r_error_save; |
---|
573 | p_vci.rdata = (sc_uint<32>) (m_rsp_fifo.read()); |
---|
574 | if (((m_rsp_fifo.read() >> 32) & 0x1) == 0x1) |
---|
575 | p_vci.reop = true; |
---|
576 | else |
---|
577 | p_vci.reop = false; |
---|
578 | break; |
---|
579 | |
---|
580 | } // end switch fsm |
---|
581 | } // end genMoore |
---|
582 | |
---|
583 | /////////////////////////////////////////////////////////////////// |
---|
584 | void update_ring_signals(ring_signal_t p_ring_in, ring_signal_t &p_ring_out) |
---|
585 | /////////////////////////////////////////////////////////////////// |
---|
586 | { |
---|
587 | switch( r_ring_cmd_fsm ) |
---|
588 | { |
---|
589 | case CMD_IDLE: |
---|
590 | p_ring_out.cmd_grant = p_ring_in.cmd_grant && !m_cmd_fifo.rok(); |
---|
591 | |
---|
592 | p_ring_out.cmd_r = p_ring_in.cmd_r; |
---|
593 | |
---|
594 | p_ring_out.cmd_w = p_ring_in.cmd_w; |
---|
595 | p_ring_out.cmd_data = p_ring_in.cmd_data; |
---|
596 | break; |
---|
597 | |
---|
598 | case DEFAULT: |
---|
599 | p_ring_out.cmd_grant = !( m_cmd_fifo.rok()); |
---|
600 | |
---|
601 | p_ring_out.cmd_r = 1; |
---|
602 | |
---|
603 | p_ring_out.cmd_w = m_cmd_fifo.rok(); |
---|
604 | p_ring_out.cmd_data = m_cmd_fifo.read(); |
---|
605 | break; |
---|
606 | |
---|
607 | case KEEP: |
---|
608 | int cmd_fifo_eop = (int) ((m_cmd_fifo.read() >> (ring_cmd_data_size - 1)) & 0x1) ; //39 |
---|
609 | p_ring_out.cmd_grant = m_cmd_fifo.rok() && p_ring_in.cmd_r && (cmd_fifo_eop == 1); |
---|
610 | |
---|
611 | p_ring_out.cmd_r = 1; |
---|
612 | |
---|
613 | p_ring_out.cmd_w = m_cmd_fifo.rok(); |
---|
614 | p_ring_out.cmd_data = m_cmd_fifo.read(); |
---|
615 | break; |
---|
616 | |
---|
617 | } // end switch |
---|
618 | |
---|
619 | p_ring_out.rsp_grant = p_ring_in.rsp_grant; |
---|
620 | |
---|
621 | p_ring_out.rsp_w = p_ring_in.rsp_w; |
---|
622 | p_ring_out.rsp_data = p_ring_in.rsp_data; |
---|
623 | |
---|
624 | switch( r_ring_rsp_fsm ) |
---|
625 | { |
---|
626 | case RSP_IDLE: |
---|
627 | { |
---|
628 | int rsrcid = (int) ((p_ring_in.rsp_data >> 12 ) & 0x3FFF); |
---|
629 | bool islocal = m_lt[rsrcid] && (m_rt[rsrcid] == m_srcid); |
---|
630 | bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1; |
---|
631 | |
---|
632 | if(p_ring_in.rsp_w && !reop && islocal) { |
---|
633 | p_ring_out.rsp_r = m_rsp_fifo.wok(); |
---|
634 | } |
---|
635 | if(p_ring_in.rsp_w && !reop && !islocal) { |
---|
636 | p_ring_out.rsp_r = p_ring_in.rsp_r; |
---|
637 | } |
---|
638 | if(!p_ring_in.rsp_w || reop) { |
---|
639 | p_ring_out.rsp_r = p_ring_in.rsp_r; |
---|
640 | } |
---|
641 | |
---|
642 | } |
---|
643 | break; |
---|
644 | |
---|
645 | case LOCAL: |
---|
646 | p_ring_out.rsp_r = m_rsp_fifo.wok(); |
---|
647 | break; |
---|
648 | |
---|
649 | case RING: |
---|
650 | p_ring_out.rsp_r = p_ring_in.rsp_r; |
---|
651 | break; |
---|
652 | } // end switch |
---|
653 | |
---|
654 | |
---|
655 | } // end update_ring_signals |
---|
656 | |
---|
657 | }; |
---|
658 | |
---|
659 | }} // end namespace |
---|
660 | |
---|
661 | |
---|