source: trunk/modules/vci_block_device_tsar_v4/caba/source/include/vci_block_device_tsar_v4.h @ 284

Last change on this file since 284 was 284, checked in by joannou, 11 years ago

Updated of the vci trdid/rtrdid and pktid/rpktid fields for the direct network.
The pktid values are commented in the components'headers that use them.

  • In the vci_vdspin_*_wrapper components
    • added the transmission of the pktid/rpktid field
  • In the vci_cc_vcache_wrapper_v4
    • updated gen_moore() to transmit a valid pktid
    • updated transition(), RSP_FSM now checks the rpktid
  • In the vci_mem_cache_v4
    • transition(), tests originally performed on trdid now use pktid
    • gen_moore() transmit rpktid
    • !!! THE L1_MULTI_CACHE MECHANISM IS NO LONGER COMPATIBLE !!!
  • In vci_block_device_tsar_v4
    • updated gen_moore function to transmit a valid pktid

Also renamed the "SC" states in "CAS" states in the concerned FSMs on the vci_cc_vcache_wrapper_v4 and the vci_mem_cache_v4

File size: 8.5 KB
Line 
1
2/* -*- c++ -*-
3 *
4 * SOCLIB_LGPL_HEADER_BEGIN
5 *
6 * This file is part of SoCLib, GNU LGPLv2.1.
7 *
8 * SoCLib is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU Lesser General Public License as published
10 * by the Free Software Foundation; version 2.1 of the License.
11 *
12 * SoCLib is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with SoCLib; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * SOCLIB_LGPL_HEADER_END
23 *
24 * Copyright (c) UPMC, Lip6, Asim
25 *         alain.greiner@lip6.fr april 2011
26 *
27 * Maintainers: alain
28 */
29
30//////////////////////////////////////////////////////////////////////////////////////
31// This component is a simplified disk controller with a VCI interface.
32// This component can perform data transfers between one single file belonging
33// to the host system and a buffer in the memory of the virtual prototype.
34// The file name is an argument of the constructor.
35// This component has a DMA capability, and is both a target and an initiator.
36// The block size (bytes), and the burst size (bytes) must be power of 2.
37// The burst size is typically a cache line.
38// If the memory buffer is not constrained to be aligned on a burst boundary.
39// Both read and write transfers are supported. An IRQ is optionally
40// asserted when the transfer is completed.
41//
42// As a target this block device controler contains 8 memory mapped registers,
43// taking 32 bytes in the address space.
44// - BLOCK_DEVICE_BUFFER        0x00 (read/write)    Memory buffer base address.
45// - BLOCK_DEVICE_COUNT         0x04 (read/write)    Number of blocks to be transfered.
46// - BLOCK_DEVICE_LBA           0x08 (read/write)    Index of first block in the file.
47// - BLOCK_DEVICE_OP            0x0C (write-only)    Writing here starts the operation.
48// - BLOCK_DEVICE_STATUS        0x10 (read-only)     Block Device status.
49// - BLOCK_DEVICE_IRQ_ENABLE    0x14 (read/write)    IRQ enabled if non zero.
50// - BLOCK_DEVICE_SIZE          0x18 (read-only)     Number of addressable blocks.
51// - BLOCK_DEVICE_BLOCK_SIZE    0x1C (read_only)     Block size in bytes.
52//
53// The following operations codes are supported:
54// - BLOCK_DEVICE_NOOP          No operation
55// - BLOCK_DEVICE_READ          From block device to memory
56// - BLOCK_DEVICE_WRITE         From memory to block device
57//
58// The BLOCK_DEVICE_STATUS is actually defined by the initiator FSM state.
59// The following values are defined for device status:
60// -BLOCK_DEVICE_IDLE           0
61// -BLOCK_DEVICE_BUSY           1
62// -BLOCK_DEVICE_READ_SUCCESS   2
63// -BLOCK_DEVICE_WRITE_SUCCESS  3
64// -BLOCK_DEVICE_READ_ERROR     4
65// -BLOCK_DEVICE_WRITE_ERROR    5
66//
67// In the 4 states READ_ERROR, READ_SUCCESS, WRITE_ERROR, WRITE_SUCCESS,
68// the IRQ is asserted (if it is enabled).
69// A read access to the BLOCK_DEVICE_STATUS in these 4 states reset
70// the initiator FSM state to IDLE, and acknowledge the IRQ.
71// Any write access to registers BUFFER, COUNT, LBA, OP is ignored
72// if the device is not IDLE.
73///////////////////////////////////////////////////////////////////////////
74
75#ifndef SOCLIB_VCI_BLOCK_DEVICE_TSAR_V4_H
76#define SOCLIB_VCI_BLOCK_DEVICE_TSAR_V4_H
77
78#include <stdint.h>
79#include <systemc>
80#include "caba_base_module.h"
81#include "mapping_table.h"
82#include "vci_target.h"
83
84namespace soclib {
85namespace caba {
86
87using namespace sc_core;
88
89template<typename vci_param>
90class VciBlockDeviceTsarV4
91        : public caba::BaseModule
92{
93private:
94
95    // Registers
96    sc_signal<int>               r_target_fsm;           // target fsm state register
97    sc_signal<int>               r_initiator_fsm;    // initiator fsm state register
98    sc_signal<bool>              r_irq_enable;           // default value is true
99    sc_signal<uint32_t>          r_nblocks;              // number of blocks in transfer
100    sc_signal<uint32_t>          r_buf_address;          // memory buffer address
101    sc_signal<uint32_t>          r_lba;                  // first block index
102    sc_signal<bool>              r_read;                 // requested operation
103    sc_signal<uint32_t>          r_index;                // flit index in local buffer
104    sc_signal<uint32_t>          r_latency_count;    // latency counter
105    sc_signal<uint32_t>          r_flit_count;           // flit counter (in a burst)
106    sc_signal<uint32_t>          r_burst_count;          // burst counter (in a block)
107    sc_signal<uint32_t>          r_block_count;          // block counter (in a transfer)
108    sc_signal<uint32_t>          r_burst_offset;     // number of non aligned flits
109    sc_signal<uint32_t>          r_burst_nflits;     // number of flits in a burst
110    sc_signal<bool>              r_go;                   // command from T_FSM to M_FSM
111
112    sc_signal<sc_dt::sc_uint<vci_param::S> >    r_srcid;                // save srcid
113    sc_signal<sc_dt::sc_uint<vci_param::T> >    r_trdid;                // save trdid
114    sc_signal<sc_dt::sc_uint<vci_param::P> >    r_pktid;                // save pktid
115
116    uint32_t*                    r_local_buffer;         // capacity is one block
117
118    // structural parameters
119    soclib::common::Segment      m_segment;              // segment associated to target
120    uint32_t                     m_srcid;                // initiator index
121    int                          m_fd;                   // File descriptor
122    uint64_t                     m_device_size;          // Total number of blocks
123    const uint32_t               m_flits_per_block;      // number of flits in a block
124    const uint32_t               m_flits_per_burst;      // number of flits in a burst
125    const uint32_t               m_bursts_per_block; // number of bursts in a block
126    const uint32_t               m_latency;              // device latency
127
128    // methods
129    void transition();
130    void genMoore();
131
132    //  Master FSM states
133    enum {
134    M_IDLE              = 0,
135
136    M_READ_BLOCK        = 1,
137    M_READ_BURST        = 2,
138    M_READ_CMD          = 3,
139    M_READ_RSP          = 4,
140    M_READ_SUCCESS      = 5,
141    M_READ_ERROR        = 6,
142
143    M_WRITE_BURST       = 7,
144    M_WRITE_CMD         = 8,
145    M_WRITE_RSP         = 9,
146    M_WRITE_BLOCK       = 10,
147    M_WRITE_SUCCESS     = 11,
148    M_WRITE_ERROR       = 12,
149    };
150
151    // Target FSM states
152    enum {
153    T_IDLE              = 0,
154    T_WRITE_BUFFER      = 1,
155    T_READ_BUFFER       = 2,
156    T_WRITE_COUNT       = 3,
157    T_READ_COUNT        = 4,
158    T_WRITE_LBA         = 5,
159    T_READ_LBA          = 6,
160    T_WRITE_OP          = 7,
161    T_READ_STATUS       = 8,
162    T_WRITE_IRQEN       = 9,
163    T_READ_IRQEN        = 10,
164    T_READ_SIZE         = 11,
165    T_READ_BLOCK        = 12,
166    T_READ_ERROR        = 13,
167    T_WRITE_ERROR       = 14,
168    };
169
170    // Error codes values
171    enum {
172    VCI_READ_OK         = 0,
173    VCI_READ_ERROR      = 1,
174    VCI_WRITE_OK        = 2,
175    VCI_WRITE_ERROR     = 3,
176    };
177
178    /* transaction type, pktid field */
179    enum transaction_type_e
180    {
181      // b3 unused
182      // b2 READ / NOT READ
183      // Si READ
184      //  b1 DATA / INS
185      //  b0 UNC / MISS
186      // Si NOT READ
187      //  b1 accÚs table llsc type SW / other
188      //  b2 WRITE/CAS/LL/SC
189      TYPE_READ_DATA_UNC          = 0x0,
190      TYPE_READ_DATA_MISS         = 0x1,
191      TYPE_READ_INS_UNC           = 0x2,
192      TYPE_READ_INS_MISS          = 0x3,
193      TYPE_WRITE                  = 0x4,
194      TYPE_CAS                    = 0x5,
195      TYPE_LL                     = 0x6,
196      TYPE_SC                     = 0x7
197    };
198
199protected:
200
201    SC_HAS_PROCESS(VciBlockDeviceTsarV4);
202
203public:
204
205    // ports
206    sc_in<bool>                                               p_clk;
207    sc_in<bool>                                               p_resetn;
208    soclib::caba::VciInitiator<vci_param> p_vci_initiator;
209    soclib::caba::VciTarget<vci_param>    p_vci_target;
210    sc_out<bool>                                              p_irq;
211
212    void print_trace();
213
214    // Constructor   
215    VciBlockDeviceTsarV4(
216                sc_module_name                      name,
217                const soclib::common::MappingTable      &mt,
218                const soclib::common::IntTab            &srcid,
219                const soclib::common::IntTab            &tgtid,
220        const std::string                   &filename,
221        const uint32_t                      block_size = 512,
222        const uint32_t                      burst_size = 64,
223        const uint32_t                      latency = 0);
224};
225
226}}
227
228#endif /* SOCLIB_VCI_BLOCK_DEVICE_TSAR_V4_H */
229
230// Local Variables:
231// tab-width: 4
232// c-basic-offset: 4
233// c-file-offsets:((innamespace . 0)(inline-open . 0))
234// indent-tabs-mode: nil
235// End:
236
237// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
238
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