[2] | 1 | /* -*- c++ -*- |
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| 2 | * |
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| 3 | * SOCLIB_LGPL_HEADER_BEGIN |
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| 4 | * |
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| 5 | * This file is part of SoCLib, GNU LGPLv2.1. |
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| 6 | * |
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| 7 | * SoCLib is free software; you can redistribute it and/or modify it |
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| 8 | * under the terms of the GNU Lesser General Public License as published |
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| 9 | * by the Free Software Foundation; version 2.1 of the License. |
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| 10 | * |
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| 11 | * SoCLib is distributed in the hope that it will be useful, but |
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| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 14 | * Lesser General Public License for more details. |
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| 15 | * |
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| 16 | * You should have received a copy of the GNU Lesser General Public |
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| 17 | * License along with SoCLib; if not, write to the Free Software |
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| 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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| 19 | * 02110-1301 USA |
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| 20 | * |
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| 21 | * SOCLIB_LGPL_HEADER_END |
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| 22 | * |
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| 23 | * Copyright (c) UPMC, Lip6, Asim |
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| 24 | * Nicolas Pouillon <nipo@ssji.net>, 2007 |
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| 25 | */ |
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| 26 | |
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| 27 | #include <stdint.h> |
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| 28 | #include "register.h" |
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| 29 | #include "../include/vci_dma_tsar_v2.h" |
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| 30 | #include "dma_tsar_v2.h" |
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| 31 | |
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| 32 | namespace soclib { namespace caba { |
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| 33 | |
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| 34 | #define tmpl(t) template<typename vci_param> t VciDmaTsarV2<vci_param> |
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| 35 | |
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| 36 | tmpl(bool)::on_write(int seg, typename vci_param::addr_t addr, typename vci_param::data_t data, int be) |
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| 37 | { |
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| 38 | int cell = (int)addr / vci_param::B; |
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| 39 | |
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| 40 | switch ((enum SoclibDmaRegisters)cell) { |
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| 41 | case DMA_SRC: |
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| 42 | m_src = data; |
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| 43 | return true; |
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| 44 | case DMA_DST: |
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| 45 | m_dst = data; |
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| 46 | return true; |
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| 47 | case DMA_LEN: |
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| 48 | m_len = data; |
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| 49 | return true; |
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| 50 | case DMA_RESET: |
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| 51 | m_must_finish = true; |
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| 52 | m_irq_enabled = false; |
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| 53 | r_irq = false; |
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| 54 | return true; |
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| 55 | case DMA_IRQ_DISABLED: |
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| 56 | m_irq_enabled = !data; |
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| 57 | return true; |
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| 58 | }; |
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| 59 | return false; |
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| 60 | } |
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| 61 | |
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| 62 | tmpl(void)::ended() |
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| 63 | { |
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| 64 | if ( m_irq_enabled ) |
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| 65 | r_irq = true; |
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| 66 | m_len = 0; |
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| 67 | m_must_finish = false; |
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| 68 | m_handling = false; |
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| 69 | } |
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| 70 | |
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| 71 | tmpl(bool)::on_read(int seg, typename vci_param::addr_t addr, typename vci_param::data_t &data) |
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| 72 | { |
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| 73 | int cell = (int)addr / vci_param::B; |
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| 74 | |
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| 75 | switch ((enum SoclibDmaRegisters)cell) { |
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| 76 | case DMA_SRC: |
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| 77 | data = m_src; |
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| 78 | return true; |
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| 79 | case DMA_DST: |
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| 80 | data = m_dst; |
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| 81 | return true; |
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| 82 | case DMA_LEN: |
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| 83 | data = m_len; |
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| 84 | return true; |
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| 85 | default: |
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| 86 | return false; |
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| 87 | } |
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| 88 | return false; |
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| 89 | } |
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| 90 | |
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| 91 | tmpl(void)::read_done( req_t *req ) |
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| 92 | { |
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| 93 | if ( !req->failed() && !m_must_finish ) { |
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| 94 | ssize_t burst = m_offset_buffer; |
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| 95 | |
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| 96 | m_partial = false; |
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| 97 | if( (( m_dst+m_offset ) & ~( m_data.size()-1 )) != |
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| 98 | (( m_dst+m_offset+m_offset_buffer-1 ) & ~( m_data.size()-1 )) ){ |
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| 99 | burst = (((m_dst+m_offset) & ~( m_data.size()-1))+m_data.size()) - (m_dst+m_offset); |
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| 100 | m_partial = true; |
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| 101 | } |
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| 102 | VciInitSimpleWriteReq<vci_param> *new_req = |
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| 103 | new VciInitSimpleWriteReq<vci_param>( m_dst+m_offset, &m_data[0], burst ); |
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| 104 | new_req->setDone( this, ON_T(write_finish) ); |
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| 105 | m_vci_init_fsm.doReq( new_req ); |
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| 106 | } else { |
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| 107 | ended(); |
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| 108 | } |
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| 109 | delete req; |
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| 110 | } |
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| 111 | |
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| 112 | tmpl(void)::write_finish( req_t *req ) |
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| 113 | { |
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| 114 | ssize_t burst = 0; |
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| 115 | uint32_t offset = 0; |
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| 116 | if( m_partial ){ |
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| 117 | burst = m_dst + m_offset + m_offset_buffer - ((m_dst+m_offset+m_offset_buffer) & ~( m_data.size()-1)); |
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| 118 | offset = m_offset_buffer - burst ; |
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| 119 | } else { |
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| 120 | m_offset += m_offset_buffer; |
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| 121 | } |
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| 122 | if ( !req->failed() && !m_must_finish ){ |
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| 123 | if(m_partial){ |
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| 124 | VciInitSimpleWriteReq<vci_param> *new_req = |
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| 125 | new VciInitSimpleWriteReq<vci_param>( m_dst+m_offset+offset, &m_data[offset], burst ); |
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| 126 | new_req->setDone( this, ON_T(write_finish) ); |
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| 127 | m_partial = false; |
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| 128 | m_vci_init_fsm.doReq( new_req ); |
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| 129 | delete req; |
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| 130 | return; |
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| 131 | } |
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| 132 | next_req(); |
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| 133 | } |
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| 134 | else { |
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| 135 | ended(); |
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| 136 | } |
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| 137 | delete req; |
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| 138 | } |
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| 139 | |
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| 140 | tmpl(void)::next_req() |
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| 141 | { |
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| 142 | ssize_t remaining = (ssize_t)m_len-(size_t)m_offset; |
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| 143 | if ( remaining <= 0 ) { |
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| 144 | ended(); |
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| 145 | return; |
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| 146 | } |
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| 147 | |
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| 148 | ssize_t burst = m_data.size(); |
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| 149 | m_partial = false; |
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| 150 | if ( ( m_src+m_offset ) & ( m_data.size()-1 ) ){ |
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| 151 | burst = m_data.size() - ( (m_src+m_offset) & (m_data.size()-1) ); |
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| 152 | m_partial = true; |
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| 153 | } |
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| 154 | if ( remaining < burst ){ |
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| 155 | burst = remaining; |
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| 156 | m_partial = true; |
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| 157 | } |
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| 158 | |
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| 159 | m_offset_buffer = burst; |
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| 160 | |
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| 161 | VciInitSimpleReadReq<vci_param> *req = |
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| 162 | new VciInitSimpleReadReq<vci_param>( |
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| 163 | &m_data[0], (m_src+m_offset), burst ); |
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| 164 | req->setDone( this, ON_T(read_done) ); |
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| 165 | m_vci_init_fsm.doReq( req ); |
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| 166 | } |
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| 167 | |
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| 168 | tmpl(void)::transition() |
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| 169 | { |
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| 170 | if (!p_resetn) { |
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| 171 | m_vci_target_fsm.reset(); |
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| 172 | m_vci_init_fsm.reset(); |
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| 173 | r_irq = false; |
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| 174 | m_irq_enabled = false; |
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| 175 | m_len = 0; |
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| 176 | m_offset_buffer = 0; |
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| 177 | m_handling = false; |
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| 178 | m_must_finish = false; |
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| 179 | return; |
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| 180 | } |
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| 181 | |
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| 182 | |
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| 183 | if ( m_len && !m_handling ) { |
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| 184 | m_handling = true; |
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| 185 | m_offset = 0; |
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| 186 | |
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| 187 | next_req(); |
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| 188 | } |
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| 189 | |
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| 190 | if( !m_handling ) |
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| 191 | m_must_finish = false; |
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| 192 | |
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| 193 | m_vci_target_fsm.transition(); |
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| 194 | m_vci_init_fsm.transition(); |
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| 195 | } |
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| 196 | |
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| 197 | tmpl(void)::genMoore() |
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| 198 | { |
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| 199 | m_vci_target_fsm.genMoore(); |
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| 200 | m_vci_init_fsm.genMoore(); |
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| 201 | |
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| 202 | p_irq = r_irq && m_irq_enabled; |
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| 203 | } |
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| 204 | |
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| 205 | tmpl(/**/)::VciDmaTsarV2( |
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| 206 | sc_module_name name, |
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| 207 | const MappingTable &mt, |
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| 208 | const IntTab &srcid, |
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| 209 | const IntTab &tgtid, |
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| 210 | const size_t burst_size ) |
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| 211 | : caba::BaseModule(name), |
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| 212 | m_vci_target_fsm(p_vci_target, mt.getSegmentList(tgtid)), |
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| 213 | m_vci_init_fsm(p_vci_initiator, mt.indexForId(srcid)), |
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| 214 | m_len(0), |
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| 215 | m_data(burst_size, (uint8_t)0), |
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| 216 | p_clk("clk"), |
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| 217 | p_resetn("resetn"), |
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| 218 | p_vci_target("vci_target"), |
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| 219 | p_vci_initiator("vci_initiator"), |
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| 220 | p_irq("irq") |
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| 221 | { |
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| 222 | m_vci_target_fsm.on_read_write(on_read, on_write); |
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| 223 | |
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| 224 | assert(burst_size && "Useless DMA with no buffer"); |
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| 225 | assert(burst_size < (1<<vci_param::K) && "I will be unable to create requests that big"); |
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| 226 | |
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| 227 | SC_METHOD(transition); |
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| 228 | dont_initialize(); |
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| 229 | sensitive << p_clk.pos(); |
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| 230 | |
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| 231 | SC_METHOD(genMoore); |
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| 232 | dont_initialize(); |
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| 233 | sensitive << p_clk.neg(); |
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| 234 | } |
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| 235 | |
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| 236 | }} |
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| 237 | |
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| 238 | // Local Variables: |
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| 239 | // tab-width: 4 |
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| 240 | // c-basic-offset: 4 |
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| 241 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 242 | // indent-tabs-mode: nil |
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| 243 | // End: |
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| 244 | |
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| 245 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 246 | |
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