source: trunk/modules/vci_ethernet_tsar/include/soclib/ethernet.h @ 925

Last change on this file since 925 was 528, checked in by lambert, 11 years ago

Introduicing VciEthernetTsar?
This component is modified version of VciEthernet? from soclib
Main differences are :

  • DMA access avoid overlapinging cache line boundaries
  • Pktid is now 0x4 in write cmd
  • IRQ can be reset with the status register
File size: 3.0 KB
Line 
1/*
2 * SOCLIB_LGPL_HEADER_BEGIN
3 *
4 * This file is part of SoCLib, GNU LGPLv2.1.
5 *
6 * SoCLib is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; version 2.1 of the License.
9 *
10 * SoCLib is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with SoCLib; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 * SOCLIB_LGPL_HEADER_END
21 *
22 * Copyright (c) Telecom ParisTech
23 *         Alexandre Becoulet <alexandre.becoulet@enst.fr>, 2012
24 *
25 * Maintainers: becoulet
26 */
27
28#ifndef ETHERNET_REGS_H
29#define ETHERNET_REGS_H
30
31enum SoclibEthernetRegisters {
32    ETHERNET_TX_SIZE  = 0,       /*< on write: set size of packet to send for next adress push */
33    ETHERNET_TX_FIFO  = 1,       /*< on write: push address and size of packet to send on tx fifo,
34                                     on read:  pop status of sent packet from tx fifo. 0 if empty */
35    ETHERNET_RX_SIZE  = 2,       /*< on write: set size of rx buffer for next adress push,
36                                     on read:  get size of last rx packet, 0 if empty. */
37    ETHERNET_RX_FIFO  = 3,       /*< on write: push address and size of buffer on rx fifo,
38                                     on read:  pop status of last rx packet. 0 if empty */
39    ETHERNET_STATUS   = 4,       /*< on read:  contains device status flags */
40    ETHERNET_CTRL     = 4,       /*< on write: device control actions */
41    ETHERNET_FIFO_SIZE = 5,      /*< contains size of TX & RX FIFOs */
42    ETHERNET_MAC_LOW   = 6,      /*< contains mac address bytes 0, 1, 2 and 3 */
43    ETHERNET_MAC_HIGH  = 7,      /*< contains mac address bytes 4 and 5 */
44};
45
46enum SoclibEthernetRxStatus {
47        ETHERNET_RX_EMPTY = 0,
48        ETHERNET_RX_DONE = 1,
49        ETHERNET_RX_DMA_ERR = 2,
50        ETHERNET_RX_PHY_ERR = 3,
51};
52
53enum SoclibEthernetTxStatus {
54        ETHERNET_TX_EMPTY = 0,
55        ETHERNET_TX_DONE = 1,
56        ETHERNET_TX_DMA_ERR = 2,
57        ETHERNET_TX_PHY_ERR = 3,
58};
59
60enum SoclibEthernetStatus {
61        ETHERNET_ST_LINK_UP = 1,
62        ETHERNET_ST_TX_DONE = 2,     /*< The ETHERNET_TX_FIFO register content is valid */
63        ETHERNET_ST_RX_DONE = 4,     /*< The ETHERNET_RX_FIFO register content is valid */
64};
65
66enum SoclibEthernetCtrl {
67        ETHERNET_CTRL_RESET  = 1,     //< fifos become empty, disable interrupts
68        ETHERNET_CTRL_TX_IRQ = 2,     //< enable TX irq when written to 1
69        ETHERNET_CTRL_RX_IRQ = 4,     //< enable RX irq when written to 1
70        ETHERNET_CTRL_LINK_IRQ = 8,   //< enable link status change irq when written to 1
71};
72
73#endif /* ETHERNET_REGS_H */
74
75// Local Variables:
76// tab-width: 4
77// c-basic-offset: 4
78// c-file-offsets:((innamespace . 0)(inline-open . 0))
79// indent-tabs-mode: nil
80// End:
81
82// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
83
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