| [434] | 1 | /* | 
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|  | 2 | * SOCLIB_LGPL_HEADER_BEGIN | 
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|  | 3 | * | 
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|  | 4 | * This file is part of SoCLib, GNU LGPLv2.1. | 
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|  | 5 | * | 
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|  | 6 | * SoCLib is free software; you can redistribute it and/or modify it | 
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|  | 7 | * under the terms of the GNU Lesser General Public License as published | 
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|  | 8 | * by the Free Software Foundation; version 2.1 of the License. | 
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|  | 9 | * | 
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|  | 10 | * SoCLib is distributed in the hope that it will be useful, but | 
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|  | 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | 
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|  | 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU | 
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|  | 13 | * Lesser General Public License for more details. | 
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|  | 14 | * | 
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|  | 15 | * You should have received a copy of the GNU Lesser General Public | 
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|  | 16 | * License along with SoCLib; if not, write to the Free Software | 
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|  | 17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | 
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|  | 18 | * 02110-1301 USA | 
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|  | 19 | * | 
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|  | 20 | * SOCLIB_LGPL_HEADER_END | 
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|  | 21 | * | 
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|  | 22 | * Copyright (c) UPMC, Lip6, Asim | 
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|  | 23 | *         alain greiner | 
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|  | 24 | * | 
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|  | 25 | * Maintainers: alain | 
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|  | 26 | */ | 
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|  | 27 | #ifndef IO_BRIDGE_REGS_H | 
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|  | 28 | #define IO_BRIDGE_REGS_H | 
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|  | 29 |  | 
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|  | 30 | // IOB Configuration registers | 
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| [712] | 31 | // Minimal required segment size = 64 bytes (16 words) | 
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| [434] | 32 | enum | 
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|  | 33 | { | 
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|  | 34 | IOB_IOMMU_PTPR       = 0,     // R/W  : Page Table Pointer Register | 
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|  | 35 | IOB_IOMMU_ACTIVE     = 1,     // R/W  : IOMMU activated if not 0 | 
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|  | 36 | IOB_IOMMU_BVAR       = 2,     // R    : Bad Virtual Address | 
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|  | 37 | IOB_IOMMU_ETR        = 3,     // R    : Error type | 
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|  | 38 | IOB_IOMMU_BAD_ID     = 4,     // R    : Faulty peripheral Index (SRCID) | 
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|  | 39 | IOB_INVAL_PTE        = 5,     // W    : Invalidate PTE (using virtual address) | 
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|  | 40 | IOB_WTI_ENABLE       = 6,     // R/W  : Enable WTI (both IOB and external IRQs) | 
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| [712] | 41 | IOB_WTI_ADDR_LO      = 7,     // R/W  : IOB WTI address (32 LSB bits) | 
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|  | 42 | IOB_WTI_ADDR_HI      = 8,     // R/W  : IOB WTI address (32 MSB bits) | 
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| [434] | 43 | /**/ | 
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| [712] | 44 | IOB_SPAN             = 16, | 
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| [434] | 45 | }; | 
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|  | 46 |  | 
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|  | 47 |  | 
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|  | 48 | // IOMMU Error Type | 
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|  | 49 | enum mmu_error_type_e | 
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|  | 50 | { | 
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|  | 51 | MMU_NONE                      = 0x0000, // None | 
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| [712] | 52 | MMU_WRITE_ACCES_VIOLATION     = 0x0008, // Write access to non writable page | 
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|  | 53 | MMU_WRITE_PT1_ILLEGAL_ACCESS  = 0x0040, // Write Bus Error accessing Table 1 | 
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|  | 54 | MMU_READ_PT1_UNMAPPED             = 0x1001, // Read  Page fault on Page Table 1 | 
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|  | 55 | MMU_READ_PT2_UNMAPPED             = 0x1002, // Read  Page fault on Page Table 2 | 
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|  | 56 | MMU_READ_PT1_ILLEGAL_ACCESS   = 0x1040, // Read  Bus Error in Table1 access | 
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|  | 57 | MMU_READ_PT2_ILLEGAL_ACCESS   = 0x1080, // Read  Bus Error in Table2 access | 
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| [434] | 58 | MMU_READ_DATA_ILLEGAL_ACCESS  = 0x1100, // Read  Bus Error in cache access | 
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|  | 59 | }; | 
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|  | 60 |  | 
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|  | 61 | #endif /* IO_BRIDGE_REGS_H */ | 
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|  | 62 |  | 
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|  | 63 | // Local Variables: | 
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|  | 64 | // tab-width: 4 | 
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|  | 65 | // c-basic-offset: 4 | 
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|  | 66 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) | 
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|  | 67 | // indent-tabs-mode: nil | 
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|  | 68 | // End: | 
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|  | 69 |  | 
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|  | 70 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 | 
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|  | 71 |  | 
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