1 | /* |
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2 | * SOCLIB_LGPL_HEADER_BEGIN |
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3 | * |
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4 | * This file is part of SoCLib, GNU LGPLv2.1. |
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5 | * |
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6 | * SoCLib is free software; you can redistribute it and/or modify it |
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7 | * under the terms of the GNU Lesser General Public License as published |
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8 | * by the Free Software Foundation; version 2.1 of the License. |
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9 | * |
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10 | * SoCLib is distributed in the hope that it will be useful, but |
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11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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13 | * Lesser General Public License for more details. |
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14 | * |
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15 | * You should have received a copy of the GNU Lesser General Public |
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16 | * License along with SoCLib; if not, write to the Free Software |
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17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
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18 | * 02110-1301 USA |
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19 | * |
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20 | * SOCLIB_LGPL_HEADER_END |
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21 | * |
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22 | * Copyright (c) UPMC, Lip6, Asim |
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23 | * Alain Greiner <alain.greiner@lip6.fr> 2013 |
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24 | * |
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25 | * Maintainers: alain |
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26 | */ |
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27 | |
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28 | //////////////////////////////////////////////////////////////////////////////// |
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29 | // This component emulates an external IO bus such as PCIe or Hypertransport, |
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30 | // but respect the VCI protocol. It can be attached to one OR SEVERAL clusters, |
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31 | // using a vci_io_bridge component. |
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32 | // It is considered as a local interconnect, for the ADDRESS or SRCID |
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33 | // decoding tables: |
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34 | // - the CMD routing_table decodes the local field of the VCI ADDRESS |
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35 | // to return the local target port |
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36 | // - The RSP routing_table decodes the local field of the VCI SRCID |
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37 | // to return the initator port |
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38 | // It is implemented as two independant crossbars, for VCI commands and |
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39 | // VCI responses respectively. |
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40 | // - The CMD crossbar has nb_ini input ports, and nb_tgt output ports, |
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41 | // including the ports to the vci_io_bridge component(s). |
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42 | // - The RSP crossbar has nb_tgt input ports, and nb_ini output ports. |
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43 | // including the ports to the vci_io_bridge component(s). |
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44 | // For both crossbars, output ports allocation policy is round robin. |
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45 | //////////////////////////////////////////////////////////////////////////////// |
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46 | |
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47 | #include <systemc> |
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48 | #include <cassert> |
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49 | #include "vci_buffers.h" |
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50 | #include "../include/vci_iox_network.h" |
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51 | #include "alloc_elems.h" |
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52 | |
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53 | namespace soclib { namespace caba { |
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54 | |
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55 | using soclib::common::alloc_elems; |
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56 | using soclib::common::dealloc_elems; |
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57 | |
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58 | using namespace sc_core; |
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59 | |
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60 | /////////////////////////////////////////////////////////////////////////////////// |
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61 | // The IoXbar class is instanciated twice, to implement the CMD & RSP XBARs |
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62 | /////////////////////////////////////////////////////////////////////////////////// |
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63 | template<typename pkt_t> class IoXbar |
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64 | { |
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65 | // pkt_t type must be VciCmdBuffer<vci_param> or VciRspBuffer<vci_param> |
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66 | // the two following types can be found in these two classes |
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67 | |
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68 | typedef typename pkt_t::input_port_t input_port_t; |
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69 | typedef typename pkt_t::output_port_t output_port_t; |
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70 | |
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71 | const bool m_is_cmd; // CMD XBAR if true |
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72 | const size_t m_inputs; // number of inputs |
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73 | const size_t m_outputs; // number of outputs |
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74 | void* m_rt; // pointer on routing table (CMD or RSP) |
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75 | |
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76 | sc_signal<bool>* r_out_allocated; // for each output: allocation state |
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77 | sc_signal<size_t>* r_out_origin; // for each output: input port index |
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78 | sc_signal<bool>* r_in_allocated; // for each input: allocation state |
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79 | sc_signal<size_t>* r_in_dest; // for each input: output port index |
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80 | |
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81 | public: |
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82 | /////////////////////// |
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83 | IoXbar( bool is_cmd, |
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84 | size_t nb_inputs, |
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85 | size_t nb_outputs, |
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86 | void* rt ) |
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87 | : m_is_cmd( is_cmd ), |
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88 | m_inputs( nb_inputs ), |
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89 | m_outputs( nb_outputs ), |
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90 | m_rt ( rt ) |
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91 | { |
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92 | r_out_allocated = new sc_signal<bool>[nb_outputs]; |
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93 | r_out_origin = new sc_signal<size_t>[nb_outputs]; |
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94 | r_in_allocated = new sc_signal<bool>[nb_inputs]; |
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95 | r_in_dest = new sc_signal<size_t>[nb_inputs]; |
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96 | } |
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97 | |
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98 | //////////// |
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99 | void reset() |
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100 | { |
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101 | for (size_t i=0 ; i<m_outputs ; ++i) |
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102 | { |
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103 | r_out_origin[i] = 0; |
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104 | r_out_allocated[i] = false; |
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105 | } |
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106 | for (size_t i=0 ; i<m_inputs ; ++i) |
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107 | { |
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108 | r_in_dest[i] = 0; |
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109 | r_in_allocated[i] = false; |
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110 | } |
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111 | } |
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112 | |
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113 | ////////////////// |
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114 | void print_trace() |
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115 | { |
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116 | if ( m_is_cmd ) |
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117 | { |
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118 | std::cout << "IOX_CMD_XBAR : " << std::dec; |
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119 | for( size_t out=0 ; out<m_outputs ; out++) |
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120 | { |
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121 | if( r_out_allocated[out].read() ) |
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122 | { |
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123 | std::cout << "ini " << r_out_origin[out].read() |
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124 | << " => tgt " << out << " | "; |
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125 | } |
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126 | } |
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127 | } |
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128 | else |
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129 | { |
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130 | std::cout << "IOX_RSP_XBAR : " << std::dec; |
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131 | for( size_t out=0 ; out<m_outputs ; out++) |
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132 | { |
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133 | if( r_out_allocated[out].read() ) |
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134 | { |
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135 | std::cout << "tgt " << r_out_origin[out].read() |
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136 | << " => ini " << out << " | "; |
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137 | } |
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138 | } |
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139 | } |
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140 | std::cout << std::endl; |
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141 | } |
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142 | |
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143 | /////////////////////////////////////////// |
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144 | void transition( input_port_t **input_port, |
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145 | output_port_t **output_port ) |
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146 | { |
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147 | // loop on the output ports |
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148 | for ( size_t out = 0; out < m_outputs; out++) |
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149 | { |
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150 | if ( r_out_allocated[out].read() ) // possible desallocation |
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151 | { |
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152 | if ( output_port[out]->toPeerEnd() ) |
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153 | { |
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154 | size_t in = r_out_origin[out].read(); |
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155 | r_out_allocated[out] = false; |
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156 | r_in_allocated[in] = false; |
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157 | } |
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158 | } |
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159 | else // possible allocation |
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160 | { |
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161 | // loop on the intput ports |
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162 | bool found = false; |
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163 | for(size_t x = 0 ; (x < m_inputs) and not found ; x++) |
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164 | { |
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165 | size_t in = (x + r_out_origin[out] + 1) % m_inputs; |
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166 | if ( input_port[in]->getVal() ) |
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167 | { |
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168 | size_t req; // requested output port index |
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169 | if ( m_is_cmd ) |
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170 | { |
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171 | AddressDecodingTable<uint64_t, size_t>* rt = |
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172 | (AddressDecodingTable<uint64_t, size_t>*)m_rt; |
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173 | req = rt->get_value((uint64_t)(input_port[in]->address.read())); |
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174 | } |
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175 | else |
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176 | { |
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177 | AddressDecodingTable<uint32_t, size_t>* rt = |
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178 | (AddressDecodingTable<uint32_t, size_t>*)m_rt; |
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179 | req = rt->get_value((uint32_t)(input_port[in]->rsrcid.read())); |
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180 | } |
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181 | // allocate the output port if requested |
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182 | if ( out == req ) |
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183 | { |
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184 | r_out_allocated[out] = true; |
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185 | r_in_allocated[in] = true; |
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186 | r_out_origin[out] = in; |
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187 | r_in_dest[in] = out; |
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188 | found = true; |
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189 | } |
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190 | } |
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191 | } // end loop inputs |
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192 | } |
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193 | } // end loop outputs |
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194 | } // end transition |
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195 | |
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196 | ////////////////////////////////////////////// |
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197 | void genMealy_ack( input_port_t **input_port, |
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198 | output_port_t **output_port ) |
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199 | { |
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200 | for ( size_t in = 0 ; in < m_inputs ; in++ ) |
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201 | { |
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202 | size_t out = r_in_dest[in].read(); |
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203 | bool ack = r_in_allocated[in].read() and output_port[out]->getAck(); |
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204 | input_port[in]->setAck(ack); |
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205 | } |
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206 | } |
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207 | |
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208 | /////////////////////////////////////////////////////////////////////// |
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209 | void genMealy_val( input_port_t **input_port, |
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210 | output_port_t **output_port ) |
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211 | { |
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212 | for( size_t out = 0 ; out < m_outputs ; out++) |
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213 | { |
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214 | if (r_out_allocated[out]) |
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215 | { |
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216 | size_t in = r_out_origin[out]; |
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217 | pkt_t tmp; |
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218 | tmp.readFrom(*input_port[in]); |
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219 | tmp.writeTo(*output_port[out]); |
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220 | } |
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221 | else |
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222 | { |
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223 | output_port[out]->setVal(false); |
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224 | } |
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225 | } |
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226 | } |
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227 | |
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228 | }; // end class IoXbar |
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229 | |
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230 | |
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231 | /////////////////////////////////////////////////////////////////////////////////// |
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232 | #define tmpl(x) template<typename vci_param> x VciIoxNetwork<vci_param> |
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233 | /////////////////////////////////////////////////////////////////////////////////// |
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234 | |
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235 | ///////////////////////// |
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236 | tmpl(void)::print_trace() |
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237 | { |
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238 | m_cmd_xbar->print_trace(); |
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239 | m_rsp_xbar->print_trace(); |
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240 | } |
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241 | |
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242 | //////////////////////// |
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243 | tmpl(void)::transition() |
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244 | { |
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245 | if ( ! p_resetn.read() ) |
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246 | { |
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247 | m_cmd_xbar->reset(); |
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248 | m_rsp_xbar->reset(); |
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249 | return; |
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250 | } |
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251 | |
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252 | m_cmd_xbar->transition( m_ports_to_initiator, m_ports_to_target ); |
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253 | m_rsp_xbar->transition( m_ports_to_target, m_ports_to_initiator ); |
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254 | } |
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255 | |
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256 | ////////////////////////////// |
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257 | tmpl(void)::genMealy_cmd_val() |
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258 | { |
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259 | m_cmd_xbar->genMealy_val( m_ports_to_initiator, m_ports_to_target ); |
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260 | } |
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261 | |
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262 | ////////////////////////////// |
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263 | tmpl(void)::genMealy_cmd_ack() |
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264 | { |
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265 | m_cmd_xbar->genMealy_ack( m_ports_to_initiator, m_ports_to_target ); |
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266 | } |
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267 | |
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268 | ////////////////////////////// |
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269 | tmpl(void)::genMealy_rsp_val() |
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270 | { |
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271 | m_rsp_xbar->genMealy_val( m_ports_to_target, m_ports_to_initiator ); |
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272 | } |
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273 | |
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274 | ////////////////////////////// |
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275 | tmpl(void)::genMealy_rsp_ack() |
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276 | { |
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277 | m_rsp_xbar->genMealy_ack( m_ports_to_target, m_ports_to_initiator ); |
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278 | } |
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279 | |
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280 | /////////////////////////////////////////////////////////////////////////// |
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281 | tmpl(/**/)::VciIoxNetwork( sc_core::sc_module_name name, |
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282 | const soclib::common::MappingTable &mt, |
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283 | size_t nb_tgt, |
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284 | size_t nb_ini ) |
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285 | : BaseModule(name), |
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286 | p_clk("clk"), |
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287 | p_resetn("resetn"), |
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288 | p_to_tgt(soclib::common::alloc_elems<VciInitiator<vci_param> >( |
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289 | "p_to_tgt", nb_tgt)), |
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290 | p_to_ini(soclib::common::alloc_elems<VciTarget<vci_param> >( |
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291 | "p_to_ini", nb_ini)), |
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292 | |
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293 | m_nb_tgt( nb_tgt ), |
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294 | m_nb_ini( nb_ini ), |
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295 | |
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296 | m_cmd_rt( mt.getLocalIndexFromAddress(0) ), |
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297 | m_rsp_rt( mt.getLocalIndexFromSrcid(0) ) |
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298 | { |
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299 | std::cout << " Building VciIoxNetwork : " << name << std::endl; |
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300 | |
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301 | SC_METHOD(transition); |
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302 | dont_initialize(); |
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303 | sensitive << p_clk.pos(); |
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304 | |
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305 | SC_METHOD(genMealy_cmd_val); // controls to targets CMDVAL |
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306 | dont_initialize(); |
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307 | sensitive << p_clk.neg(); |
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308 | for ( size_t i=0; i<nb_ini; ++i ) sensitive << p_to_ini[i]; |
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309 | |
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310 | SC_METHOD(genMealy_cmd_ack); // controls to intiators CMDACK |
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311 | dont_initialize(); |
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312 | sensitive << p_clk.neg(); |
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313 | for ( size_t i=0; i<nb_tgt; ++i ) sensitive << p_to_tgt[i]; |
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314 | |
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315 | SC_METHOD(genMealy_rsp_val); // controls to initiators RSPVAL |
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316 | dont_initialize(); |
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317 | sensitive << p_clk.neg(); |
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318 | for ( size_t i=0; i<nb_tgt; ++i ) sensitive << p_to_tgt[i]; |
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319 | |
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320 | SC_METHOD(genMealy_rsp_ack); // controls to targets RSPACK |
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321 | dont_initialize(); |
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322 | sensitive << p_clk.neg(); |
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323 | for ( size_t i=0; i<nb_ini; ++i ) sensitive << p_to_ini[i]; |
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324 | |
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325 | // constructing CMD & RSP XBARs |
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326 | m_rsp_xbar = new rsp_xbar_t( false, // RSP XBAR |
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327 | nb_tgt, |
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328 | nb_ini, |
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329 | &m_rsp_rt ); |
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330 | |
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331 | m_cmd_xbar = new cmd_xbar_t( true, // CMD XBAR |
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332 | nb_ini, |
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333 | nb_tgt, |
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334 | &m_cmd_rt ); |
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335 | |
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336 | // constructing CMD & RSP XBARs input & output ports (pointers) |
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337 | m_ports_to_initiator = new VciTarget<vci_param>*[nb_ini]; |
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338 | for (size_t g = 0 ; g < nb_ini ; g++) m_ports_to_initiator[g] = &p_to_ini[g]; |
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339 | |
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340 | m_ports_to_target = new VciInitiator<vci_param>*[nb_tgt]; |
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341 | for (size_t g = 0 ; g < nb_tgt ; g++) m_ports_to_target[g] = &p_to_tgt[g]; |
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342 | } |
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343 | |
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344 | //////////////////////////// |
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345 | tmpl(/**/)::~VciIoxNetwork() |
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346 | { |
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347 | soclib::common::dealloc_elems(p_to_ini, m_nb_ini); |
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348 | soclib::common::dealloc_elems(p_to_tgt, m_nb_tgt); |
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349 | } |
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350 | |
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351 | }} |
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352 | |
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353 | // Local Variables: |
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354 | // tab-width: 4 |
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355 | // c-basic-offset: 4 |
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356 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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357 | // indent-tabs-mode: nil |
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358 | // End: |
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359 | |
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360 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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