1 | /* |
---|
2 | * SOCLIB_LGPL_HEADER_BEGIN |
---|
3 | * |
---|
4 | * This file is part of SoCLib, GNU LGPLv2.1. |
---|
5 | * |
---|
6 | * SoCLib is free software; you can redistribute it and/or modify it |
---|
7 | * under the terms of the GNU Lesser General Public License as published |
---|
8 | * by the Free Software Foundation; version 2.1 of the License. |
---|
9 | * |
---|
10 | * SoCLib is distributed in the hope that it will be useful, but |
---|
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
---|
13 | * Lesser General Public License for more details. |
---|
14 | * |
---|
15 | * You should have received a copy of the GNU Lesser General Public |
---|
16 | * License along with SoCLib; if not, write to the Free Software |
---|
17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
---|
18 | * 02110-1301 USA |
---|
19 | * |
---|
20 | * SOCLIB_LGPL_HEADER_END |
---|
21 | * |
---|
22 | * Copyright (c) UPMC, Lip6, Asim |
---|
23 | * alain greiner |
---|
24 | * |
---|
25 | * Maintainers: alain |
---|
26 | */ |
---|
27 | #ifndef MEM_CACHE_REGS_H |
---|
28 | #define MEM_CACHE_REGS_H |
---|
29 | |
---|
30 | enum SoclibMemCacheFunc |
---|
31 | { |
---|
32 | MEMC_CONFIG = 0, |
---|
33 | MEMC_INSTRM = 1, |
---|
34 | MEMC_RERROR = 2, |
---|
35 | |
---|
36 | MEMC_FUNC_SPAN = 0x200 |
---|
37 | }; |
---|
38 | |
---|
39 | enum SoclibMemCacheConfigRegs |
---|
40 | { |
---|
41 | MEMC_ADDR_LO, |
---|
42 | MEMC_ADDR_HI, |
---|
43 | MEMC_BUF_LENGTH, |
---|
44 | MEMC_CMD_TYPE |
---|
45 | }; |
---|
46 | |
---|
47 | enum SoclibMemCacheConfigCmd |
---|
48 | { |
---|
49 | MEMC_CMD_NOP, |
---|
50 | MEMC_CMD_INVAL, |
---|
51 | MEMC_CMD_SYNC |
---|
52 | }; |
---|
53 | |
---|
54 | /////////////////////////////////////////////////////////// |
---|
55 | // Decoding CONFIG interface commands // |
---|
56 | // // |
---|
57 | // VCI ADDRESS // |
---|
58 | // ================================================ // |
---|
59 | // GLOBAL | LOCAL | ... | FUNC_IDX | REGS_IDX | 00 // |
---|
60 | // IDX | IDX | | (3 bits) | (7 bits) | // |
---|
61 | // ================================================ // |
---|
62 | // // |
---|
63 | // For instrumentation: FUNC_IDX = 0b001 // |
---|
64 | // // |
---|
65 | // REGS_IDX // |
---|
66 | // ============================================ // |
---|
67 | // Z | Y | X | W // |
---|
68 | // (1 bit) | (2 bits) | (3 bits) | (1 bit) // |
---|
69 | // ============================================ // |
---|
70 | // // |
---|
71 | // For configuration: FUNC_IDX = 0b000 // |
---|
72 | // // |
---|
73 | // REGS_IDX // |
---|
74 | // ============================================ // |
---|
75 | // RESERVED | X | // |
---|
76 | // (4 bits) | (3 bits) | // |
---|
77 | // ============================================ // |
---|
78 | // // |
---|
79 | // X : REGISTER INDEX // |
---|
80 | // // |
---|
81 | // For WRITE MISS error signaling: FUNC = 0x010 // |
---|
82 | // // |
---|
83 | // REGS_IDX // |
---|
84 | // ============================================ // |
---|
85 | // RESERVED | X | // |
---|
86 | // (4 bits) | (3 bits) | // |
---|
87 | // ============================================ // |
---|
88 | // // |
---|
89 | // X : REGISTER INDEX // |
---|
90 | // // |
---|
91 | /////////////////////////////////////////////////////////// |
---|
92 | |
---|
93 | enum SoclibMemCacheInstrRegs { |
---|
94 | /////////////////////////////////////////////////////// |
---|
95 | // DIRECT instrumentation registers // |
---|
96 | /////////////////////////////////////////////////////// |
---|
97 | |
---|
98 | // LOCAL |
---|
99 | |
---|
100 | MEMC_LOCAL_READ_LO = 0x00, |
---|
101 | MEMC_LOCAL_READ_HI = 0x01, |
---|
102 | MEMC_LOCAL_WRITE_LO = 0x02, |
---|
103 | MEMC_LOCAL_WRITE_HI = 0x03, |
---|
104 | MEMC_LOCAL_LL_LO = 0x04, |
---|
105 | MEMC_LOCAL_LL_HI = 0x05, |
---|
106 | MEMC_LOCAL_SC_LO = 0x06, |
---|
107 | MEMC_LOCAL_SC_HI = 0x07, |
---|
108 | MEMC_LOCAL_CAS_LO = 0x08, |
---|
109 | MEMC_LOCAL_CAS_HI = 0x09, |
---|
110 | |
---|
111 | // REMOTE |
---|
112 | |
---|
113 | MEMC_REMOTE_READ_LO = 0x10, |
---|
114 | MEMC_REMOTE_READ_HI = 0x11, |
---|
115 | MEMC_REMOTE_WRITE_LO = 0x12, |
---|
116 | MEMC_REMOTE_WRITE_HI = 0x13, |
---|
117 | MEMC_REMOTE_LL_LO = 0x14, |
---|
118 | MEMC_REMOTE_LL_HI = 0x15, |
---|
119 | MEMC_REMOTE_SC_LO = 0x16, |
---|
120 | MEMC_REMOTE_SC_HI = 0x17, |
---|
121 | MEMC_REMOTE_CAS_LO = 0x18, |
---|
122 | MEMC_REMOTE_CAS_HI = 0x19, |
---|
123 | |
---|
124 | // COST |
---|
125 | |
---|
126 | MEMC_COST_READ_LO = 0x20, |
---|
127 | MEMC_COST_READ_HI = 0x21, |
---|
128 | MEMC_COST_WRITE_LO = 0x22, |
---|
129 | MEMC_COST_WRITE_HI = 0x23, |
---|
130 | MEMC_COST_LL_LO = 0x24, |
---|
131 | MEMC_COST_LL_HI = 0x25, |
---|
132 | MEMC_COST_SC_LO = 0x26, |
---|
133 | MEMC_COST_SC_HI = 0x27, |
---|
134 | MEMC_COST_CAS_LO = 0x28, |
---|
135 | MEMC_COST_CAS_HI = 0x29, |
---|
136 | |
---|
137 | /////////////////////////////////////////////////////// |
---|
138 | // COHERENCE instrumentation registers // |
---|
139 | /////////////////////////////////////////////////////// |
---|
140 | |
---|
141 | // LOCAL |
---|
142 | |
---|
143 | MEMC_LOCAL_MUPDATE_LO = 0x40, |
---|
144 | MEMC_LOCAL_MUPDATE_HI = 0x41, |
---|
145 | MEMC_LOCAL_MINVAL_LO = 0x42, |
---|
146 | MEMC_LOCAL_MINVAL_HI = 0x43, |
---|
147 | MEMC_LOCAL_CLEANUP_LO = 0x44, |
---|
148 | MEMC_LOCAL_CLEANUP_HI = 0x45, |
---|
149 | |
---|
150 | // REMOTE |
---|
151 | |
---|
152 | MEMC_REMOTE_MUPDATE_LO = 0x50, |
---|
153 | MEMC_REMOTE_MUPDATE_HI = 0x51, |
---|
154 | MEMC_REMOTE_MINVAL_LO = 0x52, |
---|
155 | MEMC_REMOTE_MINVAL_HI = 0x53, |
---|
156 | MEMC_REMOTE_CLEANUP_LO = 0x54, |
---|
157 | MEMC_REMOTE_CLEANUP_HI = 0x55, |
---|
158 | |
---|
159 | // COST |
---|
160 | |
---|
161 | MEMC_COST_MUPDATE_LO = 0x60, |
---|
162 | MEMC_COST_MUPDATE_HI = 0x61, |
---|
163 | MEMC_COST_MINVAL_LO = 0x62, |
---|
164 | MEMC_COST_MINVAL_HI = 0x63, |
---|
165 | MEMC_COST_CLEANUP_LO = 0x64, |
---|
166 | MEMC_COST_CLEANUP_HI = 0x65, |
---|
167 | |
---|
168 | // TOTAL |
---|
169 | |
---|
170 | MEMC_TOTAL_MUPDATE_LO = 0x68, |
---|
171 | MEMC_TOTAL_MUPDATE_HI = 0x69, |
---|
172 | MEMC_TOTAL_MINVAL_LO = 0x6A, |
---|
173 | MEMC_TOTAL_MINVAL_HI = 0x6B, |
---|
174 | MEMC_TOTAL_BINVAL_LO = 0x6C, |
---|
175 | MEMC_TOTAL_BINVAL_HI = 0x6D, |
---|
176 | }; |
---|
177 | |
---|
178 | enum SoclibMemCacheRerrorRegs |
---|
179 | { |
---|
180 | MEMC_RERROR_ADDR_LO = 0, |
---|
181 | MEMC_RERROR_ADDR_HI = 1, |
---|
182 | MEMC_RERROR_SRCID = 2, |
---|
183 | MEMC_RERROR_IRQ_RESET = 3, |
---|
184 | MEMC_RERROR_IRQ_ENABLE = 4, |
---|
185 | }; |
---|
186 | |
---|
187 | #define MEMC_REG(func,idx) ((func<<7)|idx) |
---|
188 | |
---|
189 | #endif /* MEM_CACHE_REGS_H */ |
---|
190 | |
---|
191 | // Local Variables: |
---|
192 | // tab-width: 4 |
---|
193 | // c-basic-offset: 4 |
---|
194 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
195 | // indent-tabs-mode: nil |
---|
196 | // End: |
---|
197 | |
---|
198 | // vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|
199 | |
---|