source: trunk/modules/vci_spi/caba/source/include/vci_spi.h @ 564

Last change on this file since 564 was 559, checked in by bouyer, 11 years ago

Remove Auto Slave Select feature

File size: 7.3 KB
Line 
1
2/* -*- c++ -*-
3 *
4 * SOCLIB_LGPL_HEADER_BEGIN
5 *
6 * This file is part of SoCLib, GNU LGPLv2.1.
7 *
8 * SoCLib is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU Lesser General Public License as published
10 * by the Free Software Foundation; version 2.1 of the License.
11 *
12 * SoCLib is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with SoCLib; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * SOCLIB_LGPL_HEADER_END
23 *
24 * Copyright (c) UPMC, Lip6, SoC
25 *         manuel.bouyer@lip6.fr october 2013
26 *
27 * Maintainers: bouyer
28 */
29
30//////////////////////////////////////////////////////////////////////////////////////
31// This component is a SPI controller with a VCI interface
32// It supports only 32 or 64 bits VCI DATA width, but all addressable registers
33// contain 32 bits words. It supports VCI addresss lartger than 32 bits.
34//
35// This component can perform data transfers between one single file belonging
36// to the host system and a buffer in the memory of the virtual prototype.
37// The file name is an argument of the constructor.
38// This component has a DMA capability, and is both a target and an initiator.
39// The burst size (bytes) must be power of 2.
40// The burst size is typically a cache line.
41// The memory buffer must be aligned to a a burst boundary.
42// Both read and write transfers are supported. An IRQ is optionally
43// asserted when the transfer is completed.
44//
45
46#ifndef SOCLIB_VCI_SPI_H
47#define SOCLIB_VCI_SPI_H
48
49#include <stdint.h>
50#include <systemc>
51#include <unistd.h>
52#include "caba_base_module.h"
53#include "mapping_table.h"
54#include "vci_initiator.h"
55#include "vci_target.h"
56
57namespace soclib {
58namespace caba {
59
60using namespace sc_core;
61
62template<typename vci_param>
63class VciSpi
64        : public caba::BaseModule
65{
66private:
67
68    // Registers
69    sc_signal<int>                     r_target_fsm;       // target fsm state register
70    sc_signal<int>                     r_initiator_fsm;    // initiator fsm state register
71    sc_signal<int>                     r_spi_fsm;          // spi engine state
72    sc_signal<uint64_t>                r_txrx[2];          // data in/out
73    sc_signal<uint32_t>                r_divider;          // SPI clk divider
74    sc_signal<uint8_t>                 r_ss;               // SPI slave select
75    sc_signal<bool>                    r_ctrl_cpol;     // clock polarity
76    sc_signal<bool>                    r_ctrl_cpha;     // clock phase
77    sc_signal<bool>                    r_ctrl_ie;       // interrupt enable
78    sc_signal<bool>                    r_ctrl_go_bsy;
79    sc_signal<uint8_t>                 r_ctrl_char_len; // number of bits in xfer
80
81    sc_signal<uint32_t>                r_bit_count;
82    sc_signal<uint32_t>                r_clk_counter;
83    sc_signal<bool>                    r_spi_clk;
84    sc_signal<bool>                    r_spi_clk_previous;
85    sc_signal<bool>                    r_spi_clk_ignore;
86    sc_signal<bool>                    r_spi_out;
87    sc_signal<bool>                    r_irq;
88
89    sc_signal<bool>                    r_read;
90    sc_signal<uint32_t>                r_nblocks;          // number of blocks in transfer
91    sc_signal<uint64_t>                r_buf_address;      // memory buffer address
92    sc_signal<uint32_t>                r_index;            // word index in local buffer
93    sc_signal<uint32_t>                r_latency_count;    // latency counter
94    sc_signal<uint32_t>                r_words_count;      // word counter (in a burst)
95    sc_signal<uint32_t>                r_burst_count;      // burst counter (in a block)
96    sc_signal<uint32_t>                r_block_count;      // block counter (in a transfer)
97    sc_signal<uint32_t>                r_burst_offset;     // number of non aligned words
98    sc_signal<uint32_t>                r_burst_nwords;     // number of words in a burst
99    sc_signal<bool>                    r_go;               // command from T_FSM to M_FSM
100
101    sc_signal<typename vci_param::srcid_t >     r_srcid;   // save srcid
102    sc_signal<typename vci_param::trdid_t >     r_trdid;   // save trdid
103    sc_signal<typename vci_param::pktid_t >     r_pktid;   // save pktid
104
105    sc_signal<typename vci_param::data_t >      r_rdata;   // save reply
106
107    uint32_t*                          r_local_buffer;     // capacity is one block
108
109    // structural parameters
110    std::list<soclib::common::Segment> m_seglist;
111    uint32_t                           m_srcid;            // initiator index
112    const uint32_t                     m_words_per_block;  // block size
113    const uint32_t                     m_words_per_burst;  // number of words in a burst
114    const uint32_t                     m_bursts_per_block; // number of bursts in a block
115
116    // methods
117    void transition();
118    void genMoore();
119
120    //  Master FSM states
121    enum {
122    M_IDLE              = 0,
123
124    M_READ_BLOCK        = 1,
125    M_READ_BURST        = 2,
126    M_READ_CMD          = 3,
127    M_READ_RSP          = 4,
128    M_READ_SUCCESS      = 5,
129    M_READ_ERROR        = 6,
130
131    M_WRITE_BURST       = 7,
132    M_WRITE_CMD         = 8,
133    M_WRITE_RSP         = 9,
134    M_WRITE_BLOCK       = 10,
135    M_WRITE_SUCCESS     = 11,
136    M_WRITE_ERROR       = 12,
137    };
138
139    // Target FSM states
140    enum {
141    T_IDLE              = 0,
142    T_RSP_READ          = 1,
143    T_RSP_WRITE         = 2,
144    T_ERROR_READ        = 3,
145    T_ERROR_WRITE       = 4
146    };
147
148    // SPI FSM states
149    enum {
150    S_IDLE              = 0,
151    S_XMIT              = 1,
152    };
153
154    // Error codes values
155    enum {
156    VCI_READ_OK         = 0,
157    VCI_READ_ERROR      = 1,
158    VCI_WRITE_OK        = 2,
159    VCI_WRITE_ERROR     = 3,
160    };
161
162    /* transaction type, pktid field */
163    enum transaction_type_e
164    {
165      // b3 unused
166      // b2 READ / NOT READ
167      // Si READ
168      //  b1 DATA / INS
169      //  b0 UNC / MISS
170      // Si NOT READ
171      //  b1 accÚs table llsc type SW / other
172      //  b2 WRITE/CAS/LL/SC
173      TYPE_READ_DATA_UNC          = 0x0,
174      TYPE_READ_DATA_MISS         = 0x1,
175      TYPE_READ_INS_UNC           = 0x2,
176      TYPE_READ_INS_MISS          = 0x3,
177      TYPE_WRITE                  = 0x4,
178      TYPE_CAS                    = 0x5,
179      TYPE_LL                     = 0x6,
180      TYPE_SC                     = 0x7
181    };
182
183protected:
184
185    SC_HAS_PROCESS(VciSpi);
186
187public:
188
189    // ports
190    sc_in<bool>                                               p_clk;
191    sc_in<bool>                                               p_resetn;
192    sc_out<bool>                                              p_irq;
193    soclib::caba::VciInitiator<vci_param> p_vci_initiator;
194    soclib::caba::VciTarget<vci_param>    p_vci_target;
195    sc_out<bool>                                              p_spi_ss;
196    sc_out<bool>                                              p_spi_clk;
197    sc_out<bool>                                              p_spi_mosi;
198    sc_in<bool>                                               p_spi_miso;
199
200    void print_trace();
201
202    // Constructor   
203    VciSpi(
204        sc_module_name                      name,
205        const soclib::common::MappingTable  &mt,
206        const soclib::common::IntTab        &srcid,
207        const soclib::common::IntTab        &tgtid,
208        const uint32_t                      burst_size = 64);
209
210    ~VciSpi();
211
212};
213
214}}
215
216#endif /* SOCLIB_VCI_SPI_H */
217
218// Local Variables:
219// tab-width: 4
220// c-basic-offset: 4
221// c-file-offsets:((innamespace . 0)(inline-open . 0))
222// indent-tabs-mode: nil
223// End:
224
225// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
226
Note: See TracBrowser for help on using the repository browser.