source: trunk/modules/vci_spi/caba/source/include/vci_spi.h @ 593

Last change on this file since 593 was 579, checked in by bouyer, 11 years ago

Add some basic DMA capabilities. Passes basic read/write tests.
Can only do line-aligned transfers which are multiple of a cache line in size,
but shouldn't be a strong limitation for real use.

File size: 6.9 KB
Line 
1
2/* -*- c++ -*-
3 *
4 * SOCLIB_LGPL_HEADER_BEGIN
5 *
6 * This file is part of SoCLib, GNU LGPLv2.1.
7 *
8 * SoCLib is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU Lesser General Public License as published
10 * by the Free Software Foundation; version 2.1 of the License.
11 *
12 * SoCLib is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with SoCLib; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * SOCLIB_LGPL_HEADER_END
23 *
24 * Copyright (c) UPMC, Lip6, SoC
25 *         manuel.bouyer@lip6.fr october 2013
26 *
27 * Maintainers: bouyer
28 */
29
30//////////////////////////////////////////////////////////////////////////////////////
31// This component is a SPI controller with a VCI interface
32// It supports only 32 or 64 bits VCI DATA width, but all addressable registers
33// contain 32 bits words. It supports VCI addresss lartger than 32 bits.
34//
35// This component can perform data transfers between one single file belonging
36// to the host system and a buffer in the memory of the virtual prototype.
37// The file name is an argument of the constructor.
38// This component has a DMA capability, and is both a target and an initiator.
39// The burst size (bytes) must be power of 2.
40// The burst size is typically a cache line.
41// The memory buffer must be aligned to a a burst boundary.
42// Both read and write transfers are supported. An IRQ is optionally
43// asserted when the transfer is completed.
44//
45
46#ifndef SOCLIB_VCI_SPI_H
47#define SOCLIB_VCI_SPI_H
48
49#include <stdint.h>
50#include <systemc>
51#include <unistd.h>
52#include "caba_base_module.h"
53#include "mapping_table.h"
54#include "vci_initiator.h"
55#include "vci_target.h"
56#include "generic_fifo.h"
57
58namespace soclib {
59namespace caba {
60
61using namespace sc_core;
62
63template<typename vci_param>
64class VciSpi
65        : public caba::BaseModule
66{
67private:
68
69    // Registers
70    sc_signal<int>                     r_target_fsm;       // target fsm state register
71    sc_signal<int>                     r_initiator_fsm;    // initiator fsm state register
72    sc_signal<int>                     r_spi_fsm;          // spi engine state
73    sc_signal<uint64_t>                r_txrx[2];          // data in/out
74    sc_signal<uint32_t>                r_divider;          // SPI clk divider
75    sc_signal<uint8_t>                 r_ss;               // SPI slave select
76    sc_signal<bool>                    r_ctrl_cpol;     // clock polarity
77    sc_signal<bool>                    r_ctrl_cpha;     // clock phase
78    sc_signal<bool>                    r_ctrl_ie;       // interrupt enable
79    sc_signal<uint8_t>                 r_ctrl_char_len; // number of bits in xfer
80    sc_signal<uint64_t>                r_buf_address;  // memory buffer address
81    sc_signal<uint32_t>                r_dma_count;   // DMA burst count
82    sc_signal<bool>                    r_read;        // DMA read/write
83
84    sc_signal<uint32_t>                r_burst_word;  // DMA burst word count
85    sc_signal<bool>                    r_dma_error;   // DMA error
86
87    sc_signal<bool>                    r_spi_bsy;    // SPI shifter busy
88    sc_signal<uint32_t>                r_spi_bit_count;
89    sc_signal<uint32_t>                r_spi_word_count;
90    sc_signal<uint32_t>                r_spi_clk_counter;
91    sc_signal<bool>                    r_spi_clk;
92    sc_signal<bool>                    r_spi_clk_previous;
93    sc_signal<bool>                    r_spi_clk_ignore;
94    sc_signal<bool>                    r_spi_out;
95    sc_signal<bool>                    r_spi_done;
96    sc_signal<bool>                    r_irq;
97
98    GenericFifo<typename vci_param::data_t> r_dma_fifo_read; // buffer data from SPI to network
99    GenericFifo<typename vci_param::data_t> r_dma_fifo_write;// buffer data from network to SPI
100
101    sc_signal<typename vci_param::srcid_t >     r_srcid;   // save srcid
102    sc_signal<typename vci_param::trdid_t >     r_trdid;   // save trdid
103    sc_signal<typename vci_param::pktid_t >     r_pktid;   // save pktid
104
105    sc_signal<typename vci_param::data_t >      r_rdata;   // save reply
106
107    // structural parameters
108    std::list<soclib::common::Segment> m_seglist;
109    uint32_t                           m_srcid;            // initiator index
110    const uint32_t                     m_burst_size;       // number of words in a burst
111    const uint32_t                     m_words_per_burst;  // number of words in a burst
112    const uint32_t                     m_byte2burst_shift; // log2(burst_size)
113
114    // methods
115    void transition();
116    void genMoore();
117
118    //  Master FSM states
119    enum {
120    M_IDLE              = 0,
121    M_READ_WAIT         = 1,
122    M_READ_CMD          = 2,
123    M_READ_RSP          = 3,
124    M_WRITE_WAIT        = 4,
125    M_WRITE_CMD         = 5,
126    M_WRITE_RSP         = 6,
127    M_WRITE_END         = 7
128    };
129
130    // Target FSM states
131    enum {
132    T_IDLE              = 0,
133    T_RSP_READ          = 1,
134    T_RSP_WRITE         = 2,
135    T_ERROR_READ        = 3,
136    T_ERROR_WRITE       = 4
137    };
138
139    // SPI FSM states
140    enum {
141    S_IDLE              = 0,
142    S_DMA_RECEIVE       = 1,
143    S_DMA_SEND_START    = 2,
144    S_DMA_SEND          = 3,
145    S_DMA_SEND_END      = 4,
146    S_XMIT              = 5,
147    };
148
149    // Error codes values
150    enum {
151    VCI_READ_OK         = 0,
152    VCI_READ_ERROR      = 1,
153    VCI_WRITE_OK        = 2,
154    VCI_WRITE_ERROR     = 3,
155    };
156
157    /* transaction type, pktid field */
158    enum transaction_type_e
159    {
160      // b3 unused
161      // b2 READ / NOT READ
162      // Si READ
163      //  b1 DATA / INS
164      //  b0 UNC / MISS
165      // Si NOT READ
166      //  b1 accÚs table llsc type SW / other
167      //  b2 WRITE/CAS/LL/SC
168      TYPE_READ_DATA_UNC          = 0x0,
169      TYPE_READ_DATA_MISS         = 0x1,
170      TYPE_READ_INS_UNC           = 0x2,
171      TYPE_READ_INS_MISS          = 0x3,
172      TYPE_WRITE                  = 0x4,
173      TYPE_CAS                    = 0x5,
174      TYPE_LL                     = 0x6,
175      TYPE_SC                     = 0x7
176    };
177
178protected:
179
180    SC_HAS_PROCESS(VciSpi);
181
182public:
183
184    // ports
185    sc_in<bool>                                               p_clk;
186    sc_in<bool>                                               p_resetn;
187    sc_out<bool>                                              p_irq;
188    soclib::caba::VciInitiator<vci_param> p_vci_initiator;
189    soclib::caba::VciTarget<vci_param>    p_vci_target;
190    sc_out<bool>                                              p_spi_ss;
191    sc_out<bool>                                              p_spi_clk;
192    sc_out<bool>                                              p_spi_mosi;
193    sc_in<bool>                                               p_spi_miso;
194
195    void print_trace();
196
197    // Constructor   
198    VciSpi(
199        sc_module_name                      name,
200        const soclib::common::MappingTable  &mt,
201        const soclib::common::IntTab        &srcid,
202        const soclib::common::IntTab        &tgtid,
203        const uint32_t                      burst_size = 64);
204
205    ~VciSpi();
206
207};
208
209}}
210
211#endif /* SOCLIB_VCI_SPI_H */
212
213// Local Variables:
214// tab-width: 4
215// c-basic-offset: 4
216// c-file-offsets:((innamespace . 0)(inline-open . 0))
217// indent-tabs-mode: nil
218// End:
219
220// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
221
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