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source:
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183
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Name
Size
Rev
Age
Author
Last Change
../
vci_vdspin_target_wrapper
149
14 years
alain
bug fixing
vci_vdspin_initiator_wrapper
153
14 years
alain
one more bug fixed…
vci_synthetic_target
181
13 years
choichil
Adding synthetic target made from vci_simple_ram
vci_synthetic_initator
180
13 years
choichil
synthetic initiator corrected
vci_mem_cache_v4
177
14 years
alain
ng two warnings regarding the order of member variables initialisation.
vci_mem_cache_v3
83
14 years
guthmull
Fix the masking of RERROR field
vci_mem_cache_v2s
54
15 years
bouyer
Remove debug output
vci_mem_cache_v2
83
14 years
guthmull
Fix the masking of RERROR field
vci_mem_cache_v1
32
15 years
guthmull
Add SC randomization to V1
vci_mem_cache
20
15 years
nipo
Update DSX metadata
vci_dma_tsar_v2
20
15 years
nipo
Update DSX metadata
vci_dma_tsar
20
15 years
nipo
Update DSX metadata
vci_cc_xcache_wrapper_v4
175
14 years
kane
vci_cc_xcache_wrapper_v4 : suppress one state (CC_UPDATE)
vci_cc_xcache_wrapper_v1
85
14 years
simerabe
removing duplicate ring_signals_2
vci_cc_xcache_wrapper_multi
47
15 years
alain
vci_cc_xcache_wrapper
20
15 years
nipo
Update DSX metadata
vci_cc_vcache_wrapper_v4
183
13 years
alain
Introducing vci_cc_vcache_v4
vci_cc_vcache_wrapper_v1
119
14 years
gao
Modification for synthetisable reason
vci_cc_vcache_wrapper_multi
40
15 years
gao
cc_vcache_multi added
vci_cc_vcache_wrapper2_v1
139
14 years
gao
Cleanup FSM changed
vci_cc_vcache_wrapper2_ring
20
15 years
nipo
Update DSX metadata
vci_cc_vcache_wrapper2_multi
37
15 years
gao
Bug correction
vci_cc_vcache_wrapper2
20
15 years
nipo
Update DSX metadata
vci_block_device_tsar_v4
164
14 years
simerabe
replace sc_uint with sc_dt::sc_uint
vci_block_device_tsar_v2
20
15 years
nipo
Update DSX metadata
vci_block_device_tsar
20
15 years
nipo
Update DSX metadata
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