source:
trunk/modules
@
140
Name | Size | Rev | Age | Author | Last Change |
---|---|---|---|---|---|
../ | |||||
vci_block_device_tsar | 20 | 15 years | Update DSX metadata | ||
vci_block_device_tsar_v2 | 20 | 15 years | Update DSX metadata | ||
vci_cc_vcache_wrapper2 | 20 | 15 years | Update DSX metadata | ||
vci_cc_vcache_wrapper2_multi | 37 | 15 years | Bug correction | ||
vci_cc_vcache_wrapper2_ring | 20 | 15 years | Update DSX metadata | ||
vci_cc_vcache_wrapper2_v1 | 139 | 14 years | Cleanup FSM changed | ||
vci_cc_vcache_wrapper_multi | 40 | 15 years | cc_vcache_multi added | ||
vci_cc_vcache_wrapper_v1 | 119 | 14 years | Modification for synthetisable reason | ||
vci_cc_xcache_wrapper | 20 | 15 years | Update DSX metadata | ||
vci_cc_xcache_wrapper_multi | 47 | 15 years | |||
vci_cc_xcache_wrapper_v1 | 85 | 14 years | removing duplicate ring_signals_2 | ||
vci_cc_xcache_wrapper_v4 | 140 | 14 years | yAjout du multi_cache : plusieurs processeur peuvent ce partager le … | ||
vci_dma_tsar | 20 | 15 years | Update DSX metadata | ||
vci_dma_tsar_v2 | 20 | 15 years | Update DSX metadata | ||
vci_mem_cache | 20 | 15 years | Update DSX metadata | ||
vci_mem_cache_v1 | 32 | 15 years | Add SC randomization to V1 | ||
vci_mem_cache_v2 | 83 | 14 years | Fix the masking of RERROR field | ||
vci_mem_cache_v2s | 54 | 15 years | Remove debug output | ||
vci_mem_cache_v3 | 83 | 14 years | Fix the masking of RERROR field | ||
vci_mem_cache_v4 | 140 | 14 years | yAjout du multi_cache : plusieurs processeur peuvent ce partager le … | ||
vci_synthetic_initator | 135 | 14 years | Initiator with bug correction in latency computing |
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