source:
trunk/modules
@
145
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| vci_block_device_tsar | 20 | 15 years | Update DSX metadata | ||
| vci_block_device_tsar_v2 | 20 | 15 years | Update DSX metadata | ||
| vci_cc_vcache_wrapper2 | 20 | 15 years | Update DSX metadata | ||
| vci_cc_vcache_wrapper2_multi | 37 | 15 years | Bug correction | ||
| vci_cc_vcache_wrapper2_ring | 20 | 15 years | Update DSX metadata | ||
| vci_cc_vcache_wrapper2_v1 | 139 | 14 years | Cleanup FSM changed | ||
| vci_cc_vcache_wrapper_multi | 40 | 15 years | cc_vcache_multi added | ||
| vci_cc_vcache_wrapper_v1 | 119 | 14 years | Modification for synthetisable reason | ||
| vci_cc_xcache_wrapper | 20 | 15 years | Update DSX metadata | ||
| vci_cc_xcache_wrapper_multi | 47 | 15 years | |||
| vci_cc_xcache_wrapper_v1 | 85 | 14 years | removing duplicate ring_signals_2 | ||
| vci_cc_xcache_wrapper_v4 | 144 | 14 years | in vci_cc_xcache_wrapper_v4 : (1) Fix bug in MISS_VICTIM state, (2) … | ||
| vci_dma_tsar | 20 | 15 years | Update DSX metadata | ||
| vci_dma_tsar_v2 | 20 | 15 years | Update DSX metadata | ||
| vci_mem_cache | 20 | 15 years | Update DSX metadata | ||
| vci_mem_cache_v1 | 32 | 15 years | Add SC randomization to V1 | ||
| vci_mem_cache_v2 | 83 | 14 years | Fix the masking of RERROR field | ||
| vci_mem_cache_v2s | 54 | 15 years | Remove debug output | ||
| vci_mem_cache_v3 | 83 | 14 years | Fix the masking of RERROR field | ||
| vci_mem_cache_v4 | 143 | 14 years | fix bug in ccxcachev4, save cpu_info in memcachev4 | ||
| vci_synthetic_initator | 145 | 14 years | Adding function to get Latencies and a period for broadcast calculated … | ||
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