1 | #include "../include/tsarv4_cluster_xbar.h" |
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2 | |
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3 | namespace soclib { |
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4 | namespace caba { |
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5 | |
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6 | ////////////////////////////////////////////////////////////////////////// |
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7 | // Constructor |
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8 | ////////////////////////////////////////////////////////////////////////// |
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9 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
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10 | TsarV4ClusterXbar<vci_param, iss_t, cmd_width, rsp_width>::TsarV4ClusterXbar( |
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11 | sc_module_name insname, |
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12 | size_t nprocs, |
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13 | size_t x_id, |
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14 | size_t y_id, |
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15 | size_t cluster_id, |
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16 | const soclib::common::MappingTable &mtd, |
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17 | const soclib::common::MappingTable &mtc, |
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18 | const soclib::common::MappingTable &mtx, |
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19 | size_t x_width, |
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20 | size_t y_width, |
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21 | size_t tgtid_memc, |
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22 | size_t tgtid_xicu, |
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23 | size_t tgtid_fbuf, |
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24 | size_t tgtid_mtty, |
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25 | size_t tgtid_brom, |
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26 | size_t tgtid_bdev, |
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27 | size_t tgtid_mdma, |
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28 | size_t memc_ways, |
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29 | size_t memc_sets, |
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30 | size_t l1_i_ways, |
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31 | size_t l1_i_sets, |
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32 | size_t l1_d_ways, |
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33 | size_t l1_d_sets, |
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34 | size_t xram_latency, |
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35 | bool io, |
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36 | size_t xfb, |
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37 | size_t yfb, |
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38 | size_t fb_mode, |
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39 | char* disk_name, |
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40 | size_t block_size, |
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41 | const Loader &loader) |
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42 | : soclib::caba::BaseModule(insname), |
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43 | p_clk("clk"), |
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44 | p_resetn("resetn"), |
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45 | |
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46 | signal_dspin_cmd_l2g_d("signal_dspin_cmd_l2g_d"), |
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47 | signal_dspin_cmd_g2l_d("signal_dspin_cmd_g2l_d"), |
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48 | signal_dspin_cmd_l2g_c("signal_dspin_cmd_l2g_c"), |
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49 | signal_dspin_cmd_g2l_c("signal_dspin_cmd_g2l_c"), |
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50 | signal_dspin_rsp_l2g_d("signal_dspin_rsp_l2g_d"), |
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51 | signal_dspin_rsp_g2l_d("signal_dspin_rsp_g2l_d"), |
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52 | signal_dspin_rsp_l2g_c("signal_dspin_rsp_l2g_c"), |
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53 | signal_dspin_rsp_g2l_c("signal_dspin_rsp_g2l_c"), |
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54 | |
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55 | signal_vci_ini_d_bdev("signal_vci_ini_d_bdev"), |
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56 | signal_vci_ini_d_cdma("signal_vci_ini_d_cdma"), |
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57 | |
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58 | signal_vci_tgt_d_memc("signal_vci_tgt_d_memc"), |
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59 | signal_vci_tgt_d_mtty("signal_vci_tgt_d_mtty"), |
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60 | signal_vci_tgt_d_xicu("signal_vci_tgt_d_xicu"), |
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61 | signal_vci_tgt_d_bdev("signal_vci_tgt_d_bdev"), |
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62 | signal_vci_tgt_d_cdma("signal_vci_tgt_d_cdma"), |
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63 | signal_vci_tgt_d_brom("signal_vci_tgt_d_brom"), |
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64 | signal_vci_tgt_d_fbuf("signal_vci_tgt_d_fbuf"), |
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65 | |
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66 | signal_vci_ini_c_memc("signal_vci_ini_c_memc"), |
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67 | signal_vci_tgt_c_memc("signal_vci_tgt_c_memc"), |
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68 | |
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69 | signal_vci_xram("signal_vci_xram") |
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70 | |
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71 | { |
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72 | // Vectors of ports definition |
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73 | |
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74 | p_cmd_in = alloc_elems<DspinInput<cmd_width> >("p_cmd_in", 2, 4); |
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75 | p_cmd_out = alloc_elems<DspinOutput<cmd_width> >("p_cmd_out", 2, 4); |
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76 | p_rsp_in = alloc_elems<DspinInput<rsp_width> >("p_rsp_in", 2, 4); |
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77 | p_rsp_out = alloc_elems<DspinOutput<rsp_width> >("p_rsp_out", 2, 4); |
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78 | |
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79 | // Components definition |
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80 | |
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81 | // on direct network : local srcid[proc] in [0...nprocs-1] |
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82 | // on direct network : local srcid[mdma] = nprocs |
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83 | // on direct network : local srcid[bdev] = nprocs + 1 |
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84 | |
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85 | // on coherence network : local srcid[proc] in [0...nprocs-1] |
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86 | // on coherence network : local srcid[memc] = nprocs |
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87 | |
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88 | std::cout << " - building proc_" << x_id << "_" << y_id << "-*" << std::endl; |
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89 | |
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90 | for ( size_t p=0 ; p<nprocs ; p++ ) |
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91 | { |
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92 | std::ostringstream sproc; |
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93 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
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94 | |
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95 | #if USE_MEMCACHE_V4 |
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96 | proc[p] = new VciCcXCacheWrapperV4<vci_param, iss_t>( |
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97 | sproc.str().c_str(), |
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98 | cluster_id*nprocs + p, |
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99 | mtd, // Mapping Table Direct |
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100 | mtc, // Mapping Table Coherence |
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101 | IntTab(cluster_id,p), // SRCID_D |
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102 | IntTab(cluster_id,p), // SRCID_C |
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103 | IntTab(cluster_id,p), // TGTID_C |
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104 | 1, // single core |
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105 | 1, // single dcache |
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106 | l1_i_ways,l1_i_sets,16, // ICACHE size |
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107 | l1_d_ways,l1_d_sets,16, // DCACHE size |
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108 | 4, // WBUF width |
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109 | 8 // WBUF depth |
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110 | ); |
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111 | #endif // USE_MEMCACHE_V4 |
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112 | |
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113 | #if USE_MEMCACHE_V3 |
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114 | proc[p] = new VciCcVCacheWrapper2V1<vci_param, iss_t>( |
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115 | sproc.str().c_str(), |
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116 | cluster_id*nprocs + p, |
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117 | mtd, mtc, |
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118 | IntTab(cluster_id,p), // SRCID_D |
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119 | IntTab(cluster_id,p), // SRCID_C |
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120 | IntTab(cluster_id,p), // TGTID_C |
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121 | TLB_IWAYS,TLB_ISETS,TLB_DWAYS,TLB_DSETS, |
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122 | l1_i_ways,l1_i_sets,16, |
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123 | l1_d_ways,l1_d_sets,16, |
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124 | 16); // TLB, Icache and Dcache sizes |
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125 | #endif // USE_MEMCACHE_V3 |
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126 | |
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127 | #if USE_PROFILER_ON_CPUs |
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128 | std::ostringstream sp; |
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129 | sp << "profiler_" << x_id << "_" << y_id << "-" << p; |
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130 | |
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131 | profiler[p] = new VciProfiler <vci_param, iss_t> (sp.str().c_str(), |
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132 | cluster_id, |
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133 | x_id, |
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134 | y_id, |
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135 | x_width, |
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136 | y_width, |
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137 | CONFIG_ADDRESS_WIDTH); |
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138 | profiler[p]->p_clk (this->p_clk); |
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139 | profiler[p]->p_resetn (this->p_resetn); |
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140 | profiler[p]->p_vci (signal_vci_ini_d_proc[p]); |
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141 | profiler[p]->set_L1_cache(proc[p]); |
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142 | #endif // USE_PROFILER_ON_CPUs |
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143 | |
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144 | #if USE_LOGGER_ON_CPUs |
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145 | std::ostringstream sp2; |
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146 | sp2 << "logger_" << x_id << "_" << y_id << "-" << p; |
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147 | vci_logger[p] = new VciLogger <vci_param> (sp2.str().c_str(), mtd); |
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148 | vci_logger[p]->p_clk (this->p_clk); |
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149 | vci_logger[p]->p_resetn (this->p_resetn); |
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150 | vci_logger[p]->p_vci (signal_vci_ini_d_proc[p]); |
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151 | #endif // USE_LOGGER_ON_CPUs |
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152 | |
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153 | } // for on CPUs number |
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154 | |
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155 | std::cout << " - building memc_" << x_id << "_" << y_id << std::endl; |
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156 | |
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157 | std::ostringstream smemc; |
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158 | smemc << "memc_" << x_id << "_" << y_id; |
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159 | |
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160 | #if USE_MEMCACHE_V4 |
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161 | memc = new VciMemCacheV4<vci_param>( |
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162 | smemc.str().c_str(), |
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163 | mtd, mtc, mtx, |
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164 | IntTab(cluster_id), // SRCID_X |
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165 | IntTab(cluster_id, nprocs), // SRCID_C |
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166 | IntTab(cluster_id, tgtid_memc), // TGTID_D |
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167 | IntTab(cluster_id, nprocs), // TGTID_C |
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168 | memc_ways, memc_sets, 16, // CACHE SIZE |
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169 | 4096, // HEAP SIZE |
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170 | 8, // TRANSACTION TABLE DEPTH |
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171 | 8); // UPDATE TABLE DEPTH |
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172 | #endif |
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173 | |
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174 | #if USE_MEMCACHE_V3 |
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175 | memc = new VciMemCacheV3<vci_param>( |
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176 | smemc.str().c_str(), |
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177 | mtd, mtc, mtx, |
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178 | IntTab(cluster_id), // SRCID_X |
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179 | IntTab(cluster_id, nprocs), // SRCID_C |
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180 | IntTab(cluster_id, tgtid_memc), // TGTID_D |
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181 | IntTab(cluster_id, nprocs), // TGTID_C |
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182 | memc_ways, memc_sets, 16, |
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183 | 4096); |
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184 | #endif // USE_MEMCACHE_V3 |
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185 | |
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186 | |
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187 | std::cout << " - building xram_" << x_id << "_" << y_id << std::endl; |
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188 | |
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189 | std::ostringstream sxram; |
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190 | sxram << "xram_" << x_id << "_" << y_id; |
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191 | xram = new VciSimpleRam<vci_param>( |
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192 | sxram.str().c_str(), |
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193 | IntTab(cluster_id), |
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194 | mtx, |
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195 | loader, |
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196 | xram_latency); |
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197 | |
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198 | std::cout << " - building xicu_" << x_id << "_" << y_id << std::endl; |
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199 | |
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200 | //size_t nhwi = 8; // always 8 (or 9) ports, even if |
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201 | //if( io == true ) nhwi = 9; // there if less than 4 processors |
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202 | |
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203 | |
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204 | size_t nhwi = 0; |
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205 | if(io == true) nhwi = 6; |
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206 | |
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207 | std::ostringstream sicu; |
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208 | sicu << "xicu_" << x_id << "_" << y_id; |
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209 | xicu = new VciXicu<vci_param>( |
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210 | sicu.str().c_str(), |
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211 | mtd, // mapping table |
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212 | IntTab(cluster_id, tgtid_xicu), // TGTID_D |
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213 | nprocs, // number of timer IRQs |
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214 | nhwi, // number of hard IRQs |
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215 | nprocs, // number of soft IRQs |
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216 | nprocs); // number of output IRQs |
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217 | |
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218 | std::cout << " - building xbard_" << x_id << "_" << y_id << std::endl; |
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219 | |
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220 | // direct local crossbar |
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221 | size_t nb_direct_initiators = nprocs; |
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222 | size_t nb_direct_targets = 2; |
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223 | |
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224 | if( io == true ) |
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225 | { |
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226 | nb_direct_initiators = nprocs + 2; |
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227 | nb_direct_targets = 7; |
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228 | } |
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229 | |
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230 | std::ostringstream sd; |
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231 | sd << "xbard_" << x_id << "_" << y_id; |
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232 | |
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233 | #if USE_LOCAL_RING |
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234 | xbard = new VciLocalRingFast<vci_param,cmd_width,rsp_width>( |
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235 | sd.str().c_str(), |
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236 | mtd, |
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237 | IntTab(cluster_id), // cluster index |
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238 | 4, // wrapper fifo depth |
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239 | 18, // gateway fifo depth |
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240 | nb_direct_initiators , // number of initiators |
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241 | nb_direct_targets); // number of targets |
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242 | #else |
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243 | xbard = new VciLocalCrossbar<vci_param>( |
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244 | sd.str().c_str(), |
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245 | mtd, |
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246 | IntTab(cluster_id), // cluster initiator index |
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247 | IntTab(cluster_id), // cluster target index |
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248 | nb_direct_initiators, // number of initiators |
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249 | nb_direct_targets); // number of targets |
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250 | #endif // USE_LOCAL_RING |
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251 | |
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252 | |
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253 | std::cout << " - building xbarc_" << x_id << "_" << y_id << std::endl; |
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254 | |
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255 | // coherence local crossbar |
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256 | std::ostringstream sc; |
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257 | sc << "xbarc_" << x_id << "_" << y_id; |
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258 | |
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259 | #if USE_LOCAL_RING |
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260 | xbarc = new VciLocalRingFast<vci_param,cmd_width,rsp_width>( |
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261 | sc.str().c_str(), |
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262 | mtc, |
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263 | IntTab(cluster_id), // cluster index |
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264 | 4, // wrapper fifo depth |
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265 | 18, // gateway fifo depth |
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266 | nprocs + 1, // number of initiators |
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267 | nprocs + 1); // number of targets |
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268 | |
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269 | #else |
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270 | xbarc = new VciLocalCrossbar<vci_param>( |
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271 | sc.str().c_str(), |
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272 | mtc, |
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273 | IntTab(cluster_id), // cluster initiator index |
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274 | IntTab(cluster_id), // cluster target index |
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275 | nprocs + 1, // number of initiators |
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276 | nprocs + 1); // number of targets |
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277 | #endif // USE_LOCAL_RING |
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278 | |
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279 | #if !(USE_LOCAL_RING) |
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280 | std::cout << " - building wrappers in cluster_" << x_id << "_" << y_id << std::endl; |
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281 | |
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282 | // direct initiator wrapper |
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283 | std::ostringstream wid; |
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284 | wid << "iniwrapperd_" << x_id << "_" << y_id; |
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285 | iniwrapperd = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
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286 | wid.str().c_str(), |
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287 | 4, // cmd fifo depth |
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288 | 4); // rsp fifo depth |
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289 | |
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290 | // direct target wrapper |
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291 | std::ostringstream wtd; |
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292 | wtd << "tgtwrapperd_" << x_id << "_" << y_id; |
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293 | tgtwrapperd = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
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294 | wtd.str().c_str(), |
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295 | 4, // cmd fifo depth |
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296 | 4); // rsp fifo depth |
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297 | |
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298 | // coherence initiator wrapper |
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299 | std::ostringstream wic; |
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300 | wic << "iniwrapperc_" << x_id << "_" << y_id; |
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301 | iniwrapperc = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
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302 | wic.str().c_str(), |
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303 | 4, // cmd fifo depth |
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304 | 4); // rsp fifo depth |
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305 | |
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306 | // coherence target wrapper |
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307 | std::ostringstream wtc; |
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308 | wtc << "tgtwrapperc_" << x_id << "_" << y_id; |
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309 | tgtwrapperc = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
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310 | wtc.str().c_str(), |
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311 | 4, // cmd fifo depth |
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312 | 4); // rsp fifo depth |
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313 | #endif // !(USE_LOCAL_RING) |
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314 | |
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315 | std::cout << " - building cmdrouter_" << x_id << "_" << y_id << std::endl; |
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316 | |
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317 | // CMD router |
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318 | std::ostringstream scmd; |
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319 | scmd << "cmdrouter_" << x_id << "_" << y_id; |
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320 | cmdrouter = new VirtualDspinRouter<cmd_width>( |
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321 | scmd.str().c_str(), |
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322 | x_id,y_id, // coordinate in the mesh |
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323 | x_width, y_width, // x & y fields width |
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324 | 4,4); // input & output fifo depths |
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325 | |
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326 | std::cout << " - building rsprouter_" << x_id << "_" << y_id << std::endl; |
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327 | |
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328 | // RSP router |
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329 | std::ostringstream srsp; |
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330 | srsp << "rsprouter_" << x_id << "_" << y_id; |
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331 | rsprouter = new VirtualDspinRouter<rsp_width>( |
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332 | srsp.str().c_str(), |
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333 | x_id,y_id, // coordinates in mesh |
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334 | x_width, y_width, // x & y fields width |
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335 | 4,4); // input & output fifo depths |
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336 | |
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337 | // IO cluster components |
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338 | if ( io == true ) |
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339 | { |
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340 | brom = new VciSimpleRam<vci_param>( |
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341 | "brom", |
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342 | IntTab(cluster_id, tgtid_brom), |
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343 | mtd, |
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344 | loader); |
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345 | |
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346 | #if USE_FRAME_BUFFER |
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347 | fbuf = new VciFrameBuffer<vci_param>( |
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348 | "fbuf", |
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349 | IntTab(cluster_id, tgtid_fbuf), |
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350 | mtd, |
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351 | xfb, |
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352 | yfb, |
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353 | fb_mode); |
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354 | #else |
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355 | std::ostringstream sf; |
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356 | sd << "fb_logger__" << x_id << "_" << y_id; |
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357 | fbuf = new VciLogger <vci_param> (sd.str().c_str(), mtd); |
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358 | #endif |
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359 | |
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360 | cdma = new VciDmaTsarV2<vci_param>( |
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361 | "cdma", |
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362 | mtd, |
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363 | IntTab(cluster_id, nprocs), |
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364 | IntTab(cluster_id, tgtid_mdma), |
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365 | 64); |
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366 | |
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367 | #if USE_LOGGER_ON_DMA |
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368 | std::ostringstream sd; |
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369 | sd << "dma_logger_" << x_id << "_" << y_id; |
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370 | vci_dma_logger = new VciLogger <vci_param> (sd.str().c_str(), mtd); |
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371 | vci_dma_logger->p_clk (this->p_clk); |
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372 | vci_dma_logger->p_resetn (this->p_resetn); |
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373 | vci_dma_logger->p_vci (signal_vci_ini_d_cdma); |
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374 | #endif // USE_LOGGER_ON_DMA |
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375 | |
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376 | bdev = new VciBlockDeviceTsarV2<vci_param>( |
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377 | "bdev", |
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378 | mtd, |
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379 | IntTab(cluster_id, nprocs+1), |
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380 | IntTab(cluster_id, tgtid_bdev), |
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381 | disk_name, |
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382 | block_size); |
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383 | |
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384 | // tty |
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385 | signal_irq_mtty = alloc_elems<sc_signal<bool> >("signal_irq_mtty", 4); |
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386 | |
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387 | std::ostringstream stty; |
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388 | stty << "tty_" << x_id << "_" << y_id; |
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389 | mtty = new VciMultiTty<vci_param>( |
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390 | stty.str().c_str(), |
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391 | IntTab(cluster_id, tgtid_mtty), |
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392 | mtd, "tty0", "tty1", "tty2", "tty3", NULL); |
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393 | } |
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394 | |
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395 | std::cout << " - all components constructed" << std::endl; |
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396 | |
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397 | //////////////////////////////////// |
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398 | // Connections are defined here |
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399 | //////////////////////////////////// |
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400 | |
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401 | // CMDROUTER and RSPROUTER |
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402 | cmdrouter->p_clk (this->p_clk); |
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403 | cmdrouter->p_resetn (this->p_resetn); |
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404 | rsprouter->p_clk (this->p_clk); |
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405 | rsprouter->p_resetn (this->p_resetn); |
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406 | for(int x = 0; x < 2; x++) |
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407 | { |
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408 | for(int y = 0; y < 4; y++) |
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409 | { |
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410 | cmdrouter->p_out[x][y] (this->p_cmd_out[x][y]); |
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411 | cmdrouter->p_in[x][y] (this->p_cmd_in[x][y]); |
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412 | rsprouter->p_out[x][y] (this->p_rsp_out[x][y]); |
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413 | rsprouter->p_in[x][y] (this->p_rsp_in[x][y]); |
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414 | } |
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415 | } |
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416 | |
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417 | cmdrouter->p_out[0][4] (signal_dspin_cmd_g2l_d); |
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418 | cmdrouter->p_out[1][4] (signal_dspin_cmd_g2l_c); |
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419 | cmdrouter->p_in[0][4] (signal_dspin_cmd_l2g_d); |
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420 | cmdrouter->p_in[1][4] (signal_dspin_cmd_l2g_c); |
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421 | |
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422 | rsprouter->p_out[0][4] (signal_dspin_rsp_g2l_d); |
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423 | rsprouter->p_out[1][4] (signal_dspin_rsp_g2l_c); |
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424 | rsprouter->p_in[0][4] (signal_dspin_rsp_l2g_d); |
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425 | rsprouter->p_in[1][4] (signal_dspin_rsp_l2g_c); |
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426 | |
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427 | #if !(USE_LOCAL_RING) |
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428 | // VCI/DSPIN WRAPPERS |
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429 | iniwrapperd->p_clk (this->p_clk); |
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430 | iniwrapperd->p_resetn (this->p_resetn); |
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431 | iniwrapperd->p_vci (signal_vci_l2g_d); |
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432 | iniwrapperd->p_dspin_out (signal_dspin_cmd_l2g_d); |
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433 | iniwrapperd->p_dspin_in (signal_dspin_rsp_g2l_d); |
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434 | |
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435 | tgtwrapperd->p_clk (this->p_clk); |
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436 | tgtwrapperd->p_resetn (this->p_resetn); |
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437 | tgtwrapperd->p_vci (signal_vci_g2l_d); |
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438 | tgtwrapperd->p_dspin_out (signal_dspin_rsp_l2g_d); |
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439 | tgtwrapperd->p_dspin_in (signal_dspin_cmd_g2l_d); |
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440 | |
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441 | iniwrapperc->p_clk (this->p_clk); |
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442 | iniwrapperc->p_resetn (this->p_resetn); |
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443 | iniwrapperc->p_vci (signal_vci_l2g_c); |
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444 | iniwrapperc->p_dspin_out (signal_dspin_cmd_l2g_c); |
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445 | iniwrapperc->p_dspin_in (signal_dspin_rsp_g2l_c); |
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446 | |
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447 | tgtwrapperc->p_clk (this->p_clk); |
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448 | tgtwrapperc->p_resetn (this->p_resetn); |
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449 | tgtwrapperc->p_vci (signal_vci_g2l_c); |
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450 | tgtwrapperc->p_dspin_out (signal_dspin_rsp_l2g_c); |
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451 | tgtwrapperc->p_dspin_in (signal_dspin_cmd_g2l_c); |
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452 | #endif |
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453 | |
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454 | // CROSSBAR direct |
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455 | xbard->p_clk (this->p_clk); |
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456 | xbard->p_resetn (this->p_resetn); |
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457 | |
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458 | #if USE_LOCAL_RING |
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459 | xbard->p_gate_cmd_out (signal_dspin_cmd_l2g_d); |
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460 | xbard->p_gate_cmd_in (signal_dspin_cmd_g2l_d); |
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461 | xbard->p_gate_rsp_out (signal_dspin_rsp_l2g_d); |
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462 | xbard->p_gate_rsp_in (signal_dspin_rsp_g2l_d); |
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463 | #else |
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464 | xbard->p_initiator_to_up (signal_vci_l2g_d); |
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465 | xbard->p_target_to_up (signal_vci_g2l_d); |
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466 | #endif |
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467 | xbard->p_to_target[tgtid_memc] (signal_vci_tgt_d_memc); |
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468 | xbard->p_to_target[tgtid_xicu] (signal_vci_tgt_d_xicu); |
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469 | |
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470 | for ( size_t p=0 ; p<nprocs ; p++) |
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471 | xbard->p_to_initiator[p] (signal_vci_ini_d_proc[p]); |
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472 | |
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473 | if ( io == true ) |
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474 | { |
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475 | xbard->p_to_target[tgtid_brom] (signal_vci_tgt_d_brom); |
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476 | xbard->p_to_target[tgtid_bdev] (signal_vci_tgt_d_bdev); |
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477 | xbard->p_to_target[tgtid_fbuf] (signal_vci_tgt_d_fbuf); |
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478 | xbard->p_to_target[tgtid_mtty] (signal_vci_tgt_d_mtty); |
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479 | xbard->p_to_target[tgtid_mdma] (signal_vci_tgt_d_cdma); |
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480 | |
---|
481 | xbard->p_to_initiator[nprocs] (signal_vci_ini_d_cdma); |
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482 | xbard->p_to_initiator[nprocs+1] (signal_vci_ini_d_bdev); |
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483 | } |
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484 | |
---|
485 | // CROSSBAR coherence |
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486 | xbarc->p_clk (this->p_clk); |
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487 | xbarc->p_resetn (this->p_resetn); |
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488 | |
---|
489 | #if USE_LOCAL_RING |
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490 | xbarc->p_gate_cmd_out (signal_dspin_cmd_l2g_c); |
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491 | xbarc->p_gate_cmd_in (signal_dspin_cmd_g2l_c); |
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492 | xbarc->p_gate_rsp_out (signal_dspin_rsp_l2g_c); |
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493 | xbarc->p_gate_rsp_in (signal_dspin_rsp_g2l_c); |
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494 | #else |
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495 | xbarc->p_initiator_to_up (signal_vci_l2g_c); |
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496 | xbarc->p_target_to_up (signal_vci_g2l_c); |
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497 | #endif |
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498 | xbarc->p_to_initiator[nprocs] (signal_vci_ini_c_memc); |
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499 | xbarc->p_to_target[nprocs] (signal_vci_tgt_c_memc); |
---|
500 | |
---|
501 | for ( size_t p=0 ; p<nprocs ; p++) |
---|
502 | { |
---|
503 | xbarc->p_to_target[p] (signal_vci_tgt_c_proc[p]); |
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504 | xbarc->p_to_initiator[p] (signal_vci_ini_c_proc[p]); |
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505 | } |
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506 | |
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507 | // Processors |
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508 | for ( size_t p=0 ; p<nprocs ; p++) |
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509 | { |
---|
510 | proc[p]->p_clk (this->p_clk); |
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511 | proc[p]->p_resetn (this->p_resetn); |
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512 | proc[p]->p_vci_ini_rw (signal_vci_ini_d_proc[p]); |
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513 | proc[p]->p_vci_ini_c (signal_vci_ini_c_proc[p]); |
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514 | proc[p]->p_vci_tgt (signal_vci_tgt_c_proc[p]); |
---|
515 | proc[p]->p_irq[0] (signal_proc_it[p]); |
---|
516 | |
---|
517 | for ( size_t j = 1 ; j < 6 ; j++ ) |
---|
518 | proc[p]->p_irq[j] (signal_false); |
---|
519 | } |
---|
520 | |
---|
521 | // XICU |
---|
522 | xicu->p_clk (this->p_clk); |
---|
523 | xicu->p_resetn (this->p_resetn); |
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524 | xicu->p_vci (signal_vci_tgt_d_xicu); |
---|
525 | |
---|
526 | for ( size_t p=0 ; p<nprocs ; p++) |
---|
527 | xicu->p_irq[p] (signal_proc_it[p]); |
---|
528 | |
---|
529 | // MEMC |
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530 | memc->p_clk (this->p_clk); |
---|
531 | memc->p_resetn (this->p_resetn); |
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532 | memc->p_vci_ixr (signal_vci_xram); |
---|
533 | memc->p_vci_tgt (signal_vci_tgt_d_memc); |
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534 | memc->p_vci_ini (signal_vci_ini_c_memc); |
---|
535 | memc->p_vci_tgt_cleanup (signal_vci_tgt_c_memc); |
---|
536 | |
---|
537 | // XRAM |
---|
538 | xram->p_clk (this->p_clk); |
---|
539 | xram->p_resetn (this->p_resetn); |
---|
540 | xram->p_vci (signal_vci_xram); |
---|
541 | |
---|
542 | // Components in IO cluster |
---|
543 | if ( io == true ) |
---|
544 | { |
---|
545 | // BDEV |
---|
546 | bdev->p_clk (this->p_clk); |
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547 | bdev->p_resetn (this->p_resetn); |
---|
548 | bdev->p_irq (signal_irq_bdev); |
---|
549 | bdev->p_vci_target (signal_vci_tgt_d_bdev); |
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550 | bdev->p_vci_initiator (signal_vci_ini_d_bdev); |
---|
551 | |
---|
552 | // FBUF |
---|
553 | fbuf->p_clk (this->p_clk); |
---|
554 | fbuf->p_resetn (this->p_resetn); |
---|
555 | fbuf->p_vci (signal_vci_tgt_d_fbuf); |
---|
556 | |
---|
557 | // BROM |
---|
558 | brom->p_clk (this->p_clk); |
---|
559 | brom->p_resetn (this->p_resetn); |
---|
560 | brom->p_vci (signal_vci_tgt_d_brom); |
---|
561 | |
---|
562 | // MTTY |
---|
563 | mtty->p_clk (this->p_clk); |
---|
564 | mtty->p_resetn (this->p_resetn); |
---|
565 | mtty->p_vci (signal_vci_tgt_d_mtty); |
---|
566 | for(size_t i=0 ; i<4 ; i++) |
---|
567 | mtty->p_irq[i] (signal_irq_mtty[i]); |
---|
568 | |
---|
569 | // CDMA |
---|
570 | cdma->p_clk (this->p_clk); |
---|
571 | cdma->p_resetn (this->p_resetn); |
---|
572 | cdma->p_irq (signal_irq_cdma); |
---|
573 | cdma->p_vci_target (signal_vci_tgt_d_cdma); |
---|
574 | cdma->p_vci_initiator (signal_vci_ini_d_cdma); |
---|
575 | |
---|
576 | xicu->p_hwi[0] (signal_irq_bdev); |
---|
577 | xicu->p_hwi[1] (signal_irq_cdma); |
---|
578 | |
---|
579 | for(size_t i=0 ; i<4 ; i++) |
---|
580 | xicu->p_hwi[2+i] (signal_irq_mtty[i]); |
---|
581 | } |
---|
582 | } // end constructor |
---|
583 | |
---|
584 | /////////////////////////////////////////////////////////////////////////// |
---|
585 | // destructor |
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586 | /////////////////////////////////////////////////////////////////////////// |
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587 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
---|
588 | TsarV4ClusterXbar<vci_param, iss_t, cmd_width, rsp_width>::~TsarV4ClusterXbar() {} |
---|
589 | |
---|
590 | }} |
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